dri-devel October 2021

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825 discussions

[PATCH v5 0/7] drm/sun4i: Add support for dual-link LVDS on the A20
by Maxime Ripard 22 Oct '21

22 Oct '21

Hi, This is a fourth attempt at supporting the LVDS dual-link output on the Allwinner A20. Let me know what you think, Maxime Changes from v4: - Rebased on 5.15 Changes from v3: - Reintroduce the endpoint sanity check (and make of_graph_get_port_by_id const in the process) - Make a few doc fixes - Fix device_node leakage - Changed allwinner,lvds-companion to more generic link-companion - Rebased on 5.11 Changes from v2: - Added the DT binding description - Split the patch to enable the A20 - Reworked a bit the error messages Changes from v1: - Reworked the DT bindings - Refactored a bit the panel registration in the tcon code. Maxime Ripard (7): of: Make of_graph_get_port_by_id take a const device_node drm/of: Change the prototype of drm_of_lvds_get_dual_link_pixel_order dt-bindings: display: sun4i: Add LVDS Dual-Link property drm/sun4i: tcon: Refactor the LVDS and panel probing drm/sun4i: tcon: Support the LVDS Dual-Link drm/sun4i: tcon: Enable the A20 dual-link output [DO NOT MERGE] ARM: dts: sun7i: Enable LVDS Dual-Link on the Cubieboard .../display/allwinner,sun4i-a10-tcon.yaml | 6 + arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 69 ++++++++ drivers/gpu/drm/drm_of.c | 138 +++++++++++---- drivers/gpu/drm/rcar-du/rcar_lvds.c | 8 +- drivers/gpu/drm/sun4i/sun4i_tcon.c | 164 ++++++++++-------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 4 + drivers/of/property.c | 2 +- include/drm/drm_of.h | 16 +- include/linux/of_graph.h | 4 +- 9 files changed, 298 insertions(+), 113 deletions(-) -- 2.31.1

2 11

[PATCH v2] dma-buf: heaps: init heaps in subsys_initcall
by Shuosheng Huang 22 Oct '21

22 Oct '21

Some built-in modules will failed to use dma-buf heap to allocate memory if the heap drivers are too late to be initialized. To fix this issue, move initialization of dma-buf heap drivers in subsys_initcall() which is more earlier to be called. Signed-off-by: Shuosheng Huang <huangshuosheng(a)allwinnertech.com> --- drivers/dma-buf/heaps/cma_heap.c | 2 +- drivers/dma-buf/heaps/system_heap.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c index 0c05b79870f9..e051403a346d 100644 --- a/drivers/dma-buf/heaps/cma_heap.c +++ b/drivers/dma-buf/heaps/cma_heap.c @@ -400,6 +400,6 @@ static int add_default_cma_heap(void) return ret; } -module_init(add_default_cma_heap); +subsys_initcall(add_default_cma_heap); MODULE_DESCRIPTION("DMA-BUF CMA Heap"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/dma-buf/heaps/system_heap.c b/drivers/dma-buf/heaps/system_heap.c index 23a7e74ef966..3d6927657ec9 100644 --- a/drivers/dma-buf/heaps/system_heap.c +++ b/drivers/dma-buf/heaps/system_heap.c @@ -435,5 +435,5 @@ static int system_heap_create(void) return 0; } -module_init(system_heap_create); +subsys_initcall(system_heap_create); MODULE_LICENSE("GPL v2"); -- 2.29.0

3 2

[PATCH] drm/i915/selftests: Update live.evict to wait on requests / idle GPU after each loop
by Matthew Brost 22 Oct '21

22 Oct '21

Update live.evict to wait on last request and idle GPU after each loop. This not only enhances the test to fill the GGTT on each engine class but also avoid timeouts from igt_flush_test when using GuC submission. igt_flush_test (idle GPU) can take a long time with GuC submission if losts of contexts are created due to H2G / G2H required to destroy contexts. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> --- .../gpu/drm/i915/selftests/i915_gem_evict.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c index f99bb0113726..7e0658a77659 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c @@ -442,6 +442,7 @@ static int igt_evict_contexts(void *arg) /* Overfill the GGTT with context objects and so try to evict one. */ for_each_engine(engine, gt, id) { struct i915_sw_fence fence; + struct i915_request *last = NULL; count = 0; onstack_fence_init(&fence); @@ -479,6 +480,9 @@ static int igt_evict_contexts(void *arg) i915_request_add(rq); count++; + if (last) + i915_request_put(last); + last = i915_request_get(rq); err = 0; } while(1); onstack_fence_fini(&fence); @@ -486,6 +490,21 @@ static int igt_evict_contexts(void *arg) count, engine->name); if (err) break; + if (last) { + if (i915_request_wait(last, 0, HZ) < 0) { + err = -EIO; + i915_request_put(last); + pr_err("Failed waiting for last request (on %s)", + engine->name); + break; + } + i915_request_put(last); + } + err = intel_gt_wait_for_idle(engine->gt, HZ * 3); + if (err) { + pr_err("Failed to idle GT (on %s)", engine->name); + break; + } } mutex_lock(&ggtt->vm.mutex); -- 2.32.0

2 1

[git pull] drm fixes for 5.15-rc7
by Dave Airlie 22 Oct '21

22 Oct '21

Hi Linus, Nothing too crazy at the end of the cycle, the kmb modesetting fixes are probably a bit large but it's not a major driver, and its fixing monitor doesn't turn on type problems. Otherwise it's just a few minor patches, one ast regression revert, an msm power stability fix. Dave. drm-fixes-2021-10-22: drm fixes for v5.15-rc7 ast: - fix regression with connector detect msm: - fix power stability issue msxfb: - fix crash on unload panel: - sync fix kmb: - modesetting fixes The following changes since commit 519d81956ee277b4419c723adfb154603c2565ba: Linux 5.15-rc6 (2021-10-17 20:00:13 -1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-10-22 for you to fetch changes up to 595cb5e0b832a3e100cbbdefef797b0c27bf725a: Revert "drm/ast: Add detect function support" (2021-10-22 05:52:12 +1000) ---------------------------------------------------------------- drm fixes for v5.15-rc7 ast: - fix regression with connector detect msm: - fix power stability issue msxfb: - fix crash on unload panel: - sync fix kmb: - modesetting fixes ---------------------------------------------------------------- Anitha Chrisanthus (4): drm/kmb: Work around for higher system clock drm/kmb: Limit supported mode to 1080p drm/kmb: Corrected typo in handle_lcd_irq drm/kmb: Enable ADV bridge after modeset Dan Johansen (1): drm/panel: ilitek-ili9881c: Fix sync for Feixin K101-IM2BYL02 panel Dave Airlie (2): Merge tag 'drm-msm-fixes-2021-10-18' of https://gitlab.freedesktop.org/drm/msm into drm-fixes Merge tag 'drm-misc-fixes-2021-10-21-1' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Edmund Dea (2): drm/kmb: Remove clearing DPHY regs drm/kmb: Disable change of plane parameters Kim Phillips (1): Revert "drm/ast: Add detect function support" Marek Vasut (1): drm: mxsfb: Fix NULL pointer dereference crash on unload Rob Clark (1): drm/msm/devfreq: Restrict idle clamping to a618 for now drivers/gpu/drm/ast/ast_mode.c | 18 +---------- drivers/gpu/drm/kmb/kmb_crtc.c | 41 +++++++++++++++++++++++-- drivers/gpu/drm/kmb/kmb_drv.c | 2 +- drivers/gpu/drm/kmb/kmb_drv.h | 10 ++++++- drivers/gpu/drm/kmb/kmb_dsi.c | 25 +++++++++------- drivers/gpu/drm/kmb/kmb_dsi.h | 2 +- drivers/gpu/drm/kmb/kmb_plane.c | 43 ++++++++++++++++++++++++++- drivers/gpu/drm/kmb/kmb_plane.h | 6 ++++ drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 +++++ drivers/gpu/drm/msm/msm_gpu.h | 4 +++ drivers/gpu/drm/msm/msm_gpu_devfreq.c | 3 +- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 6 +++- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 12 ++++---- 13 files changed, 137 insertions(+), 42 deletions(-)

2 1

[PATCH 0/2] Delay disabling scheduling on a context
by Matthew Brost 22 Oct '21

22 Oct '21

Add delay before disabling scheduling on a context. 2nd patch should explain it quite well. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> Matthew Brost (2): drm/i915/selftests: Use correct selfest calls for live tests drm/i915/guc: Add delay to disable scheduling after pin count goes to zero drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- .../i915/gem/selftests/i915_gem_coherency.c | 2 +- .../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 2 +- .../drm/i915/gem/selftests/i915_gem_object.c | 2 +- drivers/gpu/drm/i915/gt/intel_context.h | 9 ++ drivers/gpu/drm/i915/gt/intel_context_types.h | 7 + drivers/gpu/drm/i915/gt/uc/intel_guc.h | 10 ++ .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 28 ++++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 127 ++++++++++++++---- drivers/gpu/drm/i915/i915_selftest.h | 2 + drivers/gpu/drm/i915/i915_trace.h | 10 ++ drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +- drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c | 2 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +- 16 files changed, 178 insertions(+), 33 deletions(-) -- 2.32.0

1 2

[PATCH 0/3] Do error capture async, flush G2H processing on reset
by Matthew Brost 22 Oct '21

22 Oct '21

Rather allocating an error capture in nowait context to break a lockdep splat [1], do the error capture async compared to the G2H processing. v2: Fix Docs warning v3: Rebase, resend for CI Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> [1] https://patchwork.freedesktop.org/patch/451415/?series=93704&rev=5 Matthew Brost (2): drm/i915/guc: Do error capture asynchronously drm/i915/guc: Flush G2H work queue during reset drivers/gpu/drm/i915/gt/intel_context.c | 2 + drivers/gpu/drm/i915/gt/intel_context_types.h | 7 ++ drivers/gpu/drm/i915/gt/uc/intel_guc.h | 10 ++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 97 ++++++++++++++----- 4 files changed, 91 insertions(+), 25 deletions(-) -- 2.32.0

1 3

linux-next: manual merge of the drm tree with the drm-misc-fixes tree
by Stephen Rothwell 22 Oct '21

22 Oct '21

Hi all, Today's linux-next merge of the drm tree got a conflict in: drivers/gpu/drm/drm_panel_orientation_quirks.c between commit: def0c3697287 ("drm: panel-orientation-quirks: Add quirk for Aya Neo 2021") from the drm-misc-fixes tree and commits: 072e70d52372 ("drm: panel-orientation-quirks: Add quirk for the Chuwi Hi10 Pro") 63a4881572d7 ("drm: panel-orientation-quirks: Add quirk for the Chuwi HiBook") from the drm tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts. -- Cheers, Stephen Rothwell diff --cc drivers/gpu/drm/drm_panel_orientation_quirks.c index 30c17a76f49a,62e8ccc7ab9c..000000000000 --- a/drivers/gpu/drm/drm_panel_orientation_quirks.c +++ b/drivers/gpu/drm/drm_panel_orientation_quirks.c @@@ -134,12 -140,20 +140,26 @@@ static const struct dmi_system_id orien DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T103HAF"), }, .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* AYA NEO 2021 */ + .matches = { + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AYADEVICE"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "AYA NEO 2021"), + }, + .driver_data = (void *)&lcd800x1280_rightside_up, + }, { /* Chuwi HiBook (CWI514) */ + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Hampoo"), + DMI_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"), + /* Above matches are too generic, add bios-date match */ + DMI_MATCH(DMI_BIOS_DATE, "05/07/2016"), + }, + .driver_data = (void *)&lcd1200x1920_rightside_up, + }, { /* Chuwi Hi10 Pro (CWI529) */ + .matches = { + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "Hampoo"), + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Hi10 pro tablet"), + }, + .driver_data = (void *)&lcd1200x1920_rightside_up, }, { /* GPD MicroPC (generic strings, also match on bios date) */ .matches = { DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Default string"),

1 0

[RFC PATCH 0/4] drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS
by Khaled Almahallawy 21 Oct '21

21 Oct '21

This series updates DPCD 248h register name and PHY test patterns names to follow DP 2.0 Specs. Also updates the DP PHY CTS codes of the affected drivers (i915, amd, msm) No functional changes expected. Reference: “DPCD 248h/10Bh/10Ch/10Dh/10Eh Name/Description Consistency” https://groups.vesa.org/wg/AllMem/documentComment/2738 Khaled Almahallawy (4): drm/dp: Rename DPCD 248h according to DP 2.0 specs drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions drm/amd/dc: Use DPCD 248h DP 2.0 new name drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.c | 12 ++++++------ drivers/gpu/drm/msm/dp/dp_link.c | 16 ++++++++-------- include/drm/drm_dp_helper.h | 13 +++---------- 7 files changed, 33 insertions(+), 40 deletions(-) -- 2.25.1

3 7

[PATCH] drm/msm/dsi: use bulk clk API
by Dmitry Baryshkov 21 Oct '21

21 Oct '21

Use clk_bulk_* API instead of hand-coding them. Note, this drops support for legacy clk naming (e.g. "iface_clk" instead of just "iface"), however all in-kernel device trees were converted long long ago. The warning is present there since 2017. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/dsi/dsi_host.c | 59 ++++++------------------------ 1 file changed, 12 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index e269df285136..3b81f40bba2e 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -106,7 +106,8 @@ struct msm_dsi_host { phys_addr_t ctrl_size; struct regulator_bulk_data supplies[DSI_DEV_REGULATOR_MAX]; - struct clk *bus_clks[DSI_BUS_CLK_MAX]; + int num_bus_clks; + struct clk_bulk_data bus_clks[DSI_BUS_CLK_MAX]; struct clk *byte_clk; struct clk *esc_clk; @@ -374,15 +375,14 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host) int i, ret = 0; /* get bus clocks */ - for (i = 0; i < cfg->num_bus_clks; i++) { - msm_host->bus_clks[i] = msm_clk_get(pdev, - cfg->bus_clk_names[i]); - if (IS_ERR(msm_host->bus_clks[i])) { - ret = PTR_ERR(msm_host->bus_clks[i]); - pr_err("%s: Unable to get %s clock, ret = %d\n", - __func__, cfg->bus_clk_names[i], ret); - goto exit; - } + for (i = 0; i < cfg->num_bus_clks; i++) + msm_host->bus_clks[i].id = cfg->bus_clk_names[i]; + msm_host->num_bus_clks = cfg->num_bus_clks; + + ret = devm_clk_bulk_get(&pdev->dev, msm_host->num_bus_clks, msm_host->bus_clks); + if (ret < 0) { + dev_err(&pdev->dev, "Unable to get clocks, ret = %d\n", ret); + goto exit; } /* get link and source clocks */ @@ -433,41 +433,6 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host) return ret; } -static int dsi_bus_clk_enable(struct msm_dsi_host *msm_host) -{ - const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; - int i, ret; - - DBG("id=%d", msm_host->id); - - for (i = 0; i < cfg->num_bus_clks; i++) { - ret = clk_prepare_enable(msm_host->bus_clks[i]); - if (ret) { - pr_err("%s: failed to enable bus clock %d ret %d\n", - __func__, i, ret); - goto err; - } - } - - return 0; -err: - for (; i > 0; i--) - clk_disable_unprepare(msm_host->bus_clks[i]); - - return ret; -} - -static void dsi_bus_clk_disable(struct msm_dsi_host *msm_host) -{ - const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; - int i; - - DBG(""); - - for (i = cfg->num_bus_clks - 1; i >= 0; i--) - clk_disable_unprepare(msm_host->bus_clks[i]); -} - int msm_dsi_runtime_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); @@ -478,7 +443,7 @@ int msm_dsi_runtime_suspend(struct device *dev) if (!msm_host->cfg_hnd) return 0; - dsi_bus_clk_disable(msm_host); + clk_bulk_disable_unprepare(msm_host->num_bus_clks, msm_host->bus_clks); return 0; } @@ -493,7 +458,7 @@ int msm_dsi_runtime_resume(struct device *dev) if (!msm_host->cfg_hnd) return 0; - return dsi_bus_clk_enable(msm_host); + return clk_bulk_prepare_enable(msm_host->num_bus_clks, msm_host->bus_clks); } int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host) -- 2.33.0

3 2

[PATCH 1/2] drm/bridge: parade-ps8640: Enable runtime power management
by Philip Chen 21 Oct '21

21 Oct '21

Fit ps8640 driver into runtime power management framework: First, break _poweron() to 3 parts: (1) turn on power and wait for ps8640's internal MCU to finish init (2) check panel HPD (which is proxy by GPIO9) (3) the other configs. Runtime _resume() can be called before panel is powered, so we only add (1) to _resume() and do (2)(3) in _pre_enable(). We also add (2) to _aux_transfer() as we want to ensure panel HPD is asserted before we start AUX CH transactions. The original driver has a mysterious delay of 50 ms between (2) and (3). Since Parade's support can't explain what the delay is for, and we don't see removing the delay break any boards at hand, remove it to fit into this driver change. Besides, rename "powered" to "pre_enabled" and don't check for it in the pm_runtime calls. The pm_runtime calls are already refcounted so there's no reason to check there. The other user of "powered", _get_edid(), only cares if pre_enable() has already been called. Lastly, change some existing DRM_...() logging to dev_...() along the way, since DRM_...() seem to be deprecated in [1]. [1] https://patchwork.freedesktop.org/patch/454760/ Signed-off-by: Philip Chen <philipchen(a)chromium.org> --- drivers/gpu/drm/bridge/parade-ps8640.c | 177 ++++++++++++++----------- 1 file changed, 103 insertions(+), 74 deletions(-) diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c index 3aaa90913bf8..acfe1bf0f936 100644 --- a/drivers/gpu/drm/bridge/parade-ps8640.c +++ b/drivers/gpu/drm/bridge/parade-ps8640.c @@ -9,6 +9,7 @@ #include <linux/i2c.h> #include <linux/module.h> #include <linux/of_graph.h> +#include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> @@ -100,7 +101,7 @@ struct ps8640 { struct regulator_bulk_data supplies[2]; struct gpio_desc *gpio_reset; struct gpio_desc *gpio_powerdown; - bool powered; + bool pre_enabled; }; static const struct regmap_config ps8640_regmap_config[] = { @@ -148,6 +149,25 @@ static inline struct ps8640 *aux_to_ps8640(struct drm_dp_aux *aux) return container_of(aux, struct ps8640, aux); } +static void ps8640_ensure_hpd(struct ps8640 *ps_bridge) +{ + struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; + struct device *dev = &ps_bridge->page[PAGE2_TOP_CNTL]->dev; + int status; + int ret; + + /* + * Apparently something about the firmware in the chip signals that + * HPD goes high by reporting GPIO9 as high (even though HPD isn't + * actually connected to GPIO9). + */ + ret = regmap_read_poll_timeout(map, PAGE2_GPIO_H, status, + status & PS_GPIO9, 20 * 1000, 200 * 1000); + + if (ret < 0) + dev_warn(dev, "HPD didn't go high: %d", ret); +} + static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { @@ -171,6 +191,9 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, if (msg->address & ~SWAUX_ADDR_MASK) return -EINVAL; + pm_runtime_get_sync(dev); + ps8640_ensure_hpd(ps_bridge); + switch (request) { case DP_AUX_NATIVE_WRITE: case DP_AUX_NATIVE_READ: @@ -180,14 +203,15 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, case DP_AUX_I2C_READ: break; default: - return -EINVAL; + ret = -EINVAL; + goto exit; } ret = regmap_write(map, PAGE0_AUXCH_CFG3, AUXCH_CFG3_RESET); if (ret) { DRM_DEV_ERROR(dev, "failed to write PAGE0_AUXCH_CFG3: %d\n", ret); - return ret; + goto exit; } /* Assume it's good */ @@ -213,7 +237,7 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, DRM_DEV_ERROR(dev, "failed to write WDATA: %d\n", ret); - return ret; + goto exit; } } } @@ -228,7 +252,7 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, if (ret) { DRM_DEV_ERROR(dev, "failed to read PAGE0_SWAUX_STATUS: %d\n", ret); - return ret; + goto exit; } switch (data & SWAUX_STATUS_MASK) { @@ -250,9 +274,11 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, len = data & SWAUX_M_MASK; break; case SWAUX_STATUS_INVALID: - return -EOPNOTSUPP; + ret = -EOPNOTSUPP; + goto exit; case SWAUX_STATUS_TIMEOUT: - return -ETIMEDOUT; + ret = -ETIMEDOUT; + goto exit; } if (len && (request == DP_AUX_NATIVE_READ || @@ -264,48 +290,48 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, DRM_DEV_ERROR(dev, "failed to read RDATA: %d\n", ret); - return ret; + goto exit; } buf[i] = data; } } +exit: + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + if (ret) + return ret; return len; } -static int ps8640_bridge_vdo_control(struct ps8640 *ps_bridge, - const enum ps8640_vdo_control ctrl) +static void ps8640_bridge_vdo_control(struct ps8640 *ps_bridge, + const enum ps8640_vdo_control ctrl) { struct regmap *map = ps_bridge->regmap[PAGE3_DSI_CNTL1]; + struct device *dev = &ps_bridge->page[PAGE3_DSI_CNTL1]->dev; u8 vdo_ctrl_buf[] = { VDO_CTL_ADD, ctrl }; int ret; ret = regmap_bulk_write(map, PAGE3_SET_ADD, vdo_ctrl_buf, sizeof(vdo_ctrl_buf)); - if (ret < 0) { - DRM_ERROR("failed to %sable VDO: %d\n", - ctrl == ENABLE ? "en" : "dis", ret); - return ret; - } - - return 0; + if (ret < 0) + dev_err(dev, "failed to %sable VDO: %d\n", + ctrl == ENABLE ? "en" : "dis", ret); } -static void ps8640_bridge_poweron(struct ps8640 *ps_bridge) +static int __maybe_unused ps8640_resume(struct device *dev) { - struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; - int ret, status; - - if (ps_bridge->powered) - return; + struct ps8640 *ps_bridge = dev_get_drvdata(dev); + int ret; ret = regulator_bulk_enable(ARRAY_SIZE(ps_bridge->supplies), ps_bridge->supplies); if (ret < 0) { - DRM_ERROR("cannot enable regulators %d\n", ret); - return; + dev_err(dev, "cannot enable regulators %d\n", ret); + return ret; } gpiod_set_value(ps_bridge->gpio_powerdown, 0); @@ -319,81 +345,70 @@ static void ps8640_bridge_poweron(struct ps8640 *ps_bridge) */ msleep(200); - ret = regmap_read_poll_timeout(map, PAGE2_GPIO_H, status, - status & PS_GPIO9, 20 * 1000, 200 * 1000); - - if (ret < 0) { - DRM_ERROR("failed read PAGE2_GPIO_H: %d\n", ret); - goto err_regulators_disable; - } - - msleep(50); - - /* - * The Manufacturer Command Set (MCS) is a device dependent interface - * intended for factory programming of the display module default - * parameters. Once the display module is configured, the MCS shall be - * disabled by the manufacturer. Once disabled, all MCS commands are - * ignored by the display interface. - */ - - ret = regmap_update_bits(map, PAGE2_MCS_EN, MCS_EN, 0); - if (ret < 0) { - DRM_ERROR("failed write PAGE2_MCS_EN: %d\n", ret); - goto err_regulators_disable; - } - - /* Switch access edp panel's edid through i2c */ - ret = regmap_write(map, PAGE2_I2C_BYPASS, I2C_BYPASS_EN); - if (ret < 0) { - DRM_ERROR("failed write PAGE2_I2C_BYPASS: %d\n", ret); - goto err_regulators_disable; - } - - ps_bridge->powered = true; - - return; - -err_regulators_disable: - regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies), - ps_bridge->supplies); + return 0; } -static void ps8640_bridge_poweroff(struct ps8640 *ps_bridge) +static int __maybe_unused ps8640_suspend(struct device *dev) { + struct ps8640 *ps_bridge = dev_get_drvdata(dev); int ret; - if (!ps_bridge->powered) - return; - gpiod_set_value(ps_bridge->gpio_reset, 1); gpiod_set_value(ps_bridge->gpio_powerdown, 1); ret = regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies), ps_bridge->supplies); if (ret < 0) - DRM_ERROR("cannot disable regulators %d\n", ret); + dev_err(dev, "cannot disable regulators %d\n", ret); - ps_bridge->powered = false; + return ret; } +static const struct dev_pm_ops ps8640_pm_ops = { + SET_RUNTIME_PM_OPS(ps8640_suspend, ps8640_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) +}; + static void ps8640_pre_enable(struct drm_bridge *bridge) { struct ps8640 *ps_bridge = bridge_to_ps8640(bridge); + struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; + struct device *dev = &ps_bridge->page[PAGE0_DP_CNTL]->dev; int ret; - ps8640_bridge_poweron(ps_bridge); + pm_runtime_get_sync(dev); + ps8640_ensure_hpd(ps_bridge); - ret = ps8640_bridge_vdo_control(ps_bridge, ENABLE); + /* + * The Manufacturer Command Set (MCS) is a device dependent interface + * intended for factory programming of the display module default + * parameters. Once the display module is configured, the MCS shall be + * disabled by the manufacturer. Once disabled, all MCS commands are + * ignored by the display interface. + */ + + ret = regmap_update_bits(map, PAGE2_MCS_EN, MCS_EN, 0); + if (ret < 0) + dev_warn(dev, "failed write PAGE2_MCS_EN: %d\n", ret); + + /* Switch access edp panel's edid through i2c */ + ret = regmap_write(map, PAGE2_I2C_BYPASS, I2C_BYPASS_EN); if (ret < 0) - ps8640_bridge_poweroff(ps_bridge); + dev_warn(dev, "failed write PAGE2_MCS_EN: %d\n", ret); + + ps8640_bridge_vdo_control(ps_bridge, ENABLE); + + ps_bridge->pre_enabled = true; } static void ps8640_post_disable(struct drm_bridge *bridge) { struct ps8640 *ps_bridge = bridge_to_ps8640(bridge); + ps_bridge->pre_enabled = false; + ps8640_bridge_vdo_control(ps_bridge, DISABLE); - ps8640_bridge_poweroff(ps_bridge); + pm_runtime_put_sync(&ps_bridge->page[PAGE0_DP_CNTL]->dev); } static int ps8640_bridge_attach(struct drm_bridge *bridge, @@ -474,7 +489,7 @@ static struct edid *ps8640_bridge_get_edid(struct drm_bridge *bridge, struct drm_connector *connector) { struct ps8640 *ps_bridge = bridge_to_ps8640(bridge); - bool poweroff = !ps_bridge->powered; + bool poweroff = !ps_bridge->pre_enabled; struct edid *edid; /* @@ -512,6 +527,12 @@ static const struct drm_bridge_funcs ps8640_bridge_funcs = { .pre_enable = ps8640_pre_enable, }; +static void ps8640_runtime_disable(void *data) +{ + pm_runtime_dont_use_autosuspend(data); + pm_runtime_disable(data); +} + static int ps8640_probe(struct i2c_client *client) { struct device *dev = &client->dev; @@ -587,6 +608,13 @@ static int ps8640_probe(struct i2c_client *client) ps_bridge->aux.transfer = ps8640_aux_transfer; drm_dp_aux_init(&ps_bridge->aux); + pm_runtime_enable(dev); + pm_runtime_set_autosuspend_delay(dev, 500); + pm_runtime_use_autosuspend(dev); + ret = devm_add_action_or_reset(dev, ps8640_runtime_disable, dev); + if (ret) + return ret; + drm_bridge_add(&ps_bridge->bridge); return 0; @@ -613,6 +641,7 @@ static struct i2c_driver ps8640_driver = { .driver = { .name = "ps8640", .of_match_table = ps8640_match, + .pm = &ps8640_pm_ops, }, }; module_i2c_driver(ps8640_driver); -- 2.33.0.1079.g6e70778dc9-goog

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dri-devel October 2021