dri-devel March 2021

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867 discussions

[Bug 200695] New: Blank screen on RX 580 with amdgpu.dc=1 enabled (no displays detected)
by bugzilla-daemon＠bugzilla.kernel.org 06 Apr '21

06 Apr '21

https://bugzilla.kernel.org/show_bug.cgi?id=200695 Bug ID: 200695 Summary: Blank screen on RX 580 with amdgpu.dc=1 enabled (no displays detected) Product: Drivers Version: 2.5 Kernel Version: 4.18.0-rc7 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: claude(a)mathr.co.uk Regression: No Created attachment 277633 --> https://bugzilla.kernel.org/attachment.cgi?id=277633&action=edit dmesg after boot with amdgpu.dc=1 amdgpu.dc_log=1 drm.debug=6 When amdgpu.dc=1 is initialized at boot, the console goes blank as it thinks all displays are disconnected. Xorg is not able to enable the display either. With amdgpu.dc=0 all is fine. Tried with various (mostly Debian) kernels from 4.16 through 4.18~rc4, all have the issue. I built a 4.18~rc7 from kernel.org to rule out Debian patches being the issue and will provide logs. -- You are receiving this mail because: You are watching the assignee of the bug.

1 50

[PATCH] drm/msm/a6xx: fix for kernels without CONFIG_NVMEM
by Jonathan Marek 03 Apr '21

03 Apr '21

Ignore nvmem_cell_get() EOPNOTSUPP error in the same way as a ENOENT error, to fix the case where the kernel was compiled without CONFIG_NVMEM. Fixes: fe7952c629da ("drm/msm: Add speed-bin support to a618 gpu") Signed-off-by: Jonathan Marek <jonathan(a)marek.ca> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index ba8e9d3cf0fe..7fe5d97606aa 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1356,10 +1356,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu, cell = nvmem_cell_get(dev, "speed_bin"); /* - * -ENOENT means that the platform doesn't support speedbin which is - * fine + * -ENOENT means no speed bin in device tree, + * -EOPNOTSUPP means kernel was built without CONFIG_NVMEM */ - if (PTR_ERR(cell) == -ENOENT) + if (PTR_ERR(cell) == -ENOENT || PTR_ERR(cell) == -EOPNOTSUPP) return 0; else if (IS_ERR(cell)) { DRM_DEV_ERROR(dev, -- 2.26.1

5 15

[PATCH] zero-fill colormap in drivers/video/fbdev/core/fbcmap.c
by Phillip Potter 02 Apr '21

02 Apr '21

Use kzalloc() rather than kmalloc() for the dynamically allocated parts of the colormap in fb_alloc_cmap_gfp, to prevent a leak of random kernel data to userspace under certain circumstances. Fixes a KMSAN-found infoleak bug reported by syzbot at: https://syzkaller.appspot.com/bug?id=741578659feabd108ad9e06696f0c1f2e69c4b… Reported-by: syzbot+47fa9c9c648b765305b9(a)syzkaller.appspotmail.com Signed-off-by: Phillip Potter <phil(a)philpotter.co.uk> --- drivers/video/fbdev/core/fbcmap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/video/fbdev/core/fbcmap.c b/drivers/video/fbdev/core/fbcmap.c index 757d5c3f620b..ff09e57f3c38 100644 --- a/drivers/video/fbdev/core/fbcmap.c +++ b/drivers/video/fbdev/core/fbcmap.c @@ -101,17 +101,17 @@ int fb_alloc_cmap_gfp(struct fb_cmap *cmap, int len, int transp, gfp_t flags) if (!len) return 0; - cmap->red = kmalloc(size, flags); + cmap->red = kzalloc(size, flags); if (!cmap->red) goto fail; - cmap->green = kmalloc(size, flags); + cmap->green = kzalloc(size, flags); if (!cmap->green) goto fail; - cmap->blue = kmalloc(size, flags); + cmap->blue = kzalloc(size, flags); if (!cmap->blue) goto fail; if (transp) { - cmap->transp = kmalloc(size, flags); + cmap->transp = kzalloc(size, flags); if (!cmap->transp) goto fail; } else { -- 2.30.2

3 3

[PATCH 0/2] drm/msm: Fixes/updates for perfetto profiling
by Rob Clark 02 Apr '21

02 Apr '21

From: Rob Clark <robdclark(a)chromium.org> A couple kernel side things I realized I needed in the process of implementing performance-counter and render-stage support for perfetto, the first patch fixes the MSM_PARAM_TIMESTAMP query which was just wrong on a5xx/a6xx (ALWAYS_COUNT vs ALWAYS_ON). The second adds a way for userspace to determine whether the device has suspended since the last sampling period (which means counters have lost their state and configuration). I am a bit tempted to add a way that a CAP_SYS_ADMIN user could ask the GPU to not suspend (until the drm_file is closed), but so far I've managed to avoid needing this. Rob Clark (2): drm/msm: Fix a5xx/a6xx timestamps drm/msm: Add param for userspace to query suspend count drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +++ drivers/gpu/drm/msm/msm_drv.c | 1 + drivers/gpu/drm/msm/msm_gpu.c | 2 ++ drivers/gpu/drm/msm/msm_gpu.h | 2 ++ include/uapi/drm/msm_drm.h | 1 + 7 files changed, 13 insertions(+), 4 deletions(-) -- 2.29.2

2 4

[v1] drm/msm/disp/dpu1: fix warn stack reported during dpu resume
by Kalyan Thota 02 Apr '21

02 Apr '21

WARN_ON was introduced by the below commit to catch runtime resumes that are getting triggered before icc path was set. "drm/msm/disp/dpu1: icc path needs to be set before dpu runtime resume" For the targets where the bw scaling is not enabled, this WARN_ON is a false alarm. Fix the WARN condition appropriately. Reported-by: Steev Klimaszewski <steev(a)kali.org> Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 +++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 9 +++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 11 ++++++----- 3 files changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index cab387f..0071a4d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -294,6 +294,9 @@ static int dpu_kms_parse_data_bus_icc_path(struct dpu_kms *dpu_kms) struct icc_path *path1; struct drm_device *dev = dpu_kms->dev; + if (!dpu_supports_bw_scaling(dev)) + return 0; + path0 = of_icc_get(dev->dev, "mdp0-mem"); path1 = of_icc_get(dev->dev, "mdp1-mem"); @@ -934,8 +937,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) DPU_DEBUG("REG_DMA is not defined"); } - if (of_device_is_compatible(dev->dev->of_node, "qcom,sc7180-mdss")) - dpu_kms_parse_data_bus_icc_path(dpu_kms); + dpu_kms_parse_data_bus_icc_path(dpu_kms); pm_runtime_get_sync(&dpu_kms->pdev->dev); @@ -1198,7 +1200,7 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) ddev = dpu_kms->dev; - WARN_ON(!(dpu_kms->num_paths)); + WARN_ON((dpu_supports_bw_scaling(ddev) && !dpu_kms->num_paths)); /* Min vote of BW is required before turning on AXI clk */ for (i = 0; i < dpu_kms->num_paths; i++) icc_set_bw(dpu_kms->path[i], 0, Bps_to_icc(MIN_IB_BW)); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index d6717d6..f7bcc0a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -154,6 +154,15 @@ struct vsync_info { #define to_dpu_global_state(x) container_of(x, struct dpu_global_state, base) +/** + * dpu_supports_bw_scaling: returns true for drivers that support bw scaling. + * @dev: Pointer to drm_device structure + */ +static inline int dpu_supports_bw_scaling(struct drm_device *dev) +{ + return of_device_is_compatible(dev->dev->of_node, "qcom,sc7180-mdss"); +} + /* Global private object state for tracking resources that are shared across * multiple kms objects (planes/crtcs/etc). */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c index cd40788..8cd712c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c @@ -41,6 +41,9 @@ static int dpu_mdss_parse_data_bus_icc_path(struct drm_device *dev, struct icc_path *path0 = of_icc_get(dev->dev, "mdp0-mem"); struct icc_path *path1 = of_icc_get(dev->dev, "mdp1-mem"); + if (dpu_supports_bw_scaling(dev)) + return 0; + if (IS_ERR_OR_NULL(path0)) return PTR_ERR_OR_ZERO(path0); @@ -276,11 +279,9 @@ int dpu_mdss_init(struct drm_device *dev) DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio); - if (!of_device_is_compatible(dev->dev->of_node, "qcom,sc7180-mdss")) { - ret = dpu_mdss_parse_data_bus_icc_path(dev, dpu_mdss); - if (ret) - return ret; - } + ret = dpu_mdss_parse_data_bus_icc_path(dev, dpu_mdss); + if (ret) + return ret; mp = &dpu_mdss->mp; ret = msm_dss_parse_clock(pdev, mp); -- 2.7.4

5 7

[PATCH v6 0/5] Add MIPI rx DPI support
by Xin Ji 02 Apr '21

02 Apr '21

Hi all, this patch series implement MIPI rx DPI feature. Please help to review. This is the v6 version, any mistakes, please let me know, I'll fix it in the next series. Change history: v6: Fix kernel robot compile warning v5: Fix Rob Herring, Hsin-Yi, Robert Foss comments - Rebase code on the branch 'drm-misc-next', refer video-interfaces.yaml - Seprate HDCP function to a new patch - Fix driver not correctly get 'bus-type' 'data-lanes' - Add audio HDMI codec function support v4: Fix Rob Herring comment - Rebase code on the branch 'drm-misc-next' - Change 'analogix,hdcp-support' type to boolean v3: Fix Rob Herring, Dan Carpenter, Nicolas comment - Split the patch, fix not correct return data - Fix several coding format - Split DP tx swing register setting to two property - Add HDCP support vender flag - remove 'analogix,swing-setting' and 'analogix,mipi-dpi-in' property v2: Fix Rob Herring comment - Fix yamllint warnings/errors in analogix,anx7625.yaml - Fix kernel robot compile warning v1: initial MIPI rx DPI feature support Xin Ji (5): dt-bindings:drm/bridge:anx7625:add vendor define flags drm/bridge: anx7625: fix not correct return value drm/bridge: anx7625: add MIPI DPI input feature support drm/bridge: anx7625: add HDCP support drm/bridge: anx7625: add HDMI audio function .../display/bridge/analogix,anx7625.yaml | 58 +- drivers/gpu/drm/bridge/analogix/anx7625.c | 603 ++++++++++++++++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 59 +- 3 files changed, 667 insertions(+), 53 deletions(-) -- 2.25.1

4 18

[PATCH] drm/ttm: add __user annotation in radeon_ttm_vram_read
by Rasmus Villemoes 01 Apr '21

01 Apr '21

Keep sparse happy by preserving the __user annotation when casting. Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Rasmus Villemoes <linux(a)rasmusvillemoes.dk> --- kernel test robot has already started spamming me due to 9c5743dff. If I don't fix those warnings I'll keep getting those emails for months, so let me do the easy ones. drivers/gpu/drm/radeon/radeon_ttm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 36150b7f31a90aa1eece..ecfe88b0a35d8f317712 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -1005,7 +1005,7 @@ static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, value = RREG32(RADEON_MM_DATA); spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); - r = put_user(value, (uint32_t *)buf); + r = put_user(value, (uint32_t __user *)buf); if (r) return r; -- 2.23.0

3 2

[PATCH] amd/amdgpu: code refactoring to clean code style a bit
by Bernard Zhao 01 Apr '21

01 Apr '21

Fix checkpatch.pl warning: Too many leading tabs - consider code refactoring WARNING: Too many leading tabs - consider code refactoring + for (j = 0; j < profile->ucLeakageBinNum; j++) { WARNING: Too many leading tabs - consider code refactoring + if (vbios_voltage_id <= leakage_bin[j]) { WARNING: Too many leading tabs - consider code refactoring + for (j = 0; j < profile->ucLeakageBinNum; j++) { WARNING: Too many leading tabs - consider code refactoring + if (vbios_voltage_id <= leakage_bin[j]) { Signed-off-by: Bernard Zhao <bernard(a)vivo.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 84 ++++++++------------ 1 file changed, 35 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c index 86add0f4ea4d..9968ff8ddc9c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c @@ -1283,65 +1283,51 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_devic profile = (ATOM_ASIC_PROFILING_INFO_V2_1 *) (adev->mode_info.atom_context->bios + data_offset); - switch (frev) { - case 1: + if ((frev != 2) || (crev != 1)) { + DRM_ERROR("Unknown table version %d, %d\n", frev, crev); return -EINVAL; - case 2: - switch (crev) { - case 1: - if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1)) - return -EINVAL; - leakage_bin = (u16 *) - (adev->mode_info.atom_context->bios + data_offset + - le16_to_cpu(profile->usLeakageBinArrayOffset)); - vddc_id_buf = (u16 *) - (adev->mode_info.atom_context->bios + data_offset + - le16_to_cpu(profile->usElbVDDC_IdArrayOffset)); - vddc_buf = (u16 *) - (adev->mode_info.atom_context->bios + data_offset + - le16_to_cpu(profile->usElbVDDC_LevelArrayOffset)); - vddci_id_buf = (u16 *) - (adev->mode_info.atom_context->bios + data_offset + - le16_to_cpu(profile->usElbVDDCI_IdArrayOffset)); - vddci_buf = (u16 *) - (adev->mode_info.atom_context->bios + data_offset + - le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset)); - - if (profile->ucElbVDDC_Num > 0) { - for (i = 0; i < profile->ucElbVDDC_Num; i++) { - if (vddc_id_buf[i] == virtual_voltage_id) { - for (j = 0; j < profile->ucLeakageBinNum; j++) { - if (vbios_voltage_id <= leakage_bin[j]) { - *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i]; - break; - } - } + } + + if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1)) + return -EINVAL; + + leakage_bin = (u16 *)(adev->mode_info.atom_context->bios + data_offset + + le16_to_cpu(profile->usLeakageBinArrayOffset)); + vddc_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset + + le16_to_cpu(profile->usElbVDDC_IdArrayOffset)); + vddc_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset + + le16_to_cpu(profile->usElbVDDC_LevelArrayOffset)); + vddci_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset + + le16_to_cpu(profile->usElbVDDCI_IdArrayOffset)); + vddci_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset + + le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset)); + + if (profile->ucElbVDDC_Num > 0) { + for (i = 0; i < profile->ucElbVDDC_Num; i++) { + if (vddc_id_buf[i] == virtual_voltage_id) { + for (j = 0; j < profile->ucLeakageBinNum; j++) { + if (vbios_voltage_id <= leakage_bin[j]) { + *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i]; break; } } + break; } - if (profile->ucElbVDDCI_Num > 0) { - for (i = 0; i < profile->ucElbVDDCI_Num; i++) { - if (vddci_id_buf[i] == virtual_voltage_id) { - for (j = 0; j < profile->ucLeakageBinNum; j++) { - if (vbios_voltage_id <= leakage_bin[j]) { - *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i]; - break; - } - } + } + } + + if (profile->ucElbVDDCI_Num > 0) { + for (i = 0; i < profile->ucElbVDDCI_Num; i++) { + if (vddci_id_buf[i] == virtual_voltage_id) { + for (j = 0; j < profile->ucLeakageBinNum; j++) { + if (vbios_voltage_id <= leakage_bin[j]) { + *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i]; break; } } + break; } - break; - default: - DRM_ERROR("Unknown table version %d, %d\n", frev, crev); - return -EINVAL; } - break; - default: - DRM_ERROR("Unknown table version %d, %d\n", frev, crev); - return -EINVAL; } return 0; -- 2.31.0

2 1

[PATCH] drm/amd: cleanup coding style a bit
by Bernard Zhao 01 Apr '21

01 Apr '21

Fix patch check warning: WARNING: suspect code indent for conditional statements (8, 17) + if (obj && obj->use < 0) { + DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name); WARNING: braces {} are not necessary for single statement blocks + if (obj && obj->use < 0) { + DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name); + } Signed-off-by: Bernard Zhao <bernard(a)vivo.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 1fb2a91ad30a..43d17b72c265 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -449,11 +449,10 @@ static ssize_t amdgpu_ras_sysfs_read(struct device *dev, static inline void put_obj(struct ras_manager *obj) { - if (obj && --obj->use == 0) + if (obj && (--obj->use == 0)) list_del(&obj->node); - if (obj && obj->use < 0) { - DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name); - } + if (obj && (obj->use < 0)) + DRM_ERROR("RAS ERROR: Unbalance obj(%s) use\n", obj->head.name); } /* make one obj and return it. */ -- 2.31.0

2 1

[PATCH] drm/amd: use kmalloc_array over kmalloc with multiply
by Bernard Zhao 01 Apr '21

01 Apr '21

Fix patch check warning: WARNING: Prefer kmalloc_array over kmalloc with multiply + buf = kmalloc(MAX_KFIFO_SIZE * sizeof(*buf), GFP_KERNEL); Signed-off-by: Bernard Zhao <bernard(a)vivo.com> --- drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c index 17d1736367ea..246522423559 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c @@ -81,7 +81,7 @@ static ssize_t kfd_smi_ev_read(struct file *filep, char __user *user, struct kfd_smi_client *client = filep->private_data; unsigned char *buf; - buf = kmalloc(MAX_KFIFO_SIZE * sizeof(*buf), GFP_KERNEL); + buf = kmalloc_array(MAX_KFIFO_SIZE, sizeof(*buf), GFP_KERNEL); if (!buf) return -ENOMEM; -- 2.31.0

2 1

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dri-devel March 2021