dri-devel June 2021

dri-devel@lists.freedesktop.org

341 participants
878 discussions

[PATCH] drm/nouveau/gk20a: fix NULL dereference on allocation failure
by Mikko Perttunen 11 Jun '21

11 Jun '21

If memory allocation fails, `node->base.imem` does not get populated, causing a NULL pointer dereference on instobj destruction. Fix this by dereferencing it only if the allocation was successful. Signed-off-by: Mikko Perttunen <mperttunen(a)nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c index 648ecf5a8fbc..66d60d8bec60 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c @@ -296,12 +296,12 @@ gk20a_instobj_dtor_dma(struct nvkm_memory *memory) { struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory); struct gk20a_instmem *imem = node->base.imem; - struct device *dev = imem->base.subdev.device->dev; if (unlikely(!node->base.vaddr)) goto out; - dma_free_attrs(dev, (u64)node->base.mn->length << PAGE_SHIFT, + dma_free_attrs(imem->base.subdev.device->dev, + (u64)node->base.mn->length << PAGE_SHIFT, node->base.vaddr, node->handle, imem->attrs); out: -- 2.30.1

1 0

[PATCH 1/4] drm/ttm: add a pointer to the allocating BO into ttm_resource
by Christian König 11 Jun '21

11 Jun '21

We are going to need this for the next patch and it allows us to clean up amdgpu as well. Signed-off-by: Christian König <christian.koenig(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 47 ++++++++------------- drivers/gpu/drm/ttm/ttm_resource.c | 1 + include/drm/ttm/ttm_resource.h | 1 + 3 files changed, 19 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c index 194f9eecf89c..8e3f5da44e4f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c @@ -26,23 +26,12 @@ #include "amdgpu.h" -struct amdgpu_gtt_node { - struct ttm_buffer_object *tbo; - struct ttm_range_mgr_node base; -}; - static inline struct amdgpu_gtt_mgr * to_gtt_mgr(struct ttm_resource_manager *man) { return container_of(man, struct amdgpu_gtt_mgr, manager); } -static inline struct amdgpu_gtt_node * -to_amdgpu_gtt_node(struct ttm_resource *res) -{ - return container_of(res, struct amdgpu_gtt_node, base.base); -} - /** * DOC: mem_info_gtt_total * @@ -107,9 +96,9 @@ const struct attribute_group amdgpu_gtt_mgr_attr_group = { */ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res) { - struct amdgpu_gtt_node *node = to_amdgpu_gtt_node(res); + struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res); - return drm_mm_node_allocated(&node->base.mm_nodes[0]); + return drm_mm_node_allocated(&node->mm_nodes[0]); } /** @@ -129,7 +118,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, { struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); uint32_t num_pages = PFN_UP(tbo->base.size); - struct amdgpu_gtt_node *node; + struct ttm_range_mgr_node *node; int r; spin_lock(&mgr->lock); @@ -141,19 +130,17 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, atomic64_sub(num_pages, &mgr->available); spin_unlock(&mgr->lock); - node = kzalloc(struct_size(node, base.mm_nodes, 1), GFP_KERNEL); + node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL); if (!node) { r = -ENOMEM; goto err_out; } - node->tbo = tbo; - ttm_resource_init(tbo, place, &node->base.base); - + ttm_resource_init(tbo, place, &node->base); if (place->lpfn) { spin_lock(&mgr->lock); r = drm_mm_insert_node_in_range(&mgr->mm, - &node->base.mm_nodes[0], + &node->mm_nodes[0], num_pages, tbo->page_alignment, 0, place->fpfn, place->lpfn, DRM_MM_INSERT_BEST); @@ -161,14 +148,14 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, if (unlikely(r)) goto err_free; - node->base.base.start = node->base.mm_nodes[0].start; + node->base.start = node->mm_nodes[0].start; } else { - node->base.mm_nodes[0].start = 0; - node->base.mm_nodes[0].size = node->base.base.num_pages; - node->base.base.start = AMDGPU_BO_INVALID_OFFSET; + node->mm_nodes[0].start = 0; + node->mm_nodes[0].size = node->base.num_pages; + node->base.start = AMDGPU_BO_INVALID_OFFSET; } - *res = &node->base.base; + *res = &node->base; return 0; err_free: @@ -191,12 +178,12 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man, struct ttm_resource *res) { - struct amdgpu_gtt_node *node = to_amdgpu_gtt_node(res); + struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res); struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); spin_lock(&mgr->lock); - if (drm_mm_node_allocated(&node->base.mm_nodes[0])) - drm_mm_remove_node(&node->base.mm_nodes[0]); + if (drm_mm_node_allocated(&node->mm_nodes[0])) + drm_mm_remove_node(&node->mm_nodes[0]); spin_unlock(&mgr->lock); atomic64_add(res->num_pages, &mgr->available); @@ -228,14 +215,14 @@ uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man) int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man) { struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); - struct amdgpu_gtt_node *node; + struct ttm_range_mgr_node *node; struct drm_mm_node *mm_node; int r = 0; spin_lock(&mgr->lock); drm_mm_for_each_node(mm_node, &mgr->mm) { - node = container_of(mm_node, typeof(*node), base.mm_nodes[0]); - r = amdgpu_ttm_recover_gart(node->tbo); + node = container_of(mm_node, typeof(*node), mm_nodes[0]); + r = amdgpu_ttm_recover_gart(node->base.bo); if (r) break; } diff --git a/drivers/gpu/drm/ttm/ttm_resource.c b/drivers/gpu/drm/ttm/ttm_resource.c index 2431717376e7..7ff6194154fe 100644 --- a/drivers/gpu/drm/ttm/ttm_resource.c +++ b/drivers/gpu/drm/ttm/ttm_resource.c @@ -41,6 +41,7 @@ void ttm_resource_init(struct ttm_buffer_object *bo, res->bus.offset = 0; res->bus.is_iomem = false; res->bus.caching = ttm_cached; + res->bo = bo; } EXPORT_SYMBOL(ttm_resource_init); diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h index 140b6b9a8bbe..6d0b7a6d2169 100644 --- a/include/drm/ttm/ttm_resource.h +++ b/include/drm/ttm/ttm_resource.h @@ -171,6 +171,7 @@ struct ttm_resource { uint32_t mem_type; uint32_t placement; struct ttm_bus_placement bus; + struct ttm_buffer_object *bo; }; /** -- 2.25.1

2 6

[PATCH -next] drm/panfrost: Fix missing clk_disable_unprepare() on error in panfrost_clk_init()
by Wei Yongjun 11 Jun '21

11 Jun '21

Fix the missing clk_disable_unprepare() before return from panfrost_clk_init() in the error handling case. Fixes: b681af0bc1cc ("drm: panfrost: add optional bus_clock") Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1(a)huawei.com> --- drivers/gpu/drm/panfrost/panfrost_device.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index 125ed973feaa..a2a09c51eed7 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -54,7 +54,8 @@ static int panfrost_clk_init(struct panfrost_device *pfdev) if (IS_ERR(pfdev->bus_clock)) { dev_err(pfdev->dev, "get bus_clock failed %ld\n", PTR_ERR(pfdev->bus_clock)); - return PTR_ERR(pfdev->bus_clock); + err = PTR_ERR(pfdev->bus_clock); + goto disable_clock; } if (pfdev->bus_clock) {

2 1

[PATCH] drm/amd/display: Remove unnecessary SIGNAL_TYPE_HDMI_TYPE_A check
by Werner Sembach 11 Jun '21

11 Jun '21

Remove unnecessary SIGNAL_TYPE_HDMI_TYPE_A check that was performed in the drm_mode_is_420_only() case, but not in the drm_mode_is_420_also() && force_yuv420_output case. Without further knowledge if YCbCr 4:2:0 is supported outside of HDMI, there is no reason to use RGB when the display reports drm_mode_is_420_only() even on a non HDMI connection. This patch also moves both checks in the same if-case. This eliminates an extra else-if-case. Signed-off-by: Werner Sembach <wse(a)tuxedocomputers.com> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 652cc1a0e450..dc18e6c2e698 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -5163,10 +5163,7 @@ static void fill_stream_properties_from_drm_display_mode( timing_out->v_border_bottom = 0; /* TODO: un-hardcode */ if (drm_mode_is_420_only(info, mode_in) - && stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) - timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR420; - else if (drm_mode_is_420_also(info, mode_in) - && aconnector->force_yuv420_output) + || (drm_mode_is_420_also(info, mode_in) && aconnector->force_yuv420_output)) timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR420; else if ((connector->display_info.color_formats & DRM_COLOR_FORMAT_YCRCB444) && stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) -- 2.31.1

1 0

[PATCH 00/11] ingenic-drm cleanups and doublescan feature
by Paul Cercueil 11 Jun '21

11 Jun '21

Hi, Here is a set of 11 patches for the ingenic-drm driver. Patches 1-7 are mostly generic cleanups, which will grease up the way for bigger changes to be introduced. Patch 3 adds support for a private state structure, which is then used to store state-specific information, which was previously stored in the driver's private structure directly. Patch 10 is the big one; it adds a double-scan feature emulated with DMA descriptors. This trick makes it possible to support a handful of boards which have strange panels with non-square pixels (320x480 4:3). Patch 11 updates the driver to support one top-level bridge per encoder, as it seems to be the norm now. Cheers, -Paul Paul Cercueil (11): drm/ingenic: Remove dead code drm/ingenic: Simplify code by using hwdescs array drm/ingenic: Add support for private objects drm/ingenic: Move no_vblank to private state drm/ingenic: Move IPU scale settings to private state drm/ingenic: Set DMA descriptor chain register when starting CRTC drm/ingenic: Upload palette before frame drm/ingenic: Support custom GEM object drm/ingenic: Add ingenic_drm_gem_fb_destroy() function drm/ingenic: Add doublescan feature drm/ingenic: Attach bridge chain to encoders drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 414 ++++++++++++++++++---- drivers/gpu/drm/ingenic/ingenic-ipu.c | 127 ++++++- 2 files changed, 458 insertions(+), 83 deletions(-) -- 2.30.2

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[PATCH v4 00/17] drm/i915: Introduce Intel PXP
by Daniele Ceraolo Spurio 11 Jun '21

11 Jun '21

PXP (Protected Xe Path) is an i915 component, available on GEN12+, that helps to establish the hardware protected session and manage the status of the alive software session, as well as its life cycle. Several minor changes and fixes, but the main changes in v4 are: - Rebased to new create_ext ioctl implementation - Default kconfig option is now N. - The default session is now only started when protected objects are submitted via execbuf. Tested with: https://patchwork.freedesktop.org/series/87570/ Cc: Gaurav Kumar <kumar.gaurav(a)intel.com> Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Juston Li <juston.li(a)intel.com> Cc: Alan Previn <alan.previn.teres.alexis(a)intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin(a)intel.com> Cc: Jason Ekstrand <jason(a)jlekstrand.net> Cc: Daniel Vetter <daniel.vetter(a)intel.com> Anshuman Gupta (2): drm/i915/pxp: Add plane decryption support drm/i915/pxp: black pixels on pxp disabled Bommu Krishnaiah (1): drm/i915/pxp: User interface for Protected buffer Chris Wilson (1): drm/i915/gt: Export the pinned context constructor and destructor Daniele Ceraolo Spurio (7): drm/i915/pxp: Define PXP component interface drm/i915/pxp: define PXP device flag and kconfig drm/i915/pxp: allocate a vcs context for pxp usage drm/i915/pxp: set KCR reg init drm/i915/pxp: interface for marking contexts as using protected content drm/i915/pxp: start the arb session on demand drm/i915/pxp: enable PXP for integrated Gen12 Huang, Sean Z (5): drm/i915/pxp: Implement funcs to create the TEE channel drm/i915/pxp: Create the arbitrary session after boot drm/i915/pxp: Implement arb session teardown drm/i915/pxp: Implement PXP irq handler drm/i915/pxp: Enable PXP power management Vitaly Lubart (1): mei: pxp: export pavp client to me client bus drivers/gpu/drm/i915/Kconfig | 11 + drivers/gpu/drm/i915/Makefile | 9 + .../gpu/drm/i915/display/intel_atomic_plane.c | 25 ++ drivers/gpu/drm/i915/display/intel_display.c | 4 + .../drm/i915/display/intel_display_types.h | 6 + .../drm/i915/display/skl_universal_plane.c | 49 +++- drivers/gpu/drm/i915/gem/i915_gem_context.c | 59 +++- drivers/gpu/drm/i915/gem/i915_gem_context.h | 18 ++ .../gpu/drm/i915/gem/i915_gem_context_types.h | 2 + drivers/gpu/drm/i915/gem/i915_gem_create.c | 26 ++ .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 35 +++ drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 + drivers/gpu/drm/i915/gem/i915_gem_object.h | 12 + .../gpu/drm/i915/gem/i915_gem_object_types.h | 13 + drivers/gpu/drm/i915/gt/intel_engine.h | 12 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 29 +- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 +- drivers/gpu/drm/i915/gt/intel_gt.c | 5 + drivers/gpu/drm/i915/gt/intel_gt_irq.c | 7 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 15 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + drivers/gpu/drm/i915/i915_drv.c | 2 + drivers/gpu/drm/i915/i915_drv.h | 4 + drivers/gpu/drm/i915/i915_pci.c | 2 + drivers/gpu/drm/i915/i915_reg.h | 48 ++++ drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 266 ++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 65 +++++ drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 140 +++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h | 15 + drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 100 +++++++ drivers/gpu/drm/i915/pxp/intel_pxp_irq.h | 32 +++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 40 +++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 23 ++ drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 172 +++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_session.h | 15 + drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 161 +++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 17 ++ .../drm/i915/pxp/intel_pxp_tee_interface.h | 37 +++ drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 53 ++++ drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 + drivers/misc/mei/pxp/Kconfig | 13 + drivers/misc/mei/pxp/Makefile | 7 + drivers/misc/mei/pxp/mei_pxp.c | 233 +++++++++++++++ drivers/misc/mei/pxp/mei_pxp.h | 18 ++ include/drm/i915_component.h | 1 + include/drm/i915_pxp_tee_interface.h | 45 +++ include/uapi/drm/i915_drm.h | 62 +++- 49 files changed, 1922 insertions(+), 21 deletions(-) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_irq.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_session.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_session.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_types.h create mode 100644 drivers/misc/mei/pxp/Kconfig create mode 100644 drivers/misc/mei/pxp/Makefile create mode 100644 drivers/misc/mei/pxp/mei_pxp.c create mode 100644 drivers/misc/mei/pxp/mei_pxp.h create mode 100644 include/drm/i915_pxp_tee_interface.h -- 2.29.2

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[PATCH] drm: Lock pointer access in drm_master_release()
by Desmond Cheong Zhi Xi 11 Jun '21

11 Jun '21

This patch eliminates the following smatch warning: drivers/gpu/drm/drm_auth.c:320 drm_master_release() warn: unlocked access 'master' (line 318) expected lock '&dev->master_mutex' The 'file_priv->master' field should be protected by the mutex lock to '&dev->master_mutex'. This is because other processes can concurrently modify this field and free the current 'file_priv->master' pointer. This could result in a use-after-free error when 'master' is dereferenced in subsequent function calls to 'drm_legacy_lock_master_cleanup()' or to 'drm_lease_revoke()'. An example of a scenario that would produce this error can be seen from a similar bug in 'drm_getunique()' that was reported by Syzbot: https://syzkaller.appspot.com/bug?id=148d2f1dfac64af52ffd27b661981a540724f8… In the Syzbot report, another process concurrently acquired the device's master mutex in 'drm_setmaster_ioctl()', then overwrote 'fpriv->master' in 'drm_new_set_master()'. The old value of 'fpriv->master' was subsequently freed before the mutex was unlocked. Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Signed-off-by: Desmond Cheong Zhi Xi <desmondcheongzx(a)gmail.com> --- drivers/gpu/drm/drm_auth.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index f00e5abdbbf4..b59b26a71ad5 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -315,9 +315,10 @@ int drm_master_open(struct drm_file *file_priv) void drm_master_release(struct drm_file *file_priv) { struct drm_device *dev = file_priv->minor->dev; - struct drm_master *master = file_priv->master; + struct drm_master *master; mutex_lock(&dev->master_mutex); + master = file_priv->master; if (file_priv->magic) idr_remove(&file_priv->master->magic_map, file_priv->magic); -- 2.25.1

3 7

[PATCH 0/1] Relax CTB response timeout
by Matthew Brost 11 Jun '21

11 Jun '21

A previous version of patch [1] was NACK'd because it introduced a Kconfig option. We agreed on a larger timeout value if problems were shown with the current timeout value. A problem was shown in CI [2], let's increase the timeout. [1] https://patchwork.freedesktop.org/patch/436623/ [2] https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7775/fi-cfl-8700k/igt@kms_p… Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> Matthew Brost (1): drm/i915/guc: Relax CTB response timeout drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.28.0

2 2

[PULL] drm-misc-next
by Thomas Zimmermann 11 Jun '21

11 Jun '21

Hi Dave and Daniel, here's the second PR for drm-misc-next for this week, and the final one for 5.14. I backmerged drm-next for the TTM changes. As for highlights nouveau now has eDP backlight support and udmabuf supports huge pages. Best regards Thomas drm-misc-next-2021-06-10: drm-misc-next for 5.14: UAPI Changes: Cross-subsystem Changes: * dma-buf: Support huge pages in udmabuf Core Changes: * Backmerge of drm/drm-next * drm/dp: Import eDP backlight code from i915 Driver Changes: * drm/bridge: TI SN65DSI83: Fix sparse warnings * drm/i915: Cleanup eDP backlight code before moving it into helper * drm/nouveau: Support DPCD backlights; Fix GEM init for internal BOs The following changes since commit c707b73f0cfb1acc94a20389aecde65e6385349b: Merge tag 'amd-drm-next-5.14-2021-06-09' of https://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-06-10 13:47:13 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2021-06-10 for you to fetch changes up to 86441fa29e57940eeb00f35fefb1853c1fbe67bb: Merge drm/drm-next into drm-misc-next (2021-06-10 12:18:54 +0200) ---------------------------------------------------------------- drm-misc-next for 5.14: UAPI Changes: Cross-subsystem Changes: * dma-buf: Support huge pages in udmabuf Core Changes: * Backmerge of drm/drm-next * drm/dp: Import eDP backlight code from i915 Driver Changes: * drm/bridge: TI SN65DSI83: Fix sparse warnings * drm/i915: Cleanup eDP backlight code before moving it into helper * drm/nouveau: Support DPCD backlights; Fix GEM init for internal BOs ---------------------------------------------------------------- Christian König (1): drm/nouveau: init the base GEM fields for internal BOs Lyude Paul (9): drm/i915/dpcd_bl: Remove redundant AUX backlight frequency calculations drm/i915/dpcd_bl: Handle drm_dpcd_read/write() return values correctly drm/i915/dpcd_bl: Cleanup intel_dp_aux_vesa_enable_backlight() a bit drm/i915/dpcd_bl: Cache some backlight capabilities in intel_panel.backlight drm/i915/dpcd_bl: Move VESA backlight enabling code closer together drm/i915/dpcd_bl: Return early in vesa_calc_max_backlight if we can't read PWMGEN_BIT_COUNT drm/i915/dpcd_bl: Print return codes for VESA backlight failures drm/dp: Extract i915's eDP backlight code into DRM helpers drm/nouveau/kms/nv50-: Add basic DPCD backlight support for nouveau Marek Vasut (1): drm/bridge: ti-sn65dsi83: Fix sparse warnings Thomas Zimmermann (1): Merge drm/drm-next into drm-misc-next Vivek Kasireddy (1): udmabuf: Add support for mapping hugepages (v4) drivers/dma-buf/udmabuf.c | 50 ++- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 21 +- drivers/gpu/drm/drm_dp_helper.c | 347 +++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 329 +++---------------- drivers/gpu/drm/nouveau/dispnv50/disp.c | 28 ++ drivers/gpu/drm/nouveau/nouveau_backlight.c | 166 +++++++++- drivers/gpu/drm/nouveau/nouveau_bo.c | 6 + drivers/gpu/drm/nouveau/nouveau_connector.h | 9 +- drivers/gpu/drm/nouveau/nouveau_encoder.h | 1 + include/drm/drm_dp_helper.h | 48 +++ 11 files changed, 682 insertions(+), 325 deletions(-) -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer

2 2

[PATCH] drm/i915: Add relocation exceptions for two other platforms
by Zbigniew Kempczyński 11 Jun '21

11 Jun '21

We have established previously we stop using relocations starting from gen12 platforms with Tigerlake as an exception. We keep this statement but we want to enable relocations conditionally for Alderlake S+P under require_force_probe flag set. Keeping relocations under require_force_probe flag is interim solution until IGTs will be rewritten to use softpin. v2: - remove inline from function definition (Jani) - fix indentation v3: change to GRAPHICS_VER() (Zbigniew) v4: remove RKL from flag as it is already shipped (Rodrigo) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski(a)intel.com> Cc: Dave Airlie <airlied(a)redhat.com> Cc: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Jason Ekstrand <jason(a)jlekstrand.net> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Acked-by: Dave Airlie <airlied(a)redhat.com> --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 +++++++++++++++---- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index a8abc9af5ff4..81064914640f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -491,16 +491,29 @@ eb_unreserve_vma(struct eb_vma *ev) ev->flags &= ~__EXEC_OBJECT_RESERVED; } +static bool platform_has_relocs_enabled(const struct i915_execbuffer *eb) +{ + /* + * Relocations are disallowed starting from gen12 with Tigerlake + * as an exception. We allow temporarily use relocations for Alderlake + * when require_force_probe flag is set. + */ + if (GRAPHICS_VER(eb->i915) < 12 || IS_TIGERLAKE(eb->i915)) + return true; + + if (INTEL_INFO(eb->i915)->require_force_probe && + (IS_ALDERLAKE_S(eb->i915) || IS_ALDERLAKE_P(eb->i915))) + return true; + + return false; +} + static int eb_validate_vma(struct i915_execbuffer *eb, struct drm_i915_gem_exec_object2 *entry, struct i915_vma *vma) { - /* Relocations are disallowed for all platforms after TGL-LP. This - * also covers all platforms with local memory. - */ - if (entry->relocation_count && - GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915)) + if (entry->relocation_count && !platform_has_relocs_enabled(eb)) return -EINVAL; if (unlikely(entry->flags & eb->invalid_flags)) -- 2.26.0

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dri-devel June 2021