dri-devel September 2021

dri-devel@lists.freedesktop.org

348 participants
817 discussions

[PATCH 0/4] MT8195 HDMI Tx support
by Guillaume Ranquet 01 Oct '21

01 Oct '21

This small series aims at implementing basic HDMI TX support for the MT8195 SoC family. This series has been tested on a chromium 5.10 kernel but not yet on an upstream 5.14. It builds, boots and probe on 5.14 but due to some missing dependencies in the drm chain, it couldn't be tested as of today. I'm still working to get this series fully tested on 5.14. This series is based on: - Add Mediatek Soc DRM (vdosys0) support for mt8195 https://lore.kernel.org/linux-mediatek/20210825144833.7757-… [View More]

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[PATCH v3 0/6] drm/gud: Add some more pixel formats
by Noralf Trønnes 01 Oct '21

01 Oct '21

Hi, I'd appreciate if someone could review the 3 small driver patches. Changes since version 2: - Drop the patch adding module parameter 'xrgb8888'. Both Daniel and Thomas had some comments that eventually led me to to drop this for now. Noralf. Noralf Trønnes (6): drm/fourcc: Add R8 to drm_format_info drm/format-helper: Add drm_fb_xrgb8888_to_rgb332() drm/format-helper: Add drm_fb_xrgb8888_to_rgb888() drm/gud: Add GUD_PIXEL_FORMAT_R8 drm/gud: Add GUD_PIXEL_FORMAT_RGB332 drm/… [View More]

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[PATCH] drm/panfrost: Add PANFROST_BO_NO{READ,WRITE} flags
by Boris Brezillon 01 Oct '21

01 Oct '21

So we can create GPU mappings without R/W permissions. Particularly useful to debug corruptions caused by out-of-bound writes. Signed-off-by: Boris Brezillon <boris.brezillon(a)collabora.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 14 ++++++++++++-- drivers/gpu/drm/panfrost/panfrost_gem.c | 2 ++ drivers/gpu/drm/panfrost/panfrost_gem.h | 2 ++ drivers/gpu/drm/panfrost/panfrost_mmu.c | 8 +++++++- include/uapi/drm/panfrost_drm.h | 2 ++ 5 files changed, 25 insertions(+)… [View More], 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 82ad9a67f251..40e4a4db3ab1 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -75,6 +75,10 @@ static int panfrost_ioctl_get_param(struct drm_device *ddev, void *data, struct return 0; } +#define PANFROST_BO_FLAGS \ + (PANFROST_BO_NOEXEC | PANFROST_BO_HEAP | \ + PANFROST_BO_NOREAD | PANFROST_BO_NOWRITE) + static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data, struct drm_file *file) { @@ -84,7 +88,7 @@ static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data, struct panfrost_gem_mapping *mapping; if (!args->size || args->pad || - (args->flags & ~(PANFROST_BO_NOEXEC | PANFROST_BO_HEAP))) + (args->flags & ~PANFROST_BO_FLAGS)) return -EINVAL; /* Heaps should never be executable */ @@ -92,6 +96,11 @@ static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data, !(args->flags & PANFROST_BO_NOEXEC)) return -EINVAL; + /* Executable implies readable */ + if ((args->flags & PANFROST_BO_NOREAD) && + !(args->flags & PANFROST_BO_NOEXEC)) + return -EINVAL; + bo = panfrost_gem_create_with_handle(file, dev, args->size, args->flags, &args->handle); if (IS_ERR(bo)) @@ -520,6 +529,7 @@ DEFINE_DRM_GEM_FOPS(panfrost_drm_driver_fops); * - 1.0 - initial interface * - 1.1 - adds HEAP and NOEXEC flags for CREATE_BO * - 1.2 - adds AFBC_FEATURES query + * - 1.3 - adds PANFROST_BO_NO{READ,WRITE} flags */ static const struct drm_driver panfrost_drm_driver = { .driver_features = DRIVER_RENDER | DRIVER_GEM | DRIVER_SYNCOBJ, @@ -532,7 +542,7 @@ static const struct drm_driver panfrost_drm_driver = { .desc = "panfrost DRM", .date = "20180908", .major = 1, - .minor = 2, + .minor = 3, .gem_create_object = panfrost_gem_create_object, .prime_handle_to_fd = drm_gem_prime_handle_to_fd, diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c index 23377481f4e3..d6c1bb1445f2 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.c +++ b/drivers/gpu/drm/panfrost/panfrost_gem.c @@ -251,6 +251,8 @@ panfrost_gem_create_with_handle(struct drm_file *file_priv, bo = to_panfrost_bo(&shmem->base); bo->noexec = !!(flags & PANFROST_BO_NOEXEC); + bo->noread = !!(flags & PANFROST_BO_NOREAD); + bo->nowrite = !!(flags & PANFROST_BO_NOWRITE); bo->is_heap = !!(flags & PANFROST_BO_HEAP); /* diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h index 8088d5fd8480..6246b5fef446 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.h +++ b/drivers/gpu/drm/panfrost/panfrost_gem.h @@ -37,6 +37,8 @@ struct panfrost_gem_object { atomic_t gpu_usecount; bool noexec :1; + bool noread :1; + bool nowrite :1; bool is_heap :1; }; diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c index f51d3f791a17..6a5c9d94d6f2 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -307,7 +307,7 @@ int panfrost_mmu_map(struct panfrost_gem_mapping *mapping) struct drm_gem_object *obj = &bo->base.base; struct panfrost_device *pfdev = to_panfrost_device(obj->dev); struct sg_table *sgt; - int prot = IOMMU_READ | IOMMU_WRITE; + int prot = 0; if (WARN_ON(mapping->active)) return 0; @@ -315,6 +315,12 @@ int panfrost_mmu_map(struct panfrost_gem_mapping *mapping) if (bo->noexec) prot |= IOMMU_NOEXEC; + if (!bo->nowrite) + prot |= IOMMU_WRITE; + + if (!bo->noread) + prot |= IOMMU_READ; + sgt = drm_gem_shmem_get_pages_sgt(obj); if (WARN_ON(IS_ERR(sgt))) return PTR_ERR(sgt); diff --git a/include/uapi/drm/panfrost_drm.h b/include/uapi/drm/panfrost_drm.h index 061e700dd06c..a2de81225125 100644 --- a/include/uapi/drm/panfrost_drm.h +++ b/include/uapi/drm/panfrost_drm.h @@ -86,6 +86,8 @@ struct drm_panfrost_wait_bo { #define PANFROST_BO_NOEXEC 1 #define PANFROST_BO_HEAP 2 +#define PANFROST_BO_NOREAD 4 +#define PANFROST_BO_NOWRITE 8 /** * struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs. -- 2.31.1 [View Less]

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[PATCH] drm/amdkfd: match the signatures of the real and stub kgd2kfd_probe()
by trix＠redhat.com 01 Oct '21

01 Oct '21

From: Tom Rix <trix(a)redhat.com> When CONFIG_HSA_AMD=n this there is this error amdgpu_amdkfd.c:75:56: error: incompatible type for argument 2 of ‘kgd2kfd_probe’ 75 | adev->kfd.dev = kgd2kfd_probe((struct kgd_dev *)adev, vf); amdgpu_amdkfd.h:349:17: note: declared here 349 | struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev, The signature of the stub kgd2kfd_probe() does not match the real one. So change the stub to match. Fixes: 920f37e6a3fc ("drm/… [View More]

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[PATCH 0/2] drm/i915/gt: Locking splats PREEMPT_RT
by Sebastian Andrzej Siewior 01 Oct '21

01 Oct '21

Clark Williams reported two issues with the i915 driver running on PREEMPT_RT. While #1 looks simple I have no idea about #2 thus the RFC. Sebastian

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[PATCH v3 0/4] drm/v3d: add multiple in/out syncobjs support
by Melissa Wen 01 Oct '21

01 Oct '21

Currently, v3d only supports single in/out syncobj per submission (in v3d_submit_cl, there are two in_sync, one for bin and another for render job); however, Vulkan queue submit operations expect multiples wait and signal semaphores. This series extends v3d interface and job dependency operations to handle more than one in/out syncobj. The first patch just decouples the steps to lookup and add job dependency from the job init code, since the operation repeats for every syncobj that a job … [View More]should wait before starting. So, the fourth patch of this series will reuse it to handle multiples wait for semaphores. The second patch moves job memory allocation to v3d_job_init() for any type of v3d_job-based job. The main goal is to prevent errors when handling job initialization failures (doing a proper cleanup). The third patch extends our interface by using a generic extension. This approach was inspired by i915_user_extension[1] and amd_cs_chunks[2] to give a little more flexibility in adding other submission features in the future. Therefore, the list of extensions would work as a hub of features that use an id to determine the corresponding feature data type. With this base, the fourth patch adds multiple wait/signal semaphores support. For this, we add to the list of the generic extensions a new data type (drm_v3d_multi_sync) that points to two arrays of syncobjs (in/out) and also determines (wait_stage) the job to add wait dependencies (v3d_queue). An auxiliary struct (v3d_submit_ext) is used when parsing submission extensions. Finally, we reserve some space in the semaphore struct (drm_v3d_sem) to accommodate timeline semaphores that we aim to add support soon (same reason for already defining v3d_submit_outsync). [1] https://cgit.freedesktop.org/drm/drm-misc/commit/drivers/gpu/drm/i915/i915_… [2] https://cgit.freedesktop.org/drm/drm-misc/tree/include/uapi/drm/amdgpu_drm.… In the mesa side, the work related to this series is in progress at https://gitlab.freedesktop.org/mwen/mesa/-/commit/6c340bb35203a0418af87a792… v2: - move job mem alloc to v3d_job_init (Iago) - simplify and subclass the generic extension struct (Daniel) - make job dependency conditions more understandable (Iago) v3 (Iago): - job should be initialized NULL - fix error handling for pm ops in v3d_job_init - remove irrelevant comment - fix multisync conditions to multiple vs single sempahores Melissa Wen (4): drm/v3d: decouple adding job dependencies steps from job init drm/v3d: alloc and init job in one shot drm/v3d: add generic ioctl extension drm/v3d: add multiple syncobjs support drivers/gpu/drm/v3d/v3d_drv.c | 10 +- drivers/gpu/drm/v3d/v3d_drv.h | 24 ++- drivers/gpu/drm/v3d/v3d_gem.c | 390 +++++++++++++++++++++++++--------- include/uapi/drm/v3d_drm.h | 78 +++++++ 4 files changed, 389 insertions(+), 113 deletions(-) -- 2.30.2 [View Less]

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[PATCH v3] drm/i915/ttm: Rework object initialization slightly
by Thomas Hellström 01 Oct '21

01 Oct '21

We may end up in i915_ttm_bo_destroy() in an error path before the object is fully initialized. In that case it's not correct to call __i915_gem_free_object(), because that function a) Assumes the gem object refcount is 0, which it isn't. b) frees the placements which are owned by the caller until the init_object() region ops returns successfully. Fix this by providing a lightweight cleanup function __i915_gem_object_fini() which is also called by __i915_gem_free_object(). While doing this, … [View More]also make sure we call dma_resv_fini() as part of ordinary object destruction and not from the RCU callback that frees the object. This will help track down bugs where the object is incorrectly locked from an RCU lookup. Finally, make sure the object isn't put on the region list until it's either locked or fully initialized in order to block list processing of partially initialized objects. v2: - The TTM object backend memory was freed before the gem pages were put. Separate this functionality into __i915_gem_object_pages_fini() and call it from the TTM delete_mem_notify() callback. v3: - Include i915_gem_object_free_mmaps() in __i915_gem_object_pages_fini() to make sure we don't inadvertedly introduce a race. Signed-off-by: Thomas Hellström <thomas.hellstrom(a)linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld(a)intel.com> #v1 --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 43 +++++++++++++++++++--- drivers/gpu/drm/i915/gem/i915_gem_object.h | 5 +++ drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 36 +++++++++++------- 3 files changed, 64 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 6fb9afb65034..b88b121e244a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -89,6 +89,22 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, mutex_init(&obj->mm.get_dma_page.lock); } +/** + * i915_gem_object_fini - Clean up a GEM object initialization + * @obj: The gem object to cleanup + * + * This function cleans up gem object fields that are set up by + * drm_gem_private_object_init() and i915_gem_object_init(). + * It's primarily intended as a helper for backends that need to + * clean up the gem object in separate steps. + */ +void __i915_gem_object_fini(struct drm_i915_gem_object *obj) +{ + mutex_destroy(&obj->mm.get_page.lock); + mutex_destroy(&obj->mm.get_dma_page.lock); + dma_resv_fini(&obj->base._resv); +} + /** * Mark up the object's coherency levels for a given cache_level * @obj: #drm_i915_gem_object @@ -174,7 +190,6 @@ void __i915_gem_free_object_rcu(struct rcu_head *head) container_of(head, typeof(*obj), rcu); struct drm_i915_private *i915 = to_i915(obj->base.dev); - dma_resv_fini(&obj->base._resv); i915_gem_object_free(obj); GEM_BUG_ON(!atomic_read(&i915->mm.free_count)); @@ -204,10 +219,17 @@ static void __i915_gem_object_free_mmaps(struct drm_i915_gem_object *obj) } } -void __i915_gem_free_object(struct drm_i915_gem_object *obj) +/** + * __i915_gem_object_pages_fini - Clean up pages use of a gem object + * @obj: The gem object to clean up + * + * This function cleans up usage of the object mm.pages member. It + * is intended for backends that need to clean up a gem object in + * separate steps and needs to be called when the object is idle before + * the object's backing memory is freed. + */ +void __i915_gem_object_pages_fini(struct drm_i915_gem_object *obj) { - trace_i915_gem_object_destroy(obj); - if (!list_empty(&obj->vma.list)) { struct i915_vma *vma; @@ -233,11 +255,17 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj) __i915_gem_object_free_mmaps(obj); - GEM_BUG_ON(!list_empty(&obj->lut_list)); - atomic_set(&obj->mm.pages_pin_count, 0); __i915_gem_object_put_pages(obj); GEM_BUG_ON(i915_gem_object_has_pages(obj)); +} + +void __i915_gem_free_object(struct drm_i915_gem_object *obj) +{ + trace_i915_gem_object_destroy(obj); + + GEM_BUG_ON(!list_empty(&obj->lut_list)); + bitmap_free(obj->bit_17); if (obj->base.import_attach) @@ -253,6 +281,8 @@ void __i915_gem_free_object(struct drm_i915_gem_object *obj) if (obj->shares_resv_from) i915_vm_resv_put(obj->shares_resv_from); + + __i915_gem_object_fini(obj); } static void __i915_gem_free_objects(struct drm_i915_private *i915, @@ -266,6 +296,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915, obj->ops->delayed_free(obj); continue; } + __i915_gem_object_pages_fini(obj); __i915_gem_free_object(obj); /* But keep the pointer alive for RCU-protected lookups */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index 3043fcbd31bd..7f9f2e5ba0ec 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -58,6 +58,9 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, const struct drm_i915_gem_object_ops *ops, struct lock_class_key *key, unsigned alloc_flags); + +void __i915_gem_object_fini(struct drm_i915_gem_object *obj); + struct drm_i915_gem_object * i915_gem_object_create_shmem(struct drm_i915_private *i915, resource_size_t size); @@ -582,6 +585,8 @@ bool i915_gem_object_is_shmem(const struct drm_i915_gem_object *obj); void __i915_gem_free_object_rcu(struct rcu_head *head); +void __i915_gem_object_pages_fini(struct drm_i915_gem_object *obj); + void __i915_gem_free_object(struct drm_i915_gem_object *obj); bool i915_gem_object_evictable(struct drm_i915_gem_object *obj); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index b94497989995..a0ab5c44627b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -367,8 +367,10 @@ static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo) { struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); - if (likely(obj)) + if (likely(obj)) { + __i915_gem_object_pages_fini(obj); i915_ttm_free_cached_io_st(obj); + } } static struct intel_memory_region * @@ -813,12 +815,9 @@ static void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj) */ static void i915_ttm_delayed_free(struct drm_i915_gem_object *obj) { - if (obj->ttm.created) { - ttm_bo_put(i915_gem_to_ttm(obj)); - } else { - __i915_gem_free_object(obj); - call_rcu(&obj->rcu, __i915_gem_free_object_rcu); - } + GEM_BUG_ON(!obj->ttm.created); + + ttm_bo_put(i915_gem_to_ttm(obj)); } static vm_fault_t vm_fault_ttm(struct vm_fault *vmf) @@ -898,16 +897,19 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo) { struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); - i915_ttm_backup_free(obj); - - /* This releases all gem object bindings to the backend. */ - __i915_gem_free_object(obj); - i915_gem_object_release_memory_region(obj); mutex_destroy(&obj->ttm.get_io_page.lock); - if (obj->ttm.created) + if (obj->ttm.created) { + i915_ttm_backup_free(obj); + + /* This releases all gem object bindings to the backend. */ + __i915_gem_free_object(obj); + call_rcu(&obj->rcu, __i915_gem_free_object_rcu); + } else { + __i915_gem_object_fini(obj); + } } /** @@ -936,7 +938,11 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, drm_gem_private_object_init(&i915->drm, &obj->base, size); i915_gem_object_init(obj, &i915_gem_ttm_obj_ops, &lock_class, flags); - i915_gem_object_init_memory_region(obj, mem); + + /* Don't put on a region list until we're either locked or fully initialized. */ + obj->mm.region = intel_memory_region_get(mem); + INIT_LIST_HEAD(&obj->mm.region_link); + i915_gem_object_make_unshrinkable(obj); INIT_RADIX_TREE(&obj->ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN); mutex_init(&obj->ttm.get_io_page.lock); @@ -963,6 +969,8 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem, return i915_ttm_err_to_gem(ret); obj->ttm.created = true; + i915_gem_object_release_memory_region(obj); + i915_gem_object_init_memory_region(obj, mem); i915_ttm_adjust_domains_after_move(obj); i915_ttm_adjust_gem_after_move(obj); i915_gem_object_unlock(obj); -- 2.31.1 [View Less]

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[PATCH v9, 0/2] soc: mediatek: mmsys: add mt8192 mmsys support
by Yongqiang Niu 01 Oct '21

01 Oct '21

base 5.15 Yongqiang Niu (2): soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4 soc: mediatek: mmsys: Add mt8192 mmsys routing table drivers/soc/mediatek/mt8192-mmsys.h | 77 ++++++++++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 ++++ include/linux/soc/mediatek/mtk-mmsys.h | 3 + 3 files changed, 91 insertions(+) create mode 100644 drivers/soc/mediatek/mt8192-mmsys.h -- 2.25.1

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[Bug 214413] New: Kernel oops on boot for amdgpu (in si_dpm_set_power_state)
by bugzilla-daemon＠bugzilla.kernel.org 01 Oct '21

01 Oct '21

https://bugzilla.kernel.org/show_bug.cgi?id=214413 Bug ID: 214413 Summary: Kernel oops on boot for amdgpu (in si_dpm_set_power_state) Product: Drivers Version: 2.5 Kernel Version: 5.14.4 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-… [View More]bugs.osdl.org Reporter: mpiazza(a)gmail.com Regression: No Created attachment 298817 --> https://bugzilla.kernel.org/attachment.cgi?id=298817&action=edit Dmesg log with kernel oops Booting from a fresh self-compiled kernel 5.14.4 causes the following kernell oops. [ 11.451662] RIP: 0010:si_dpm_set_power_state+0xde3/0x1250 [amdgpu] [ 11.452272] Code: 0f 84 8e f5 ff ff c7 44 24 30 ea ff ff ff 48 c7 c7 38 a5 d6 a0 e8 9d 44 ae ff e9 75 f5 ff ff 45 31 c0 49 8b b4 24 10 0e 00 00 <0f > b7 0e 66 85 c9 0f 84 eb 03 00 00 83 e9 01 48 8d 46 14 48 8d 0c [ 11.452468] RSP: 0018:ffff888106c0baa8 EFLAGS: 00010246 [ 11.452530] RAX: ffff8881116a9a00 RBX: 000000000000ffff RCX: 0000000000000000 [ 11.452608] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff8881116c0000 [ 11.452686] RBP: ffff8881116c0000 R08: 0000000000000000 R09: ffff8881116a8e58 [ 11.452764] R10: ffff8881116c8400 R11: ffff8881116a99d8 R12: ffff8881116a8000 [ 11.452841] R13: ffff8881116a8000 R14: 0000000000000000 R15: 0000000000000005 [ 11.452919] FS: 00007face07fa040(0000) GS:ffff8881a9400000(0000) knlGS:0000000000000000 [ 11.453008] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 11.453073] CR2: 0000000000000000 CR3: 0000000104e7a000 CR4: 00000000000406f0 [ 11.453151] Call Trace: [ 11.453190] ? _raw_spin_unlock_irqrestore+0x15/0x30 [ 11.453256] ? si_dpm_pre_set_power_state+0x506/0xa50 [amdgpu] [ 11.453818] amdgpu_pm_compute_clocks.part.0+0x31c/0x5c0 [amdgpu] [ 11.454382] si_dpm_hw_init+0x72/0x80 [amdgpu] [ 11.454928] amdgpu_device_init.cold+0xd5a/0x1761 [amdgpu] [ 11.455479] ? pci_conf1_read+0x9f/0xf0 [ 11.455533] ? pci_bus_read_config_word+0x44/0x70 [ 11.455595] amdgpu_driver_load_kms+0x63/0x2e0 [amdgpu] [ 11.456078] amdgpu_pci_probe+0xf6/0x180 [amdgpu] [ 11.456554] local_pci_probe+0x3d/0x70 [ 11.456603] ? pci_match_device+0xd2/0x100 [ 11.456655] pci_device_probe+0xf5/0x1b0 [ 11.456706] really_probe.part.0+0xb3/0x2a0 [ 11.456761] __driver_probe_device+0x8b/0x120 [ 11.456816] driver_probe_device+0x19/0xd0 [ 11.456868] __driver_attach+0xa6/0x170 [ 11.456916] ? __device_attach_driver+0xe0/0xe0 [ 11.456972] bus_for_each_dev+0x73/0xb0 [ 11.457022] bus_add_driver+0x106/0x1b0 [ 11.457072] driver_register+0x86/0xd0 [ 11.457120] ? 0xffffffffa0f33000 [ 11.459179] do_one_initcall+0x48/0x200 [ 11.461264] ? kmem_cache_alloc_trace+0x2c9/0x430 [ 11.463394] do_init_module+0x56/0x240 [ 11.465492] __do_sys_finit_module+0xa0/0xe0 [ 11.467586] do_syscall_64+0x43/0x90 [ 11.469658] entry_SYSCALL_64_after_hwframe+0x44/0xae [ 11.471773] RIP: 0033:0x7face0986f49 [ 11.473851] Code: 00 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48 > 3d 01 f0 ff ff 73 01 c3 48 8b 0d 17 3f 0c 00 f7 d8 64 89 01 48 [ 11.478308] RSP: 002b:00007ffe5da504d8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [ 11.480601] RAX: ffffffffffffffda RBX: 00005599b42ece30 RCX: 00007face0986f49 [ 11.482914] RDX: 0000000000000000 RSI: 00005599b42eedb0 RDI: 0000000000000014 [ 11.485212] RBP: 00005599b42eedb0 R08: 0000000000000000 R09: 0000000000000000 [ 11.487483] R10: 0000000000000014 R11: 0000000000000246 R12: 0000000000000000 [ 11.489715] R13: 00005599b42f2a10 R14: 0000000000020000 R15: 0000000000000000 [ 11.491855] Modules linked in: ext4 crc32c_generic mbcache jbd2 ath3k btusb btrtl btbcm btintel bluetooth jitterentropy_rng uvcvideo videobuf2_vmal loc videobuf2_memops videobuf2_v4l2 sha512_generic videobuf2_common hmac videodev mc drbg ecdh_generic ecc crc16 toshiba_wmi wmi_bmof sparse_keymap am d_freq_sensitivity ath9k ath9k_common ath9k_hw kvm_amd mac80211 ath kvm irqbypass sha256_generic snd_hda_codec_idt snd_hda_codec_generic amdgpu(+) gha sh_clmulni_intel ledtrig_audio snd_hda_codec_hdmi deflate cryptd joydev snd_hda_intel evdev mfd_core snd_intel_dspcfg cfg80211 gpu_sched serio_raw efi _pstore toshiba_bluetooth fam15h_power sg snd_hda_codec snd_hda_core snd_hwdep snd_pcm wmi rfkill libarc4 i2c_algo_bit snd_timer snd drm_ttm_helper tt m soundcore drm_kms_helper ac battery video acpi_cpufreq button sch_cake loop msr parport_pc ppdev lp parport drm fuse configfs sunrpc efivarfs ip_tab les x_tables autofs4 btrfs zstd_compress raid10 raid456 async_raid6_recov async_memcpy async_pq [ 11.492046] async_xor async_tx xor raid6_pq libcrc32c raid1 raid0 linear md_mod hid_generic usbhid hid sd_mod t10_pi uas usb_storage ohci_pci crc3 2c_intel xhci_pci psmouse i2c_piix4 ahci ohci_hcd libahci ehci_pci xhci_hcd ehci_hcd i2c_core libata usbcore scsi_mod alx usb_common mdio fan thermal [ 11.512445] CR2: 0000000000000000 [ 11.515877] ---[ end trace 9d0f57da9351a59c ]--- [ 11.524001] ------------[ cut here ]------------ This is my hardware: marco@albireo:~$ lspci 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Root Complex 00:01.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Kabini [Radeon HD 8330] 00:01.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Kabini HDMI/DP Audio 00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 0 00:02.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Functions 5:1 00:02.3 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Functions 5:1 00:02.4 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Functions 5:1 00:10.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 01) 00:11.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] 00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 39) 00:12.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 39) 00:13.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 39) 00:13.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 39) 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 3a) 00:14.2 Audio device: Advanced Micro Devices, Inc. [AMD] FCH Azalia Controller (rev 02) 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 11) 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 0 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 1 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 2 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 3 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 4 00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 16h Processor Function 5 01:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Sun PRO [Radeon HD 8570A/8570M] 02:00.0 Network controller: Qualcomm Atheros QCA9565 / AR9565 Wireless Network Adapter (rev 01) 03:00.0 Ethernet controller: Qualcomm Atheros QCA8172 Fast Ethernet (rev 10) Attached the full dmesg log Marco -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. [View Less]

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[PATCH v2 0/3] Rename IS_ACTIVE() and move to kconfig.h
by Lucas De Marchi 01 Oct '21

01 Oct '21

As we try to reduce our i915-only helpers, let's try to improve IS_ACTIVE() logic and move to kconfig.h. I'm not 100% happy with the name, but it's the best I could come up with, hopefully a little better than trying to add IS_ACTIVE() to be used broadly. v2: now with Cc/To list fixed up - no changes to the patches. Lucas De Marchi (3): drm/i915: rename IS_ACTIVE drm/i915/utils: do not depend on config being defined Move IS_CONFIG_NONZERO() to kconfig.h drivers/gpu/drm/i915/gem/… [View More]

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dri-devel September 2021