Group below 4 dp driver related patches into one series.
Kuogee Hsieh (4):
drm/msm/dp: do not initialize phy until plugin interrupt received
drm/msm/dp: populate connector of struct dp_panel
drm/msm/dp: add support of tps4 (training pattern 4) for HBR3
drm/msm/dp: stop link training after link training 2 failed
drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++---
drivers/gpu/drm/msm/dp/dp_catalog.h | 2 +-
drivers/gpu/drm/msm/dp/dp_ctrl.c | 100 ++++++++++++++++--------------------
…
[View More] drivers/gpu/drm/msm/dp/dp_ctrl.h | 8 +--
drivers/gpu/drm/msm/dp/dp_display.c | 96 +++++++++++++++++++++++-----------
5 files changed, 123 insertions(+), 95 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[View Less]
Hi,
This is another attempt at supporting the HDMI YUV output in the vc4 HDMI
driver.
This is a follow-up of
https://lore.kernel.org/dri-devel/20210317154352.732095-1-maxime@cerno.tech/
And the discussions that occured recently on the mailing lists and IRC about
this.
The series mentioned above had multiple issues, the main one being that it was
a bit too much complicated for what we wanted to achieve. This series is taking
a much simpler approach with an ad-hoc solution.
I think some …
[View More]parts of it could still be moved to KMS helpers (notably, the
output format enum, and the helper to set the infoframe for it) and structures
(the output format stored in drm_connector_state). This would also interact
nicely with the work done here:
https://lore.kernel.org/dri-devel/20211118103814.524670-1-maxime@cerno.tech/
This can come as a second step though.
The other issues with the first attempt was that nothing was reported to
userspace about the decision we made about the format, and that this decision
was essentially policy, without any way for the userspace to influence it.
Those two points however are being worked on by Werner in a cross-driver
effort:
https://lore.kernel.org/dri-devel/e452775c-5b95-bbfd-e818-f1480f556336@tuxe…
Since it's a KMS decision, I don't think we should hold off any driver as long
as it's consistent with what the other drivers are doing.
Let me know what you think,
Maxime
---
Changes from v2:
- Rename the output format enum
- Split the edid_hdmi_dc_modes in two for RGB444 and YUV444
- Remove color_formats modifications from _parse_deep_color entirely
- Fixed comment formatting
- Fixed mode_valid that would always return true
- Fixed max_tmds_clock handling
Changes from v1:
- Fixed an EDID parsing error for YUV422
- Fixed the scrambling setup when using a bpc > 8
- Added some logging
- Fixed some build-bot warnings
- Fixed a number of HDMI specifications and EDID issues
- Try to max out the bpc every time
Maxime Ripard (16):
drm/edid: Rename drm_hdmi_avi_infoframe_colorspace to _colorimetry
drm/edid: Don't clear formats if using deep color
drm/edid: Split deep color modes between RGB and YUV444
drm/connector: Fix typo in output format
drm/vc4: hdmi: Add full range RGB helper
drm/vc4: hdmi: Use full range helper in csc functions
drm/vc4: hdmi: Move XBAR setup to csc_setup
drm/vc4: hdmi: Replace CSC_CTL hardcoded value by defines
drm/vc4: hdmi: Define colorspace matrices
drm/vc4: hdmi: Change CSC callback prototype
drm/vc4: hdmi: Move clock validation to its own function
drm/vc4: hdmi: Move clock calculation into its own function
drm/vc4: hdmi: Take the sink maximum TMDS clock into account
drm/vc4: hdmi: Take bpp into account for the scrambler
drm/vc4: hdmi: Always try to have the highest bpc
drm/vc4: hdmi: Support HDMI YUV output
.../gpu/drm/amd/amdgpu/amdgpu_connectors.c | 2 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../arm/display/komeda/d71/d71_component.c | 12 +-
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 2 +-
.../drm/bridge/analogix/analogix_dp_core.c | 4 +-
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 18 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 +-
drivers/gpu/drm/drm_edid.c | 39 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +-
drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
drivers/gpu/drm/radeon/radeon_connectors.c | 2 +-
.../gpu/drm/rockchip/analogix_dp-rockchip.c | 2 +-
drivers/gpu/drm/vc4/vc4_hdmi.c | 522 +++++++++++++++---
drivers/gpu/drm/vc4/vc4_hdmi.h | 26 +-
drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 6 +
drivers/gpu/drm/vc4/vc4_regs.h | 19 +
include/drm/drm_connector.h | 18 +-
include/drm/drm_edid.h | 4 +-
18 files changed, 552 insertions(+), 150 deletions(-)
--
2.34.1
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Remove a hack required because schedule disable done G2H was received
before context reset G2H in GuC firmware 62.0.0. Since we have upgraded
69.0.3, this is no longer required.
Also revive selftest which proves this works before / after change.
v2:
- Address John Harrion's comments
Signed-off-by: Matthew Brost <matthew.brost(a)intel.com>
Matthew Brost (2):
drm/i915/selftests: Add a cancel request selftest that triggers a
reset
drm/i915/guc: Remove hacks for reset and …
[View More]schedule disable G2H being
received out of order
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 30 +----
drivers/gpu/drm/i915/selftests/i915_request.c | 117 ++++++++++++++++++
2 files changed, 119 insertions(+), 28 deletions(-)
--
2.34.1
[View Less]
Remove a hack required because schedule disable done G2H was received
before context reset G2H in GuC firmware 62.0.0. Since we have upgraded
69.0.3, this is no longer required.
Also revive selftest which proves this works before / after change.
Signed-off-by: Matthew Brost <matthew.brost(a)intel.com>
Matthew Brost (2):
drm/i915/selftests: Add a cancel request selftest that triggers a
reset
drm/i915/guc: Remove hacks for reset and schedule disable G2H being
received out of …
[View More]order
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 30 +----
drivers/gpu/drm/i915/selftests/i915_request.c | 117 ++++++++++++++++++
2 files changed, 119 insertions(+), 28 deletions(-)
--
2.34.1
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After a small fix to error capture code, we now can flush G2H during a
GT reset which simplifies code and seals some extreme corner case races.
Signed-off-by: Matthew Brost <matthew.brost(a)intel.com>
Matthew Brost (2):
drm/i915: Allocate intel_engine_coredump_alloc with ALLOW_FAIL
drm/i915/guc: Flush G2H handler during a GT reset
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 +-----------------
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
2 files changed, 2 …
[View More]insertions(+), 18 deletions(-)
--
2.34.1
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