dri-devel January 2022

dri-devel@lists.freedesktop.org

373 participants
842 discussions

[PATCH v2 1/3] drm/bridge: anx7625: Convert to use devm_kzalloc
by Hsin-Yi Wang 13 Jan '22

13 Jan '22

Use devm_kzalloc instead of kzalloc and drop kfree(). Let the memory handled by driver detach. Signed-off-by: Hsin-Yi Wang <hsinyi(a)chromium.org> Reviewed-by: Xin Ji <xji(a)analogixsemi.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 0b858c78abe8b6..dbe708eb3bcf11 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -2515,7 +2515,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, return -ENODEV; } - platform = kzalloc(sizeof(*platform), GFP_KERNEL); + platform = devm_kzalloc(dev, sizeof(*platform), GFP_KERNEL); if (!platform) { DRM_DEV_ERROR(dev, "fail to allocate driver data\n"); return -ENOMEM; @@ -2527,7 +2527,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (ret) { if (ret != -EPROBE_DEFER) DRM_DEV_ERROR(dev, "fail to parse DT : %d\n", ret); - goto free_platform; + return ret; } platform->client = client; @@ -2552,7 +2552,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (!platform->hdcp_workqueue) { dev_err(dev, "fail to create work queue\n"); ret = -ENOMEM; - goto free_platform; + return ret; } platform->pdata.intp_irq = client->irq; @@ -2637,9 +2637,6 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (platform->hdcp_workqueue) destroy_workqueue(platform->hdcp_workqueue); -free_platform: - kfree(platform); - return ret; } -- 2.34.1.575.g55b058a8bb-goog

2 4

[PATCH] fbdev: omap2: omapfb: Remove redundant 'flush_workqueue()' calls
by Xu Wang 13 Jan '22

13 Jan '22

'destroy_workqueue()' already drains the queue before destroying it, so there is no need to flush it explicitly. Remove the redundant 'flush_workqueue()' calls. Signed-off-by: Xu Wang <vulab(a)iscas.ac.cn> --- drivers/video/fbdev/omap2/omapfb/omapfb-main.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/fbdev/omap2/omapfb/omapfb-main.c b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c index a3decc7fadde..afa688e754b9 100644 --- a/drivers/video/fbdev/omap2/omapfb/omapfb-main.c +++ b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c @@ -1854,7 +1854,6 @@ static void omapfb_free_resources(struct omapfb2_device *fbdev) } if (fbdev->auto_update_wq != NULL) { - flush_workqueue(fbdev->auto_update_wq); destroy_workqueue(fbdev->auto_update_wq); fbdev->auto_update_wq = NULL; } -- 2.25.1

1 0

[PATCH 1/3] drm/bridge: anx7625: Convert to use devm_kzalloc
by Hsin-Yi Wang 13 Jan '22

13 Jan '22

Use devm_kzalloc instead of kzalloc and drop kfree(). Let the memory handled by driver detach. Signed-off-by: Hsin-Yi Wang <hsinyi(a)chromium.org> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 0b858c78abe8b6..dbe708eb3bcf11 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -2515,7 +2515,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, return -ENODEV; } - platform = kzalloc(sizeof(*platform), GFP_KERNEL); + platform = devm_kzalloc(dev, sizeof(*platform), GFP_KERNEL); if (!platform) { DRM_DEV_ERROR(dev, "fail to allocate driver data\n"); return -ENOMEM; @@ -2527,7 +2527,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (ret) { if (ret != -EPROBE_DEFER) DRM_DEV_ERROR(dev, "fail to parse DT : %d\n", ret); - goto free_platform; + return ret; } platform->client = client; @@ -2552,7 +2552,7 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (!platform->hdcp_workqueue) { dev_err(dev, "fail to create work queue\n"); ret = -ENOMEM; - goto free_platform; + return ret; } platform->pdata.intp_irq = client->irq; @@ -2637,9 +2637,6 @@ static int anx7625_i2c_probe(struct i2c_client *client, if (platform->hdcp_workqueue) destroy_workqueue(platform->hdcp_workqueue); -free_platform: - kfree(platform); - return ret; } -- 2.34.1.575.g55b058a8bb-goog

2 6

[PATCH v19, 00/19] Support multi hardware decode using of_platform_populate
by Yunfei Dong 13 Jan '22

13 Jan '22

This series adds support for multi hardware decode into mtk-vcodec, by first adding use of_platform_populate to manage each hardware information: interrupt, clock, register bases and power. Secondly add core work queue to deal with core hardware message, at the same time, add msg queue for different hardware share messages. Lastly, the architecture of different specs are not the same, using specs type to separate them. This series has been tested with both MT8183 and MT8173. Decoding was working for both chips. Patches 1~3 rewrite get register bases and power on/off interface. Patches 4 export decoder pm interfaces. Patches 5 separate video encoder and decoder document Patches 6 add 8192 document Patches 7 add to support 8192. Patch 8 support multi hardware. Patch 9-17 add interfaces to support core hardware. Patch 18-19 remove mtk_vcodec_release_dec/enc_pm interfaces. --- changes compared with v18: - fix checkpatch fail. all file's maintainer still the same. - for patch 5 is separated video decoder and encoder document to different yaml fils. changes compared with v17: - fix checkpatch fail. - fix kernel-doc fail - fix smatch fail. changes compared with v16: - fix build warning for patch 13. changes compared with v15: - add Reviewed-by for patch 10. changes compared with v14: - rebase to latest media stage. changes compared with v13: - change some function position in case of ko dependency for patch 15. - add reviewed-by for patch 06/13/15. changes compared with v12: - fix comments from rob for patch 15. - fix comments from steve for 06 and 13. changes compared with v11: - fix comments from AngeloGioacchino for patch 09~11/19. - fix comments from steve for patch 03/19. changes compared with v10: - fix comments from tzung-bi for patch 06/19. - add more detail information for hardware block diagram 15/19 changes compared with v9: - need not to build ko, just export pm interfaces for patch 04/19. - fix comments for patch 06/19 changes compared with v8: - add new patch 18~19 to remove mtk_vcodec_release_de/enc_pm interfaces. - fix spelling mistakes for patch 17/19 - fix yaml comments for patch 15/19 Changes compared with v7: - add new patch 4 to build decoder pm file as module - add new patch 5 to support 8192 - fix comments for patch 6/17 - change some logic for using work queue instead of create thread for core hardware decode for patch 10/17 - using work queue for hardware decode instead of create thread for patch 13/17 - add returen value for patch 14/17 - fix yaml check fail 15/17 Changes compared with v6: - Use of_platform_populate to manage multi hardware, not component framework for patch 4/15 - Re-write dtsi document for hardware architecture changed for patch 13/15 -The dtsi will write like below in patch 13/15: vcodec_dec: vcodec_dec@16000000 { compatible = "mediatek,mt8192-vcodec-dec"; #address-cells = <2>; #size-cells = <2>; ranges; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ mediatek,scp = <&scp>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; vcodec_lat { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x16010000 0 0x800>; /* VDEC_MISC */ reg-name = "reg-misc"; interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys_soc CLK_VDEC_SOC_VDEC>, <&vdecsys_soc CLK_VDEC_SOC_LAT>, <&vdecsys_soc CLK_VDEC_SOC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; vcodec_core { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x16025000 0 0x1000>; /* VDEC_CORE_MISC */ reg-names = "reg-misc"; interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LAT>, <&vdecsys CLK_VDEC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; }; }; Changes compared with v5: - Add decoder hardware block diagram for patch 13/15 Changes compared with v4: - Fix comments for patch 4/15 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } Fix platform_set_drvdata. - Fix build error for patch 9/15 - Add depend patch in case of error header file for patch 13/15 Changes compared with v3: - Fix return value for patch 1/15 - Fix comments for patch 4/15 > Looking up "mediatek,mtk-vcodec-core" to determine if it uses component framwork sounds like... Add prameter in pdata, for all platform will use compoent after mt8183 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } > + Has asked the same question in [1]. Why it removes the > +platform_set_drvdata() above? mtk_vcodec_init_master() also calls platform_set_drvdata(). Must call component_master_add_with_match after platform_set_drvdata for component architecture. - Fix yaml files check fail for patch 5/15 - Fix yaml file check fail for patch 14/15 Changes compared with v1: - Fix many comments for patch 3/14 - Remove unnecessary code for patch 4/14 - Using enum mtk_vdec_hw_count instead of magic numbers for patch 6/14 - Reconstructed get/put lat buffer for lat and core hardware for patch 7/14 - Using yaml format to instead of txt file for patch 12/14 Yunfei Dong (19): media: mtk-vcodec: Get numbers of register bases from DT media: mtk-vcodec: Align vcodec wake up interrupt interface media: mtk-vcodec: Refactor vcodec pm interface media: mtk-vcodec: export decoder pm functions dt-bindings: media: mtk-vcodec: Separate video encoder and decoder dt-bindings dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192 media: mtk-vcodec: Support MT8192 media: mtk-vcodec: Add to support multi hardware decode media: mtk-vcodec: Use pure single core for MT8183 media: mtk-vcodec: Add irq interface for multi hardware media: mtk-vcodec: Add msg queue feature for lat and core architecture media: mtk-vcodec: Generalize power and clock on/off interfaces media: mtk-vcodec: Add new interface to lock different hardware media: mtk-vcodec: Add work queue for core hardware decode media: mtk-vcodec: Support 34bits dma address for vdec media: mtk-vcodec: Add core dec and dec end ipi msg media: mtk-vcodec: Use codec type to separate different hardware media: mtk-vcodec: Remove mtk_vcodec_release_dec_pm media: mtk-vcodec: Remove mtk_vcodec_release_enc_pm .../media/mediatek,vcodec-decoder.yaml | 176 +++++++++++ .../media/mediatek,vcodec-encoder.yaml | 187 +++++++++++ .../media/mediatek,vcodec-subdev-decoder.yaml | 265 ++++++++++++++++ .../bindings/media/mediatek-vcodec.txt | 131 -------- drivers/media/platform/mtk-vcodec/Makefile | 6 +- .../platform/mtk-vcodec/mtk_vcodec_dec.c | 4 +- .../platform/mtk-vcodec/mtk_vcodec_dec.h | 1 + .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 178 ++++++++--- .../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 201 ++++++++++++ .../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 56 ++++ .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 105 +++++-- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 11 +- .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 2 + .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 21 ++ .../platform/mtk-vcodec/mtk_vcodec_drv.h | 74 ++++- .../platform/mtk-vcodec/mtk_vcodec_enc_drv.c | 21 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 10 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.h | 3 +- .../platform/mtk-vcodec/mtk_vcodec_intr.c | 30 +- .../platform/mtk-vcodec/mtk_vcodec_intr.h | 5 +- .../platform/mtk-vcodec/mtk_vcodec_util.c | 59 +++- .../platform/mtk-vcodec/mtk_vcodec_util.h | 8 +- .../platform/mtk-vcodec/vdec/vdec_h264_if.c | 2 +- .../mtk-vcodec/vdec/vdec_h264_req_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp8_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp9_if.c | 2 +- .../media/platform/mtk-vcodec/vdec_drv_if.c | 21 +- .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 16 +- .../platform/mtk-vcodec/vdec_msg_queue.c | 290 ++++++++++++++++++ .../platform/mtk-vcodec/vdec_msg_queue.h | 153 +++++++++ .../media/platform/mtk-vcodec/vdec_vpu_if.c | 46 ++- .../media/platform/mtk-vcodec/vdec_vpu_if.h | 22 ++ .../platform/mtk-vcodec/venc/venc_h264_if.c | 2 +- .../platform/mtk-vcodec/venc/venc_vp8_if.c | 2 +- 34 files changed, 1818 insertions(+), 296 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.c create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.h -- 2.25.1

1 19

[PATCH -next 1/2] drm/amdgpu: remove unneeded semicolon
by Yang Li 13 Jan '22

13 Jan '22

Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Yang Li <yang.lee(a)linux.alibaba.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index d4d9b9ea8bbd..7d9d99e581da 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -2722,7 +2722,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev) int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras* ras_con) { if (!adev) - return -EINVAL;; + return -EINVAL; adev->psp.ras_context.ras = ras_con; return 0; -- 2.20.1.7.g153144c

2 2

[PATCH] drm/i915: Flip guc_id allocation partition
by Matthew Brost 13 Jan '22

13 Jan '22

Move the multi-lrc guc_id from the lower allocation partition (0 to number of multi-lrc guc_ids) to upper allocation partition (number of single-lrc to max guc_ids). This will help when a native driver transitions to a PF after driver load time. If the perma-pin guc_ids (kernel contexts) are in a low range it is easy reduce total number of guc_ids as the allocated slrc are in a valid range the mlrc range moves to an unused range. Assuming no mlrc are allocated and few slrc are used the native to PF transition is seamless for the guc_id resource. v2: (Michal / Tvrtko) - Add an explaination to commit message of why this patch is needed (Michal / Piotr) - Replace marcos with functions (Michal) - Rework logic flow in new_mlrc_guc_id - Unconditionally call bitmap_free Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> --- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 88 +++++++++++++------ 1 file changed, 63 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 23a40f10d376d..3ae92260f8224 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -138,17 +138,6 @@ guc_create_parallel(struct intel_engine_cs **engines, #define GUC_REQUEST_SIZE 64 /* bytes */ -/* - * We reserve 1/16 of the guc_ids for multi-lrc as these need to be contiguous - * per the GuC submission interface. A different allocation algorithm is used - * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to - * partition the guc_id space. We believe the number of multi-lrc contexts in - * use should be low and 1/16 should be sufficient. Minimum of 32 guc_ids for - * multi-lrc. - */ -#define NUMBER_MULTI_LRC_GUC_ID(guc) \ - ((guc)->submission_state.num_guc_ids / 16) - /* * Below is a set of functions which control the GuC scheduling state which * require a lock. @@ -1777,11 +1766,6 @@ int intel_guc_submission_init(struct intel_guc *guc) INIT_WORK(&guc->submission_state.destroyed_worker, destroyed_worker_func); - guc->submission_state.guc_ids_bitmap = - bitmap_zalloc(NUMBER_MULTI_LRC_GUC_ID(guc), GFP_KERNEL); - if (!guc->submission_state.guc_ids_bitmap) - return -ENOMEM; - spin_lock_init(&guc->timestamp.lock); INIT_DELAYED_WORK(&guc->timestamp.work, guc_timestamp_ping); guc->timestamp.ping_delay = (POLL_TIME_CLKS / gt->clock_frequency + 1) * HZ; @@ -1864,6 +1848,57 @@ static void guc_submit_request(struct i915_request *rq) spin_unlock_irqrestore(&sched_engine->lock, flags); } +/* + * We reserve 1/16 of the guc_ids for multi-lrc as these need to be contiguous + * per the GuC submission interface. A different allocation algorithm is used + * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to + * partition the guc_id space. We believe the number of multi-lrc contexts in + * use should be low and 1/16 should be sufficient. + */ +#define MLRC_GUC_ID_RATIO 16 + +static int number_mlrc_guc_id(struct intel_guc *guc) +{ + return guc->submission_state.num_guc_ids / MLRC_GUC_ID_RATIO; +} + +static int number_slrc_guc_id(struct intel_guc *guc) +{ + return guc->submission_state.num_guc_ids - number_mlrc_guc_id(guc); +} + +static int mlrc_guc_id_base(struct intel_guc *guc) +{ + return number_slrc_guc_id(guc); +} + +static int new_mlrc_guc_id(struct intel_guc *guc, struct intel_context *ce) +{ + int ret; + + GEM_BUG_ON(!intel_context_is_parent(ce)); + GEM_BUG_ON(!guc->submission_state.guc_ids_bitmap); + + ret = bitmap_find_free_region(guc->submission_state.guc_ids_bitmap, + number_mlrc_guc_id(guc), + order_base_2(ce->parallel.number_children + + 1)); + if (unlikely(ret < 0)) + return ret; + + return ret + mlrc_guc_id_base(guc); +} + +static int new_slrc_guc_id(struct intel_guc *guc, struct intel_context *ce) +{ + GEM_BUG_ON(intel_context_is_parent(ce)); + + return ida_simple_get(&guc->submission_state.guc_ids, + 0, number_slrc_guc_id(guc), + GFP_KERNEL | __GFP_RETRY_MAYFAIL | + __GFP_NOWARN); +} + static int new_guc_id(struct intel_guc *guc, struct intel_context *ce) { int ret; @@ -1871,16 +1906,10 @@ static int new_guc_id(struct intel_guc *guc, struct intel_context *ce) GEM_BUG_ON(intel_context_is_child(ce)); if (intel_context_is_parent(ce)) - ret = bitmap_find_free_region(guc->submission_state.guc_ids_bitmap, - NUMBER_MULTI_LRC_GUC_ID(guc), - order_base_2(ce->parallel.number_children - + 1)); + ret = new_mlrc_guc_id(guc, ce); else - ret = ida_simple_get(&guc->submission_state.guc_ids, - NUMBER_MULTI_LRC_GUC_ID(guc), - guc->submission_state.num_guc_ids, - GFP_KERNEL | __GFP_RETRY_MAYFAIL | - __GFP_NOWARN); + ret = new_slrc_guc_id(guc, ce); + if (unlikely(ret < 0)) return ret; @@ -1990,6 +2019,15 @@ static int pin_guc_id(struct intel_guc *guc, struct intel_context *ce) GEM_BUG_ON(atomic_read(&ce->guc_id.ref)); + /* Outside spin lock so we can sleep on alloc */ + if (unlikely(intel_context_is_parent(ce) && + !guc->submission_state.guc_ids_bitmap)) { + guc->submission_state.guc_ids_bitmap = + bitmap_zalloc(number_mlrc_guc_id(guc), GFP_KERNEL); + if (!guc->submission_state.guc_ids_bitmap) + return -ENOMEM; + } + try_again: spin_lock_irqsave(&guc->submission_state.lock, flags); -- 2.34.1

1 0

[Bug 215445] New: UBSAN: invalid-load in amdgpu_dm.c:5882:84 - load of value 32 is not a valid value for type '_Bool'
by bugzilla-daemon＠bugzilla.kernel.org 13 Jan '22

13 Jan '22

https://bugzilla.kernel.org/show_bug.cgi?id=215445 Bug ID: 215445 Summary: UBSAN: invalid-load in amdgpu_dm.c:5882:84 - load of value 32 is not a valid value for type '_Bool' Product: Drivers Version: 2.5 Kernel Version: 5.15.12 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: bogdan.pylypenko107(a)gmail.com Regression: No Created attachment 300208 --> https://bugzilla.kernel.org/attachment.cgi?id=300208&action=edit Full message from dmesg I have an error in dmesg: [ 7.729183] UBSAN: invalid-load in drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5882:84 [ 7.729185] load of value 32 is not a valid value for type '_Bool' -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

1 9

[RFC PATCH 0/7] Simplify and correct msm/dp bridge implementation
by Dmitry Baryshkov 12 Jan '22

12 Jan '22

I noticed that commit 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and disable") conflicts with the panel-edp (panel bridge) support. Both bridges will try to attach directly to the drm encoder itself. I started writing lengthy letter describing what is broken and how it should be fixed. Then at some point I stopped and quickly coded this RFC (which is compile-tested only). Comments and tests (on both DP and eDP setups) are more than welcome. The following changes since commit 6ed95285382d6f90a3c3a11d5806a5eb7db715c3: drm/msm/a5xx: Fix missing CP_PROTECT for SMMU on A540 (2021-12-17 15:09:46 -0800) are available in the Git repository at: https://git.linaro.org/people/dmitry.baryshkov/kernel.git msm-dp-bridges for you to fetch changes up to 7eff304d50ba520e9193a293a8e42bbd9d7aa0e1: drm/msm/dp: stop carying about the connector type (2022-01-07 04:56:06 +0300) ---------------------------------------------------------------- Dmitry Baryshkov (7): drm/msm/dp: fix panel bridge attachment drm/msm/dp: support attaching bridges to the DP encoder drm/msm/dp: replace dp_connector with drm_bridge_connector drm/msm/dp: remove extra wrappers and public functions drm/msm/dp: remove unused stubs drm/msm/dp: remove dp_display_en/disable prototypes and data argument drm/msm/dp: stop carying about the connector type drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/dp/dp_display.c | 263 ++++++++++++++++++++++++++---------- drivers/gpu/drm/msm/dp/dp_display.h | 5 +- drivers/gpu/drm/msm/dp/dp_drm.c | 250 ---------------------------------- drivers/gpu/drm/msm/dp/dp_parser.c | 28 ++-- drivers/gpu/drm/msm/dp/dp_parser.h | 4 +- drivers/gpu/drm/msm/msm_drv.h | 32 +---- 7 files changed, 203 insertions(+), 380 deletions(-) delete mode 100644 drivers/gpu/drm/msm/dp/dp_drm.c

3 17

Phyr Starter
by Matthew Wilcox 12 Jan '22

12 Jan '22

TLDR: I want to introduce a new data type: struct phyr { phys_addr_t addr; size_t len; }; and use it to replace bio_vec as well as using it to replace the array of struct pages used by get_user_pages() and friends. --- There are two distinct problems I want to address: doing I/O to memory which does not have a struct page and efficiently doing I/O to large blobs of physically contiguous memory, regardless of whether it has a struct page. There are some other improvements which I regard as minor. There are many types of memory that one might want to do I/O to that do not have a struct page, some examples: - Memory on a graphics card (or other PCI card, but gfx seems to be the primary provider of DRAM on the PCI bus today) - DAX, or other pmem (there are some fake pages today, but this is mostly a workaround for the IO problem today) - Guest memory being accessed from the hypervisor (KVM needs to create structpages to make this happen. Xen doesn't ...) All of these kinds of memories can be addressed by the CPU and so also by a bus master. That is, there is a physical address that the CPU can use which will address this memory, and there is a way to convert that to a DMA address which can be programmed into another device. There's no intent here to support memory which can be accessed by a complex scheme like writing an address to a control register and then accessing the memory through a FIFO; this is for memory which can be accessed by DMA and CPU loads and stores. For get_user_pages() and friends, we currently fill an array of struct pages, each one representing PAGE_SIZE bytes. For an application that is using 1GB hugepages, writing 2^18 entries is a significant overhead. It also makes drivers hard to write as they have to recoalesce the struct pages, even though the VM can tell it whether those 2^18 pages are contiguous. On the minor side, struct phyr can represent any mappable chunk of memory. A bio_vec is limited to 2^32 bytes, while on 64-bit machines a phyr can represent larger than 4GB. A phyr is the same size as a bio_vec on 64 bit (16 bytes), and the same size for 32-bit with PAE (12 bytes). It is smaller for 32-bit machines without PAE (8 bytes instead of 12). Finally, it may be possible to stop using scatterlist to describe the input to the DMA-mapping operation. We may be able to get struct scatterlist down to just dma_address and dma_length, with chaining handled through an enclosing struct. I would like to see phyr replace bio_vec everywhere it's currently used. I don't have time to do that work now because I'm busy with folios. If someone else wants to take that on, I shall cheer from the sidelines. What I do intend to do is: - Add an interface to gup.c to pin/unpin N phyrs - Add a sg_map_phyrs() This will take an array of phyrs and allocate an sg for them - Whatever else I need to do to make one RDMA driver happy with this scheme At that point, I intend to stop and let others more familiar with this area of the kernel continue the conversion of drivers. P.S. If you've had the Prodigy song running through your head the whole time you've been reading this email ... I'm sorry / You're welcome. If people insist, we can rename this to phys_range or something boring, but I quite like the spelling of phyr with the pronunciation of "fire".

6 24

[PATCH 0/2] Introduce multitile support
by Andi Shyti 12 Jan '22

12 Jan '22

Hi, This is the second series that prepares i915 to host multitile platforms. It introduces the for_each_gt() macro that loops over the tiles to perform per gt actions. This patch is a combination of two patches developed originally by Abdiel, who introduced some refactoring during probe, and then Tvrtko has added the necessary tools to start using the various tiles. The second patch re-organises the sysfs interface to expose the API for each of the GTs. I decided to prioritise this patch over others to unblock Sujaritha for further development. A third series will still follow this. Andi Shyti (1): drm/i915/gt: make a gt sysfs group and move power management files Tvrtko Ursulin (1): drm/i915: Prepare for multiple GTs drivers/gpu/drm/i915/Makefile | 4 +- drivers/gpu/drm/i915/gt/intel_gt.c | 141 ++++++- drivers/gpu/drm/i915/gt/intel_gt.h | 14 +- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 9 +- drivers/gpu/drm/i915/gt/intel_gt_types.h | 7 + drivers/gpu/drm/i915/gt/sysfs_gt.c | 126 ++++++ drivers/gpu/drm/i915/gt/sysfs_gt.h | 44 ++ drivers/gpu/drm/i915/gt/sysfs_gt_pm.c | 394 ++++++++++++++++++ drivers/gpu/drm/i915/gt/sysfs_gt_pm.h | 16 + drivers/gpu/drm/i915/i915_driver.c | 29 +- drivers/gpu/drm/i915/i915_drv.h | 8 + drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/i915_sysfs.c | 315 +------------- drivers/gpu/drm/i915/i915_sysfs.h | 3 + drivers/gpu/drm/i915/intel_memory_region.h | 3 + drivers/gpu/drm/i915/intel_uncore.c | 12 +- drivers/gpu/drm/i915/intel_uncore.h | 3 +- .../gpu/drm/i915/selftests/mock_gem_device.c | 5 +- 18 files changed, 786 insertions(+), 348 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/sysfs_gt.c create mode 100644 drivers/gpu/drm/i915/gt/sysfs_gt.h create mode 100644 drivers/gpu/drm/i915/gt/sysfs_gt_pm.c create mode 100644 drivers/gpu/drm/i915/gt/sysfs_gt_pm.h -- 2.34.1

3 6

← Newer
1
...
62
63
64
65
66
67
68
...
85
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel January 2022