dri-devel March 2022

dri-devel@lists.freedesktop.org

370 participants
780 discussions

Parallel modesets and private state objects broken, where to go with MST?
by Lyude Paul 25 Mar '22

25 Mar '22

Hi! First a little bit of background: I've recently been trying to get rid of all of the non-atomic payload bandwidth management code in the MST helpers in order to make it easier to implement DSC and fallback link rate retraining support down the line. Currently bandwidth information is stored in two places, partially in the MST atomic state and partially in the mst manager's payload table (which exists outside of the atomic state and has its own locking). The portions in the atomic state are used to try to determine if a given display configuration can fit within the given bandwidth limitations during the atomic check phase, and are implemented through the use of private state objects. My current goal has been to move as much of this as possible over to the atomic state and entirely get rid of the payload table along with it's locks. My main reason for doing this is that it both decomplicates things quite a bit, and I'm really also hoping that getting rid of that payload code will make it clearer to others how it works - and stop the influx of bandaid patches (e.g. adding more and more special cases to MST to fix poorly understood issues being hit in one specific driver and nowhere else) that I've had to spend way more time then I'd like trying to investigate and review. So, the actual problem: following a conversation with Daniel Vetter today I've gotten the impression that private modesetting objects are basically just broken with parallel modesets? I'm still wrapping my head around all of this honestly, but from what I've gathered: CRTC atomic infra knows how to do waits in the proper places for when other CRTCs need to be waited on to continue a modeset, but there's no such tracking with private objects. If I understand this correctly, that means that even if two CRTC modesets require pulling in the same private object state for the MST mgr: we're only provided a guarantee that the atomic checks pulling in that private object state won't concurrently. But when it comes to commits, it doesn't sound like there's any actual tracking for this and as such - two CRTC modesets which have both pulled in the MST private state object are not prevented from running concurrently. This unfortunately throws an enormous wrench into the MST atomic conversion I've been working on - as I was under the understanding while writing the code for this that all objects in an atomic state are blocked from being used in any new atomic commits (not checks, as parallel checks should be fine in my case) until there's no commits active with said object pulled into the atomic state. I certainly am not aware of any way parallel modesetting could actually be supported on MST, so it's not really a feature we want to deal with at all besides stopping it from happening. This also unfortunately means that the current atomic modesetting code we have for MST is potentially broken, although I assume we've never hit any real world issues with it because of the non-atomic locking we currently have for the payload table. So, Daniel had mentioned that supposedly you've been dealing with similar issues with VC4 and might have already made progress on coming up with ways to deal with it. If this is all correct, I'd definitely appreciate being able to take a look at your work on this to see how I can help move things forward. I've got a WIP of my atomic only MST branch as well: https://gitlab.freedesktop.org/lyudess/linux/-/commits/wip/mst-atomic-only-… However it's very certainly broken right now (it compiles and I had thought it worked already, but I realized I totally forgot to come up with a way of doing bookkeeping for VC start slots atomically - which is what led me down this current rabbit hole), but it should at least give a general idea of what I'm trying to do. Anyway, let me know what you think. -- Cheers, Lyude Paul (she/her) Software Engineer at Red Hat

5 8

[PATCH 0/9] drm/edid: constify EDID parsing
by Jani Nikula 25 Mar '22

25 Mar '22

Remove accidental (?) EDID modification while parsing, and constify EDID in most places during EDID parsing. In the future I'll want more clarity on who modifies the EDID and where, and I'll want the compiler to help. The EDID is still mutable in places that do validity checking and try to fix it in the process. I'll probably want to split the two into separate check and fix steps too, but that's for another series. This is based on current drm-tip, without the CEA iterators work. BR, Jani. Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Jani Nikula (9): drm/edid: don't modify EDID while parsing drm/edid: pass a timing pointer to is_display_descriptor() drm/edid: use struct detailed_timing member access in is_rb() drm/edid: use struct detailed_timing member access in gtf2 functions drm/edid: constify struct detailed_timing in lower level parsing drm/edid: constify struct detailed_timing in parsing callbacks drm/edid: constify struct edid passed to detailed blocks drm/edid: constify struct edid passed around in callbacks and closure drm/edid: add more general struct edid constness in the interfaces drivers/gpu/drm/drm_edid.c | 272 ++++++++++++++++++++----------------- include/drm/drm_edid.h | 10 +- 2 files changed, 153 insertions(+), 129 deletions(-) -- 2.30.2

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[PATCH v5 00/13] drm/msm: Add Display Stream Compression Support
by Vinod Koul 25 Mar '22

25 Mar '22

Display Stream Compression (DSC) compresses the display stream in host which is later decoded by panel. This series enables this for Qualcomm msm driver. This was tested on Google Pixel3 phone which use LGE SW43408 panel. The changes include DSC data and hardware block enabling for DPU1 then support in encoder. We also add support in DSI and introduce required topology changes. In order for panel to set the DSC parameters we add dsc in drm_panel and pass the dsc configuration from the panel driver We still have dsc as a globabl entity. I think while doing DP + DSC we should be able to update it, right now comprehending the requirements are bit difficult. Complete changes which enable this for Pixel3 along with panel driver (not part of this series) and DT changes can be found at: git.linaro.org/people/vinod.koul/kernel.git pixel/dsc_v5 Comments welcome! Changes since v4: - Use new apprach based on Abhinav suggestion for dsc with 3d-merge - Make common function for dsc timing caln and call that from video and cmd mode - update description for patch "Pass DSC params to drm_panel" - update couple of typos as pointed by Marijn - drop dpu_encoder_dsc_pclk_param_calc() as that was duplicating the caln done in dsi timing - Update copyright to 2022 to new files - Update Abhinav's email to new quic one Changes since v3: - Merge changes from Dmitry to have dsc per encoder instance - add warning for dsc and mode3d enabled together - set dsc in dpu_encoder_phys_vid as well - remove dsc hardcoded mask - use devm_kzalloc for memory allocation for dsc Changes since v2: - Fix comments by Dimitry except the dsc being global. - Move RM patch later for dependency on topology now - Add patch for mode valid callback for dsi_mgr - Add missing structure documentation patch - Fix errors in mode_3d changes - Rebase on v5.16-rc1 and test Changes since v1: - Fix various issues spotted by kbuildbot - Rebase to v5.15-rc3 - Remove unused fields and duplicate defines - Enable DSC blocks only when DSC is enabled - remove sdm845 feature mask, use 0 - Check for DSC in hw_ctl Changes since RFC: - Drop the DT binding patch as we derive the configuration from panel - Drop the drm api patch as we no longer need it (use pps drm api) - Fix comments raised by Dimitry - Add dsc parameters calculation from downstream Dmitry Baryshkov (1): drm/msm/dpu: don't use merge_3d if DSC merge topology is used Vinod Koul (12): drm/msm/dsi: add support for dsc data drm/msm/dsi: Pass DSC params to drm_panel drm/msm/disp/dpu1: Add support for DSC drm/msm/disp/dpu1: Add support for DSC in pingpong block drm/msm/disp/dpu1: Add DSC for SDM845 to hw_catalog drm/msm/disp/dpu1: Add DSC support in hw_ctl drm/msm/disp/dpu1: Add support for DSC in encoder drm/msm: Add missing num_dspp field documentation drm/msm/disp/dpu1: Add support for DSC in topology drm/msm/disp/dpu1: Add DSC support in RM drm/msm/dsi: add mode valid callback for dsi_mgr drm/msm/dsi: Add support for DSC configuration drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 155 +++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 6 + .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 12 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 ++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 210 ++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 77 +++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 13 + .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 ++ .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 56 ++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 + drivers/gpu/drm/msm/dsi/dsi.c | 5 + drivers/gpu/drm/msm/dsi/dsi.h | 3 + drivers/gpu/drm/msm/dsi/dsi.xml.h | 10 + drivers/gpu/drm/msm/dsi/dsi_host.c | 274 +++++++++++++++++- drivers/gpu/drm/msm/dsi/dsi_manager.c | 12 + drivers/gpu/drm/msm/msm_drv.h | 26 ++ include/drm/drm_panel.h | 7 + 24 files changed, 959 insertions(+), 4 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h -- 2.34.1

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[PATCH] drm/i915/uapi: Document DRM_I915_QUERY_HWCONFIG_BLOB
by Tvrtko Ursulin 25 Mar '22

25 Mar '22

From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> UAPI with absolutely no documentation should not have been added - clarify blob format and content will be described externally. Fixes: 78e1fb3112c0 ("drm/i915/uapi: Add query for hwconfig blob") Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Co-developed-by: Jordan Justen <jordan.l.justen(a)intel.com> Cc: Jon Bloomfield <jon.bloomfield(a)intel.com> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: John Harrison <john.c.harrison(a)intel.com> Cc: Jon Ewins <jon.ewins(a)intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> --- include/uapi/drm/i915_drm.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 071ffd9d51f1..8d0719bee8fc 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -2683,6 +2683,9 @@ struct drm_i915_perf_oa_config { * * The behaviour is determined by the @query_id. Note that exactly what * @data_ptr is also depends on the specific @query_id. + * + * For specific queries see: + * * `GuC HWCONFIG blob uAPI`_ */ struct drm_i915_query_item { /** @query_id: The id for this query */ @@ -3135,6 +3138,16 @@ struct drm_i915_query_memory_regions { struct drm_i915_memory_region_info regions[]; }; +/** + * DOC: GuC HWCONFIG blob uAPI + * + * The GuC produces a blob with information about the current device. + * i915 reads this blob from GuC and makes it available via this uAPI. + * + * The format and meading of the blob content are documented in the + * Programmer's Reference Manual. + */ + /** * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added * extension support using struct i915_user_extension. -- 2.32.0

2 2

[PATCH 1/2] drm/i915/ttm: limit where we apply TTM_PL_FLAG_CONTIGUOUS
by Matthew Auld 25 Mar '22

25 Mar '22

We only need this when allocating device local-memory, where this influences the drm_buddy. Currently there is some funny behaviour where an "in limbo" system memory object is lacking the relevant placement flags etc. before we first allocate the ttm_tt, leading to ttm performing a move when not needed, since the current placement is seen as not compatible. Suggested-by: Thomas Hellström <thomas.hellstrom(a)linux.intel.com> Fixes: 2ed38cec5606 ("drm/i915: opportunistically apply ALLOC_CONTIGIOUS") Signed-off-by: Matthew Auld <matthew.auld(a)intel.com> Cc: Nirmoy Das <nirmoy.das(a)linux.intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index e4a06fcf741a..97e648fa76bd 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -133,6 +133,9 @@ i915_ttm_place_from_region(const struct intel_memory_region *mr, memset(place, 0, sizeof(*place)); place->mem_type = intel_region_to_ttm_type(mr); + if (mr->type == INTEL_MEMORY_SYSTEM) + return; + if (flags & I915_BO_ALLOC_CONTIGUOUS) place->flags |= TTM_PL_FLAG_CONTIGUOUS; if (offset != I915_BO_INVALID_OFFSET) { -- 2.34.1

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[PATCH v3 0/6] drm/msm: rework MDSS drivers
by Dmitry Baryshkov 25 Mar '22

25 Mar '22

These patches coninue work started by AngeloGioacchino Del Regno in the previous cycle by further decoupling and dissecting MDSS and MDP drivers probe/binding paths. This removes code duplication between MDP5 and DPU1 MDSS drivers, by merging them and moving to the top level. This patchset depends on the patches 1 and 2 from [1] Changes since v3: - Rebased on top of current msm/msm-next - Fixed issue with enabling/disabling MDP4/MDP5 vs DSI driver (per Stephen's suggestion) - Reworked mdss_probe to remove extra platform_set_drvdata calls (per Stephen's suggestion) - Fixed a typo in the Kconfig (noted by Rob) - Added a patch to move component mastership from mdss to mdp5/dpu1 devices Changes since v2: - Rebased on top of current msm/msm-next(-staging) - Allow disabling MDP4/MDP5/DPU/HDMI components (like we do for DP and DSI) - Made mdp5_mdss_parse_clock() static - Changed mdp5 to is_mdp5 argument in several functions - Dropped boolean device data from the mdss driver - Reworked error handling in msm_pdev_probe() - Removed unused header inclusion - Dropped __init/__exit from function prototypes Changes since v1: - Rebased on top of [2] and [1] [1] https://patchwork.freedesktop.org/series/99066/ [2] https://patchwork.freedesktop.org/series/98521/ Dmitry Baryshkov (6): drm/msm: unify MDSS drivers drm/msm: remove extra indirection for msm_mdss drm/msm: split the main platform driver drm/msm: stop using device's match data pointer drm/msm: allow compile time selection of driver components drm/msm: make mdp5/dpu devices master components drivers/gpu/drm/msm/Kconfig | 50 ++- drivers/gpu/drm/msm/Makefile | 25 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 78 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 260 ------------ .../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 + drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 54 ++- .../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 + drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 54 +-- drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------ drivers/gpu/drm/msm/msm_drv.c | 261 +++--------- drivers/gpu/drm/msm/msm_drv.h | 61 ++- drivers/gpu/drm/msm/msm_kms.h | 21 - drivers/gpu/drm/msm/msm_mdss.c | 379 ++++++++++++++++++ 13 files changed, 645 insertions(+), 856 deletions(-) delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c create mode 100644 drivers/gpu/drm/msm/msm_mdss.c -- 2.35.1

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[PATCH] drm/mm: Fix the param description for 'size' tag
by Cai Huoqing 25 Mar '22

25 Mar '22

Using "size of" instead of "end of" to fix the description for 'size' tag. Signed-off-by: Cai Huoqing <cai.huoqing(a)linux.dev> --- drivers/gpu/drm/drm_mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index 8257f9d4f619..c2eedfd264f8 100644 --- a/drivers/gpu/drm/drm_mm.c +++ b/drivers/gpu/drm/drm_mm.c @@ -956,7 +956,7 @@ EXPORT_SYMBOL(drm_mm_scan_color_evict); * drm_mm_init - initialize a drm-mm allocator * @mm: the drm_mm structure to initialize * @start: start of the range managed by @mm - * @size: end of the range managed by @mm + * @size: size of the range managed by @mm * * Note that @mm must be cleared to 0 before calling this function. */ -- 2.25.1

1 1

[Bug 215727] New: drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx_0.0.0 timeout when using firefox, chrome or icaclient
by bugzilla-daemon＠kernel.org 25 Mar '22

25 Mar '22

https://bugzilla.kernel.org/show_bug.cgi?id=215727 Bug ID: 215727 Summary: drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx_0.0.0 timeout when using firefox, chrome or icaclient Product: Drivers Version: 2.5 Kernel Version: 5.16.15-arch1-1 Hardware: Intel OS: Linux Tree: Mainline Status: NEW Severity: high Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: scallar(a)poczta.fm Regression: No Created attachment 300599 --> https://bugzilla.kernel.org/attachment.cgi?id=300599&action=edit Dmesg Hi, Symptoms: I have installed an AMD Radeon RX 6700-XT card and started having following random crashes when using a browser or icaclient (Citrix client): [ 85.861734] [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx_0.0.0 timeout, signaled seq=13365, emitted seq=13367 [ 85.862162] [drm:amdgpu_job_timedout [amdgpu]] *ERROR* Process information: process kwin_x11 pid 819 thread kwin_x11:cs0 pid 838 Display hangs/ becomes glitched. Steps to reproduce: Happens randomly when using a browser (tested firefox and chrome-based) or icaclient. I get this error several times every day. Happens in Xorg, also in Wayland. Process mentioned in the error is not always window manager (kwin_x11). Sometimes it's Xorg (or Xwayland), sometimes app (i.e. firefox). System: Archlinux (linux-firmware 20220309.cd01f85-1) DE: KDE 5.24.3 / mesa 21.3.7 Logs: In this case of attached dmesg I was using kwin on Xorg and just started firefox (hardware acceleration was on). Same thing happens when using icaclient (very frequent crashes, but hard to reproduce on demand). Afterwards, i have also tried collecting gfx_0.0.0 data with umr: umr -R gfx_0.0.0 This also resulted with crash: [ 171.047397] BUG: unable to handle page fault for address: ffffb34e820ffffc (full log at the end of attached dmesg). If you need additional data I can reproduce this error. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

1 2

[GIT PULL] mediatek drm fixes - 20220325
by Chun-Kuang Hu 24 Mar '22

24 Mar '22

Hi, Dave & Daniel: This includes: 1. Fix dt-binding issue. Regards, Chun-Kuang. The following changes since commit 71941773e143369a73c9c4a3b62fbb60736a1182: Add linux-next specific files for 20220310 (2022-03-10 20:04:36 +1100) are available in the git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git tags/mediatek-drm-fixes-20220325 for you to fetch changes up to 64884e592d71fd567fef7bdcb0736a5dae71ecb2: dt-bindings: display: mediatek: Fix examples on new bindings (2022-03-12 17:32:33 +0800) ---------------------------------------------------------------- Mediatek DRM Fixes - 20220325 1. Fix dt-binding issue. ---------------------------------------------------------------- AngeloGioacchino Del Regno (3): dt-bindings: display: mediatek, mutex: Fix mediatek, gce-events type dt-bindings: display: mediatek, ovl: Fix 'iommu' required property typo dt-bindings: display: mediatek: Fix examples on new bindings jason-jh.lin (1): Revert "dt-bindings: display: mediatek: add ethdr definition for mt8195" .../bindings/display/mediatek/mediatek,aal.yaml | 23 +++- .../bindings/display/mediatek/mediatek,ccorr.yaml | 23 +++- .../bindings/display/mediatek/mediatek,color.yaml | 23 +++- .../bindings/display/mediatek/mediatek,dither.yaml | 23 +++- .../bindings/display/mediatek/mediatek,dpi.yaml | 3 +- .../bindings/display/mediatek/mediatek,dsc.yaml | 23 +++- .../bindings/display/mediatek/mediatek,ethdr.yaml | 147 --------------------- .../bindings/display/mediatek/mediatek,gamma.yaml | 23 +++- .../bindings/display/mediatek/mediatek,merge.yaml | 49 +++---- .../bindings/display/mediatek/mediatek,mutex.yaml | 27 ++-- .../bindings/display/mediatek/mediatek,od.yaml | 14 +- .../bindings/display/mediatek/mediatek,ovl-2l.yaml | 26 ++-- .../bindings/display/mediatek/mediatek,ovl.yaml | 28 ++-- .../display/mediatek/mediatek,postmask.yaml | 23 +++- .../bindings/display/mediatek/mediatek,rdma.yaml | 28 ++-- .../bindings/display/mediatek/mediatek,split.yaml | 17 ++- .../bindings/display/mediatek/mediatek,ufoe.yaml | 19 ++- .../bindings/display/mediatek/mediatek,wdma.yaml | 26 ++-- 18 files changed, 262 insertions(+), 283 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml

2 1

[PATCH] dt-bindings: display: mediatek: Add includes on examples
by Corentin Labbe 24 Mar '22

24 Mar '22

make dt_binding_check fail on lot of mediatek bindings due to missing includes. Signed-off-by: Corentin Labbe <clabbe(a)baylibre.com> --- 2 files remains to be fixed, but their examples use some variable undefined, so I cannot do anything: - display/mediatek/mediatek,ethdr.yaml - display/mediatek/mediatek,merge.yaml .../display/mediatek/mediatek,aal.yaml | 4 + .../display/mediatek/mediatek,ccorr.yaml | 4 + .../display/mediatek/mediatek,color.yaml | 4 + .../display/mediatek/mediatek,dither.yaml | 4 + .../display/mediatek/mediatek,dsc.yaml | 4 + .../display/mediatek/mediatek,gamma.yaml | 4 + .../display/mediatek/mediatek,mutex.yaml | 4 + .../display/mediatek/mediatek,od.yaml | 1 + .../display/mediatek/mediatek,ovl-2l.yaml | 5 + .../display/mediatek/mediatek,ovl.yaml | 5 + .../display/mediatek/mediatek,postmask.yaml | 4 + .../display/mediatek/mediatek,rdma.yaml | 5 + .../display/mediatek/mediatek,split.yaml | 3 + .../display/mediatek/mediatek,ufoe.yaml | 3 + .../display/mediatek/mediatek,wdma.yaml | 5 + 17 files changed, 59 insertions(+), 257 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 225f9dd726d2..63755d4d21d7 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -66,6 +66,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> aal@14015000 { compatible = "mediatek,mt8173-disp-aal"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml index 6894b6999412..b32355b32dfa 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml @@ -65,6 +65,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8183-power.h> ccorr0: ccorr@1400f000 { compatible = "mediatek,mt8183-disp-ccorr"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index bc83155b3b4c..ffdef0b30de8 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -75,6 +75,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> color0: color@14013000 { compatible = "mediatek,mt8173-disp-color"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml index 9d89297f5f1d..7ac58022a2ed 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml @@ -65,6 +65,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8183-power.h> dither0: dither@14012000 { compatible = "mediatek,mt8183-disp-dither"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml index 1ec083eff824..1ab30b0efffe 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml @@ -60,6 +60,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/gce/mt8195-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8195-power.h> dsc0: disp_dsc_wrap@1c009000 { compatible = "mediatek,mt8195-disp-dsc"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml index 247baad147b3..4f8ba492dc0a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml @@ -66,6 +66,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> gamma@14016000 { compatible = "mediatek,mt8173-disp-gamma"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml index 6eca525eced0..ad3a69d1254c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml @@ -71,6 +71,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> mutex: mutex@14020000 { compatible = "mediatek,mt8173-disp-mutex"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml index 7519db315217..1f92566ff5ed 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml @@ -45,6 +45,7 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> od@14023000 { compatible = "mediatek,mt8173-disp-od"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml index e3cef99d0f98..e810e152404a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml @@ -66,6 +66,11 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + #include <dt-bindings/power/mt8183-power.h> ovl_2l0: ovl@14009000 { compatible = "mediatek,mt8183-disp-ovl-2l"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index 93d5c68a2dbd..14673f979edc 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -81,6 +81,11 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/mt8173-larb-port.h> + #include <dt-bindings/power/mt8173-power.h> ovl0: ovl@1400c000 { compatible = "mediatek,mt8173-disp-ovl"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml index 6ac1da2e8871..d0d45d1e4f15 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml @@ -58,6 +58,10 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8192-clk.h> + #include <dt-bindings/gce/mt8192-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8192-power.h> postmask0: postmask@1400d000 { compatible = "mediatek,mt8192-disp-postmask"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml index b56e22fbcd52..2265fef6a795 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml @@ -94,6 +94,11 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/mt8173-larb-port.h> + #include <dt-bindings/power/mt8173-power.h> rdma0: rdma@1400e000 { compatible = "mediatek,mt8173-disp-rdma"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml index 4f08e89c1067..83e6cb40ba7c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml @@ -49,6 +49,9 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> split0: split@14018000 { compatible = "mediatek,mt8173-disp-split"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml index 6e8748529e73..69cddc2ee531 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml @@ -51,6 +51,9 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/mt8173-power.h> ufoe@1401a000 { compatible = "mediatek,mt8173-disp-ufoe"; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml index f9f00a518edf..60e9f890ebf1 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml @@ -64,6 +64,11 @@ additionalProperties: false examples: - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/gce/mt8173-gce.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/mt8173-larb-port.h> + #include <dt-bindings/power/mt8173-power.h> wdma0: wdma@14011000 { compatible = "mediatek,mt8173-disp-wdma"; -- 2.34.1

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dri-devel March 2022