dri-devel March 2022

dri-devel@lists.freedesktop.org

370 participants
780 discussions

[PATCH] drm/bridge: nwl-dsi: switch to devm_drm_of_get_bridge
by José Expósito 01 Mar '22

01 Mar '22

The function "drm_of_find_panel_or_bridge" has been deprecated in favor of "devm_drm_of_get_bridge". Switch to the new function and reduce boilerplate. Signed-off-by: José Expósito <jose.exposito89(a)gmail.com> --- drivers/gpu/drm/bridge/nwl-dsi.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c index af07eeb47ca0..df3be9dd24fb 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -909,19 +909,12 @@ static int nwl_dsi_bridge_attach(struct drm_bridge *bridge, { struct nwl_dsi *dsi = bridge_to_dsi(bridge); struct drm_bridge *panel_bridge; - struct drm_panel *panel; - int ret; - ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0, &panel, - &panel_bridge); - if (ret) - return ret; + panel_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, + 1, 0); + if (IS_ERR(panel_bridge)) + return PTR_ERR(panel_bridge); - if (panel) { - panel_bridge = drm_panel_bridge_add(panel); - if (IS_ERR(panel_bridge)) - return PTR_ERR(panel_bridge); - } dsi->panel_bridge = panel_bridge; if (!dsi->panel_bridge) -- 2.25.1

2 1

[PATCH 0/7] drm/i915: Use the memcpy_from_wc function from drm
by Balasubramani Vivekanandan 01 Mar '22

01 Mar '22

drm_memcpy_from_wc() performs fast copy from WC memory type using non-temporal instructions. Now there are two similar implementations of this function. One exists in drm_cache.c as drm_memcpy_from_wc() and another implementation in i915/i915_memcpy.c as i915_memcpy_from_wc(). drm_memcpy_from_wc() was the recent addition through the series https://patchwork.freedesktop.org/patch/436276/?series=90681&rev=6 The goal of this patch series is to change all users of i915_memcpy_from_wc() to drm_memcpy_from_wc() and a have common implementation in drm and eventually remove the copy from i915. Another benefit of using memcpy functions from drm is that drm_memcpy_from_wc() is available for non-x86 architectures. i915_memcpy_from_wc() is implemented only for x86 and prevents building i915 for ARM64. drm_memcpy_from_wc() does fast copy using non-temporal instructions for x86 and for other architectures makes use of memcpy() family of functions as fallback. Another major difference is unlike i915_memcpy_from_wc(), drm_memcpy_from_wc() will not fail if the passed address argument is not alignment to be used with non-temporal load instructions or if the platform lacks support for those instructions (non-temporal load instructions are provided through SSE4.1 instruction set extension). Instead drm_memcpy_from_wc() continues with fallback functions to complete the copy. This relieves the caller from checking the return value of i915_memcpy_from_wc() and explicitly using a fallback. Follow up series will be created to remove the memcpy_from_wc functions from i915 once the dependency is completely removed. Cc: Jani Nikula <jani.nikula(a)intel.com> Cc: Lucas De Marchi <lucas.demarchi(a)intel.com> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Chris Wilson <chris.p.wilson(a)intel.com> Cc: Thomas Hellstr_m <thomas.hellstrom(a)linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin(a)linux.intel.com> Balasubramani Vivekanandan (7): drm: Relax alignment constraint for destination address drm: Add drm_memcpy_from_wc() variant which accepts destination address drm/i915: use the memcpy_from_wc call from the drm drm/i915/guc: use the memcpy_from_wc call from the drm drm/i915/selftests: use the memcpy_from_wc call from the drm drm/i915/gt: Avoid direct dereferencing of io memory drm/i915: Avoid dereferencing io mapped memory drivers/gpu/drm/drm_cache.c | 98 +++++++++++++++++-- drivers/gpu/drm/i915/gem/i915_gem_object.c | 8 +- drivers/gpu/drm/i915/gt/selftest_reset.c | 21 ++-- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 11 ++- drivers/gpu/drm/i915/i915_gpu_error.c | 45 +++++---- .../drm/i915/selftests/intel_memory_region.c | 8 +- include/drm/drm_cache.h | 3 + 7 files changed, 148 insertions(+), 46 deletions(-) -- 2.25.1

3 16

[PATCH] drm/amdgpu: fix suspend/resume hang regression
by Qiang Yu 01 Mar '22

01 Mar '22

Regression has been reported that suspend/resume may hang with the previous vm ready check commit: https://gitlab.freedesktop.org/drm/amd/-/issues/1915#note_1278198 So bring back the evicted list check as a temp fix. Fixes: cc8dd2cc1a97 ("drm/amdgpu: check vm ready by amdgpu_vm->evicting flag") Signed-off-by: Qiang Yu <qiang.yu(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 2cd9f1a2e5fa..fc4563cf2828 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -779,7 +779,8 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm) amdgpu_vm_eviction_lock(vm); ret = !vm->evicting; amdgpu_vm_eviction_unlock(vm); - return ret; + + return ret && list_empty(&vm->evicted); } /** -- 2.25.1

2 1

[PATCH v5 0/7] Overhaul `is_thunderbolt`
by Mario Limonciello 01 Mar '22

01 Mar '22

Various drivers in the kernel use `is_thunderbolt` or `pci_is_thunderbolt_attached` to designate behaving differently from a device that is internally in the machine. This currently works by an attribute in PCI core "is_thunderbolt" which makes those drivers only apply differences when Intel Thunderbolt controllers are encountered. In each of these drivers' cases the code should apply whether it's another vendor's USB4 controller or an Intel USB4/TBT3 controller. As such, overhaul the use of "is_thunderbolt" in the PCI core to instead rally around the device core "external" attribute. This means dropping the extra PCI core attribute and the extra function designation to indicate thunderbolt attached. Changes from v4->v5: - Drop USB4 related patches. Thoes may come at a later time if they're proven to be needed. At least in the integrated case vendors should be setting the _DSD to indicate the port is externally facing. For the discrete case we may bring it back later. Changes from v3->v4: - Add tags from last review where applicable - Update titles of different patches - Add more comments and commit messages to various patches to address comments raised in review - Re-order the patch series, moving more contentious patches later - Drop patch marking NHI removable - Drop patch changing gmux on it's own, roll into patch to drop `is_thunderbolt` - Modify patch to mark integrated USB4 tunnel PCIe root ports as "external" instead of removable. - Modify patch to mark discrete USB4 tunnel root ports as "external" instead of removable. - Fix bit mask error in discrete USB4 tunnel patch - Fix USB IF vendor designation location in pci_ids.h Changes from v2->v3: - Add various tags for patches that haven't changed from v2->v3 - Add new patches for Mika's suggestions: * Moving Apple Thunderbolt D3 declaration into quirks * Detect PCIe root port used for PCIe tunneling on integrated controllers using `usb4-host-interface` * Detect PCIe root port used for PCIe tunneling on discrete controllers using the USB4 DVSEC specification Changes from v1->v2: - Add Alex's tag to first patch - Move lack of command completion into a quirk (Lukas) - Drop `is_thunderbolt` attribute and `pci_is_thunderbolt_attached` and use device core removable attribute instead - Adjust all consumers of old attribute to use removable Note: this spans USB/DRM/platform-x86/PCI trees. As a majority of the changes are in PCI, it should probably come through that tree if possible. Mario Limonciello (7): PCI: Move `is_thunderbolt` check for lack of command completed to a quirk PCI: Move check for old Apple Thunderbolt controllers into a quirk PCI: Drop the `is_thunderbolt` attribute from PCI core drm/amd: drop the use of `pci_is_thunderbolt_attached` drm/nouveau: drop the use of `pci_is_thunderbolt_attached` drm/radeon: drop the use of `pci_is_thunderbolt_attached` PCI: drop `pci_is_thunderbolt_attached` drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 2 +- drivers/gpu/drm/nouveau/nouveau_vga.c | 4 +- drivers/gpu/drm/radeon/radeon_device.c | 4 +- drivers/gpu/drm/radeon/radeon_kms.c | 2 +- drivers/pci/hotplug/pciehp_hpc.c | 6 +- drivers/pci/pci.c | 17 +++-- drivers/pci/probe.c | 2 +- drivers/pci/quirks.c | 84 +++++++++++++++++++++++++ drivers/platform/x86/apple-gmux.c | 2 +- include/linux/pci.h | 25 +------- 11 files changed, 108 insertions(+), 42 deletions(-) -- 2.34.1

6 17

linux-next: build failure after merge of the drm tree
by broonie＠kernel.org 01 Mar '22

01 Mar '22

Hi all, After merging the drm tree, today's linux-next build (x86 allmodconfig) failed like this: lib/strncpy_from_user.o: warning: objtool: strncpy_from_user()+0x10b: call to do_strncpy_from_user() with UACCESS enabled lib/strnlen_user.o: warning: objtool: strnlen_user()+0xbb: call to do_strnlen_user() with UACCESS enabled /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c: In function 'receive_timing_debugfs_show': /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3077:23: error: array subscript 4096 is outside array bounds of 'u8[200]' {aka 'unsigned char[200]'} [-Werror=array-bounds] 3077 | u8 *str = read_buf, *end = read_buf + PAGE_SIZE; | ^~~ /tmp/next/build/drivers/gpu/drm/bridge/ite-it6505.c:3076:5: note: while referencing 'read_buf' 3076 | u8 read_buf[READ_BUFFER_SIZE]; | ^~~~~~~~ cc1: all warnings being treated as errors Caused by commit b5c84a9edcd418 ("drm/bridge: add it6505 driver") I have used the drm tree from yesterday instead.

5 5

[PATCH v4,0/5] add display support for MediaTek SoC MT8186
by Rex-BC Chen 01 Mar '22

01 Mar '22

v4: 1. Remove binding of dsi and dpi. 2. Revise aal binding. 3. Fix indention in [4/5]. v3: 1. Modify display binding based on mtk display binding patch. ([1]) 2. Remove patch: drm/mediatek: separate postmask component from mtk_disp_drv.c 3. Remove compatible of 8186 ovl because we can re-use compatible of 8192 for 8186. 4. Fix issue of space before tab on mutex patch. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/comm… v2: 1. Add binding documentation for mmsys, mutex and mtk_display. 2. Remove duplicated definition of postmask registers on mtk_drm_drv. 3. Add disp_ovl support for MT8186. 4. Add detailed commit messages. Rex-BC Chen (2): dt-bindings: arm: mediatek: mmsys: add support for MT8186 dt-bindings: display: mediatek: add MT8186 SoC binding Yongqiang Niu (3): soc: mediatek: mmsys: add mt8186 mmsys routing table soc: mediatek: add MTK mutex support for MT8186 drm/mediatek: add display support for MT8186 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 + .../display/mediatek/mediatek,aal.yaml | 7 ++ .../display/mediatek/mediatek,ccorr.yaml | 5 + .../display/mediatek/mediatek,color.yaml | 1 + .../display/mediatek/mediatek,dither.yaml | 1 + .../display/mediatek/mediatek,gamma.yaml | 1 + .../display/mediatek/mediatek,mutex.yaml | 2 + .../display/mediatek/mediatek,ovl-2l.yaml | 5 + .../display/mediatek/mediatek,ovl.yaml | 5 + .../display/mediatek/mediatek,postmask.yaml | 5 + .../display/mediatek/mediatek,rdma.yaml | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 33 +++++ drivers/soc/mediatek/mt8186-mmsys.h | 113 ++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 ++ drivers/soc/mediatek/mtk-mutex.c | 45 +++++++ 15 files changed, 236 insertions(+) create mode 100644 drivers/soc/mediatek/mt8186-mmsys.h -- 2.18.0

3 10

[pull] amdgpu, amdkfd drm-next-5.18
by Alex Deucher 01 Mar '22

01 Mar '22

Hi Dave, Daniel, New stuff for 5.18. The following changes since commit b63c54d978236dd6014cf2ffba96d626e97c915c: drm/amdkfd: Use proper enum in pm_unmap_queues_v9() (2022-02-17 15:59:06 -0500) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-next-5.18-2022-02-25 for you to fetch changes up to 111aeed25ec6bf4d5b4a7b4cb5654f002ba9f795: drm/amdgpu: add gfxoff support for smu 13.0.5 (2022-02-25 11:51:18 -0500) ---------------------------------------------------------------- amd-drm-next-5.18-2022-02-25: amdgpu: - Raven2 suspend/resume fix - SDMA 5.2.6 updates - VCN 3.1.2 updates - SMU 13.0.5 updates - DCN 3.1.5 updates - Virtual display fixes - SMU code cleanup - Harvest fixes - Expose benchmark tests via debugfs - Drop no longer relevant gart aperture tests - More RAS restructuring - W=1 fixes - PSR rework - DP/VGA adapter fixes - DP MST fixes - GPUVM eviction fix - GPU reset debugfs register dumping support - Misc display fixes - SR-IOV fix - Aldebaran mGPU fix - Add module parameter to disable XGMI for testing amdkfd: - IH ring overflow logging fixes - CRIU fixes - Misc fixes ---------------------------------------------------------------- Alex Deucher (13): drm/amdkfd: make CRAT table missing message informational only drm/amdgpu/benchmark: use dev_info rather than DRM macros for logging drm/amdgpu: plumb error handling though amdgpu_benchmark() drm/amdgpu: print the selected benchmark test in the log drm/amdgpu: add a benchmark mutex drm/amdgpu: expose benchmarks via debugfs drm/amdgpu: drop benchmark module parameter drm/amdgpu: drop testing module parameter drm/amdgpu/display: split dmcu and gpuvm handling logic drm/amdgpu: derive GTT display support from DM drm/amdgpu: use kernel BO API for benchmark buffer management drm/amdgpu: use ktime rather than jiffies for benchmark results drm/amdgpu: fix typo in amdgpu_discovery.c Alex Sierra (1): drm/amdgpu: Add use_xgmi_p2p module parameter Andrey Grodzovsky (1): drm/amdgpu: Exclude PCI reset method for now. Aric Cyr (1): drm/amd/display: 3.2.174 Boyuan Zhang (2): drm/amdgpu/vcn: add vcn support for vcn 3.1.2 drm/amdgpu: enable vcn pg and cg for vcn 3.1.2 Charlene Liu (1): drm/amd/display: add debug option to bypass ssinfo from bios. Chen Gong (1): drm/amdgpu: do not enable asic reset for raven2 Danijel Slivka (1): amdgpu/pm: Disable managing hwmon sysfs attributes for ONEVF mode David Yat Sin (1): drm/amdkfd: Fix for possible integer overflow Dmytro Laktyushkin (2): drm/amd/display: limit unbounded requesting to 5k drm/amd/display: revert populating dcn315 clk table based on dcfclk Duncan Ma (2): drm/amd/display: Set compbuf size to min at prep prevent overbook crb drm/amd/display: Set compbuf size to min at prep prevent overbook crb Fangzhi Zuo (1): drm/amd/display: Ignore Transitional Invalid Link Rate Error Message Felix Kuehling (2): drm/amdkfd: Fix criu_restore_bo error handling drm/amdkfd: Use real device for messages George Shen (1): drm/amd/display: Refactor fixed VS logic for non-transparent mode Guchun Chen (3): Revert "drm/amdgpu: add modifiers in amdgpu_vkms_plane_init()" drm/amdgpu: bypass tiling flag check in virtual display case (v2) drm/amdgpu: read harvest bit per IP data on legacy GPUs Harish Kasiviswanathan (1): drm/amdkfd: Print bdf in peer map failure message Ilya (1): drm/amd/display: Fix wrong resolution with DP/VGA adapter Kent Russell (1): drm/amdkfd: Drop IH ring overflow message to dbg Leo Li (1): drm/amd/display: Fix DC definition of PMFW Pstate table for DCN316 Lijo Lazar (1): drm/amd/pm: Fix missing prototype warning Magali Lemes (4): drm/amd/display: Adjust functions documentation drm/amd/display: Add conditional around function drm/amd/display: Use NULL instead of 0 drm/amd/display: Turn functions into static Maíra Canal (9): drm/amdgpu: Change amdgpu_ras_block_late_init_default function scope drm/amdgpu: Remove unused get_umc_v8_7_channel_index function drm/amd/display: Remove unused temp variable drm/amd/display: Remove unused dcn316_smu_set_voltage_via_phyclk function drm/amd/display: Remove vupdate_int_entry definition drm/amd/display: Remove unused dmub_outbox_irq_info_funcs variable drm/amd/display: Remove unused variable drm/amd/display: Add missing prototypes to dcn201_init drm/amd/display: Turn global functions into static functions Paul Hsieh (1): drm/amd/display: lock/un-lock cursor if odm pipe split used Paul Menzel (1): drm/amdgpu: Fix typo in *whether* in comment Po Ting Chen (1): drm/amd/display: Refactor PSR DPCD caps detection Prike Liang (4): drm/amdgpu: enable TMZ option for onwards asic drm/amd/pm: validate SMU feature enable message for getting feature enabled mask drm/amdgpu/nv: enable gfx10.3.7 clock gating support drm/amdgpu/nv: set mode2 reset for MP1 13.0.8 Qiang Yu (1): drm/amdgpu: check vm ready by amdgpu_vm->evicting flag Qingqing Zhuo (11): drm/amd/include: add DCN 3.1.5 registers drm/amd/display: Add DCN315 family information drm/amd/display: Add DCN315 CLK_MGR drm/amd/display: Add DCN315 GPIO drm/amd/display: Add DCN315 IRQ drm/amd/display: Add DCN315 DMUB drm/amd/display: Add DCN315 Resource drm/amd/display: Add DCN315 Command Table Helper drm/amd/display: Add DCN315 blocks to Makefile drm/amd/display: Add DCN315 CORE drm/amd/display: Add DCN315 DM Support Somalapuram Amaranath (2): drm/amdgpu: add debugfs for reset registers list drm/amdgpu: add reset register dump trace on GPU Sung Joon Kim (1): drm/amd/display: increasing DRAM BW percent for DCN315 Wayne Lin (1): drm/amd/display: clear remote dc_sink when stop mst Wenjing Liu (1): drm/amd/display: add cable ID support for usb c connector Xiaogang Chen (1): drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARK Yifan Zhang (13): drm/amdgpu: add support for sdma 5.2.6 drm/amdgpu: add support for nbio 7.3.0 drm/amdgpu: add smuio support for smuio 13.0.10 drm/amdgpu: add support for psp 13.0.5 drm/admgpu/pm: add smu 13.0.5 driver interface headers drm/amd/pm: update smc message sequence for smu 13.0.5 drm/amd/pm: add smu_v13_0_5_ppt implementation drm/amdgpu: add mp 13.0.5 header files drm/amdgpu: add dm ip block for dcn 3.1.5 drm/amdgpu: add mode2 reset support for smu 13.0.5 drm/amd/pm: fix mode2 reset fail for smu 13.0.5 drm/amd/pm: refine smu 13.0.5 pp table code drm/amdgpu: add gfxoff support for smu 13.0.5 yipechai (1): drm/amdgpu: Fixed warning reported by kernel test robot drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 17 +- drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 244 +- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 105 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 36 +- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 132 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 32 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 250 - drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 16 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 + drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h | 3 +- drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 3 + drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 + drivers/gpu/drm/amd/amdgpu/nv.c | 22 +- drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 7 + drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 11 +- drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +- drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 7 - drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 20 +- drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +- drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c | 8 +- drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 - .../gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 2 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 61 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 6 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 1 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 24 +- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 58 +- drivers/gpu/drm/amd/display/dc/Makefile | 1 + .../amd/display/dc/bios/command_table_helper2.c | 1 + drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile | 9 + drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 23 +- .../amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 2 + .../dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c | 3 +- .../amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 2 + .../amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 617 + .../amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.h | 49 + .../drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c | 314 + .../drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.h | 126 + .../amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 13 +- .../drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 18 +- .../drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.h | 9 + drivers/gpu/drm/amd/display/dc/core/dc.c | 6 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 35 +- drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 3 + drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 230 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 10 +- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 7 +- drivers/gpu/drm/amd/display/dc/dc.h | 9 +- drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 31 +- drivers/gpu/drm/amd/display/dc/dc_link.h | 8 +- .../amd/display/dc/dce110/dce110_hw_sequencer.c | 4 +- .../drm/amd/display/dc/dce112/dce112_resource.c | 2 +- .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 - drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 12 +- .../gpu/drm/amd/display/dc/dcn201/dcn201_init.c | 1 + drivers/gpu/drm/amd/display/dc/dcn315/Makefile | 56 + .../drm/amd/display/dc/dcn315/dcn315_resource.c | 2304 + .../drm/amd/display/dc/dcn315/dcn315_resource.h | 42 + .../drm/amd/display/dc/dml/display_mode_structs.h | 1 + drivers/gpu/drm/amd/display/dc/gpio/Makefile | 8 + .../amd/display/dc/gpio/dcn315/hw_factory_dcn315.c | 260 + .../amd/display/dc/gpio/dcn315/hw_factory_dcn315.h | 31 + .../display/dc/gpio/dcn315/hw_translate_dcn315.c | 374 + .../display/dc/gpio/dcn315/hw_translate_dcn315.h | 33 + drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | 4 + drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | 4 + drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +- drivers/gpu/drm/amd/display/dc/irq/Makefile | 8 + .../amd/display/dc/irq/dcn20/irq_service_dcn20.c | 2 +- .../amd/display/dc/irq/dcn201/irq_service_dcn201.c | 5 - .../amd/display/dc/irq/dcn21/irq_service_dcn21.c | 14 - .../amd/display/dc/irq/dcn30/irq_service_dcn30.c | 2 +- .../amd/display/dc/irq/dcn315/irq_service_dcn315.c | 438 + .../amd/display/dc/irq/dcn315/irq_service_dcn315.h | 34 + drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 44 + drivers/gpu/drm/amd/display/dmub/src/Makefile | 4 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c | 62 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h | 68 + drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 9 +- drivers/gpu/drm/amd/display/include/dal_asic_id.h | 6 + drivers/gpu/drm/amd/display/include/dal_types.h | 1 + .../drm/amd/display/include/ddc_service_types.h | 1 + .../amd/include/asic_reg/dcn/dcn_3_1_5_offset.h | 15191 +++ .../amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h | 62061 +++++++++++ .../amd/include/asic_reg/dpcs/dpcs_4_2_2_offset.h | 11957 ++ .../amd/include/asic_reg/dpcs/dpcs_4_2_2_sh_mask.h | 103633 ++++++++++++++++++ .../drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h | 2 + .../drm/amd/include/asic_reg/mp/mp_13_0_5_offset.h | 455 + .../amd/include/asic_reg/mp/mp_13_0_5_sh_mask.h | 672 + drivers/gpu/drm/amd/pm/amdgpu_pm.c | 4 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 + .../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h | 140 + .../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_pmfw.h | 126 + .../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h | 74 + drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 + drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 1 + .../drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +- drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 12 +- drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile | 2 +- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 + .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 1057 + .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.h | 29 + drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 82 +- 113 files changed, 201304 insertions(+), 720 deletions(-) delete mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_test.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn315/Makefile create mode 100644 drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.h create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.c create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_5_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_2_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_2_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_5_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_5_sh_mask.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_pmfw.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.h

3 3

[PATCH v4 0/2] Fix mediatek-drm suspend and resume issue
by jason-jh.lin 01 Mar '22

01 Mar '22

Change in v4: - change completment function to wait_for_event. - release the mbox channel when device_link_add fail with cmdq and still return 0 because drm can configure register by cpu. Change in v3: - fix return typo: modify -NOEDV to -ENODEV. - add missing complete function in ddp_cmdq_cb. Change in v2: - rollback adding cmdq_mbox_flush in cmdq_suspend and add blocking config mode for mtk_drm_crtc_atomic_disable. - add return error when device_link_add fail. - change the first parameter of device_link_add from dev to priv->dev. jason-jh.lin (2): drm/mediatek: add wait_for_event for crtc disable by cmdq drm/mediatek: add devlink to cmdq dev drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 51 ++++++++++++++++++++----- 1 file changed, 41 insertions(+), 10 deletions(-) -- 2.18.0

3 7

linux-next: manual merge of the drm tree with the v4l-dvb tree
by Stephen Rothwell 01 Mar '22

01 Mar '22

Hi all, Today's linux-next merge of the drm tree got a conflict in: Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt between commit: 6d0990e6e844 ("media: dt-binding: mediatek: Get rid of mediatek,larb for multimedia HW") from the v4l-dvb tree and commit: 4ed545e7d100 ("dt-bindings: display: mediatek: disp: split each block to individual yaml") from the drm tree. I fixed it up (I deleted the file and added the following merge fix patch) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts. From: Stephen Rothwell <sfr(a)canb.auug.org.au> Date: Tue, 1 Mar 2022 12:17:12 +1100 Subject: [PATCH] fix up for "media: dt-binding: mediatek: Get rid of mediatek,larb for multimedia HW" Signed-off-by: Stephen Rothwell <sfr(a)canb.auug.org.au> --- .../bindings/display/mediatek/mediatek,ovl-2l.yaml | 10 ---------- .../bindings/display/mediatek/mediatek,ovl.yaml | 10 ---------- .../bindings/display/mediatek/mediatek,rdma.yaml | 10 ---------- .../bindings/display/mediatek/mediatek,wdma.yaml | 10 ---------- 4 files changed, 40 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml index 611a2dbdefa4..e3cef99d0f98 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml @@ -46,15 +46,6 @@ properties: This property should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. - mediatek,larb: - description: - This property should contain a phandle pointing to the local arbiter devices defined in - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml. - It must sort according to the local arbiter index, like larb0, larb1, larb2... - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 1 - maxItems: 32 - mediatek,gce-client-reg: description: The register of client driver can be configured by gce with 4 arguments defined in this property, such as phandle of gce, subsys id, @@ -83,6 +74,5 @@ examples: power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; }; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml index e71f79bc2dee..93d5c68a2dbd 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml @@ -61,15 +61,6 @@ properties: This property should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. - mediatek,larb: - description: - This property should contain a phandle pointing to the local arbiter devices defined in - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml. - It must sort according to the local arbiter index, like larb0, larb1, larb2... - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 1 - maxItems: 32 - mediatek,gce-client-reg: description: The register of client driver can be configured by gce with 4 arguments defined in this property, such as phandle of gce, subsys id, @@ -98,6 +89,5 @@ examples: power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OVL0>; iommus = <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml index 8ef821641672..b56e22fbcd52 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml @@ -63,15 +63,6 @@ properties: This property should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. - mediatek,larb: - description: - This property should contain a phandle pointing to the local arbiter devices defined in - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml. - It must sort according to the local arbiter index, like larb0, larb1, larb2... - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 1 - maxItems: 32 - mediatek,rdma-fifo-size: description: rdma fifo size may be different even in same SOC, add this property to the @@ -111,7 +102,6 @@ examples: power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb = <&larb0>; mediatek,rdma-fifosize = <8192>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; }; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml index aaf5649b6413..f9f00a518edf 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml @@ -44,15 +44,6 @@ properties: This property should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. - mediatek,larb: - description: - This property should contain a phandle pointing to the local arbiter devices defined in - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml. - It must sort according to the local arbiter index, like larb0, larb1, larb2... - $ref: /schemas/types.yaml#/definitions/phandle-array - minItems: 1 - maxItems: 32 - mediatek,gce-client-reg: description: The register of client driver can be configured by gce with 4 arguments defined in this property, such as phandle of gce, subsys id, @@ -81,6 +72,5 @@ examples: power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_WDMA0>; iommus = <&iommu M4U_PORT_DISP_WDMA0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; }; -- 2.34.1 -- Cheers, Stephen Rothwell

1 0

[PATCH] drm/i915/guc: Fix flag query helper function to not modify state
by John.C.Harrison＠Intel.com 01 Mar '22

01 Mar '22

From: John Harrison <John.C.Harrison(a)Intel.com> A flag query helper was actually writing to the flags word rather than just reading. Fix that. Also update the function's comment as it was out of date. NB: No need for a 'Fixes' tag. The test was only ever used inside a BUG_ON during context registration. Rather than asserting that the condition was true, it was making the condition true. So, in theory, there was no consequence because we should never have hit a BUG_ON anyway. Which means the write should always have been a no-op. Signed-off-by: John Harrison <John.C.Harrison(a)Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index b3a429a92c0d..d9f4218f5ef4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -174,11 +174,8 @@ static inline void init_sched_state(struct intel_context *ce) __maybe_unused static bool sched_state_is_init(struct intel_context *ce) { - /* - * XXX: Kernel contexts can have SCHED_STATE_NO_LOCK_REGISTERED after - * suspend. - */ - return !(ce->guc_state.sched_state &= + /* Kernel contexts can have SCHED_STATE_REGISTERED after suspend. */ + return !(ce->guc_state.sched_state & ~(SCHED_STATE_BLOCKED_MASK | SCHED_STATE_REGISTERED)); } -- 2.25.1

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dri-devel March 2022