dri-devel April 2022

dri-devel@lists.freedesktop.org

351 participants
951 discussions

[PATCH 1/2] Revert "drm: bridge: mcde_dsi: Drop explicit bridge remove"
by Jagan Teki 29 Apr '22

29 Apr '22

commit <3730bc6147b0> ("drm: bridge: mcde_dsi: Drop explicit bridge remove") has removed downstream bridge as it's prior commit <3d7039e1e649> ("drm: bridge: mcde_dsi: Switch to devm_drm_of_get_bridge") added devm_drm_of_get_bridge for looking up if child node has panel or bridge. However commit <b089c0a9b14c> ("Revert "drm: of: Lookup if child node has panel or bridge") has reverted panel or bridge child node lookup from devm_drm_of_get_bridge as it breaks the non-trivial cases the first child node might not be a panel or bridge. So, revert this commit to switch the previous behavior of looking up child panel or bridge. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/gpu/drm/mcde/mcde_dsi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c index 960b49ea2ee5..083a4728654d 100644 --- a/drivers/gpu/drm/mcde/mcde_dsi.c +++ b/drivers/gpu/drm/mcde/mcde_dsi.c @@ -1122,6 +1122,7 @@ static void mcde_dsi_unbind(struct device *dev, struct device *master, { struct mcde_dsi *d = dev_get_drvdata(dev); + drm_bridge_remove(d->bridge_out); regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, PRCM_DSI_SW_RESET_DSI0_SW_RESETN, 0); } -- 2.25.1

2 2

[PATCH v2] MAINTAINERS: Add Dmitry as MSM DRM driver co-maintainer
by Dmitry Baryshkov 29 Apr '22

29 Apr '22

For the past several releases I have been assisting Rob by writing, collecting, testing and integrating patches for non-GPU and non-core parts of MSM DRM driver, while Rob is more interested in improving the GPU-related part. Let's note this in the MAINTAINERS file. While we are at it, per Rob's suggestion let's also promote Abhinav Kumar to M: (as he is actively working on the driver) and switch Sean Paul to R: (since he isn't doing much on msm these days). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- MAINTAINERS | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 61d9f114c37f..782934f318d4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6254,8 +6254,9 @@ F: drivers/gpu/drm/tiny/panel-mipi-dbi.c DRM DRIVER FOR MSM ADRENO GPU M: Rob Clark <robdclark(a)gmail.com> -M: Sean Paul <sean(a)poorly.run> -R: Abhinav Kumar <quic_abhinavk(a)quicinc.com> +M: Abhinav Kumar <quic_abhinavk(a)quicinc.com> +M: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> +R: Sean Paul <sean(a)poorly.run> L: linux-arm-msm(a)vger.kernel.org L: dri-devel(a)lists.freedesktop.org L: freedreno(a)lists.freedesktop.org -- 2.35.1

2 1

[PATCH v2 0/4] i915: Turn on compute engine support
by Matt Roper 29 Apr '22

29 Apr '22

Now that the necessary GuC-based hardware workarounds have landed, we're finally ready to actually enable compute engines for use by userspace. All of the "under-the-hood" heavy lifting already landed a while back in other series so all that remains now is to add I915_ENGINE_CLASS_COMPUTE to the uapi enum and add the CCS engines to the engine lists for the Xe_HP SDV and DG2. Userspace (Mesa) is linked in the ABI patch. Existing IGT tests (e.g., i915_hangman) provide test coverage for general engine behavior since compute engines should follow the same general rules as other engines. We've also recently added some additional subtests like igt@gem_reset_stats@shared-reset-domain to cover the user-visible impacts of the compute engines sharing the same hardware reset domain as the render engine. v2: - Update TLB invalidation register for compute engines and move it to a separate patch since it isn't related to the new uapi. (Tvrtko, Prathap) - Move new kerneldoc for pre-existing engine classes to a separate patch. (Andi) - Drop the compute UMD merge request link for now because it also included some additional multi-tile uapi that we're not ready to upstream just yet. Even if they don't have a disentangled MR ready for reference, we still have the Mesa MR as a key userspace consumer. (Tvrtko) Cc: Lucas De Marchi <lucas.demarchi(a)intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin(a)linux.intel.com> Daniele Ceraolo Spurio (1): drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines Matt Roper (3): drm/i915/uapi: Add kerneldoc for engine class enum drm/i915/xehp: Add register for compute engine's MMIO-based TLB invalidation drm/i915/xehp: Add compute engine ABI drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt.c | 1 + drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/i915_drm_client.c | 1 + drivers/gpu/drm/i915/i915_drm_client.h | 2 +- drivers/gpu/drm/i915/i915_pci.c | 6 +- include/uapi/drm/i915_drm.h | 62 +++++++++++++++++++-- 7 files changed, 65 insertions(+), 10 deletions(-) -- 2.35.1

5 10

[PATCH v2] drm: mxsfb: Implement LCDIF scanout CRC32 support
by Marek Vasut 29 Apr '22

29 Apr '22

The LCDIF controller as present in i.MX28/i.MX6SX/i.MX8M Mini/Nano has CRC_STAT register, which contains CRC32 of the frame as it was clocked out of the DPI interface of the LCDIF. This is most likely meant as a functional safety feature. Unfortunately, there is zero documentation on how the CRC32 is calculated, there is no documentation of the polynomial, the init value, nor on which data is the checksum applied. By applying brute-force on 8 pixel / 2 line frame, which is the minimum size LCDIF would work with, it turns out the polynomial is CRC32_POLY_LE 0xedb88320 , init value is 0xffffffff , the input data are bitrev32() of the entire frame and the resulting CRC has to be also bitrev32()ed. Doing this calculation in kernel for each frame is unrealistic due to the CPU demand, so attach the CRC collected from hardware to a frame instead. The DRM subsystem already has an interface for this purpose and the CRC can be accessed e.g. via debugfs: " $ echo auto > /sys/kernel/debug/dri/1/crtc-0/crc/control $ cat /sys/kernel/debug/dri/1/crtc-0/crc/data 0x0000408c 0xa4e5cdd8 0x0000408d 0x72f537b4 " The per-frame CRC can be used by userspace e.g. during automated testing, to verify that whatever buffer was sent to be scanned out was actually scanned out of the LCDIF correctly. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Alexander Stein <alexander.stein(a)ew.tq-group.com> Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Cc: Lucas Stach <l.stach(a)pengutronix.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Robby Cai <robby.cai(a)nxp.com> Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Stefan Agner <stefan(a)agner.ch> --- V2: Check crtc for non-NULL before dereferencing it in mxsfb_crtc_set_crc_source --- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 15 +++++++- drivers/gpu/drm/mxsfb/mxsfb_drv.h | 3 ++ drivers/gpu/drm/mxsfb/mxsfb_kms.c | 61 ++++++++++++++++++++++++++++-- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 1 + 4 files changed, 75 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index 94cafff7f68d5..ccf4107476ecc 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -9,6 +9,7 @@ */ #include <linux/clk.h> +#include <linux/crc32.h> #include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/module.h> @@ -52,6 +53,7 @@ static const struct mxsfb_devdata mxsfb_devdata[] = { .hs_wdth_shift = 24, .has_overlay = false, .has_ctrl2 = false, + .has_crc32 = false, }, [MXSFB_V4] = { .transfer_count = LCDC_V4_TRANSFER_COUNT, @@ -61,6 +63,7 @@ static const struct mxsfb_devdata mxsfb_devdata[] = { .hs_wdth_shift = 18, .has_overlay = false, .has_ctrl2 = true, + .has_crc32 = true, }, [MXSFB_V6] = { .transfer_count = LCDC_V4_TRANSFER_COUNT, @@ -70,6 +73,7 @@ static const struct mxsfb_devdata mxsfb_devdata[] = { .hs_wdth_shift = 18, .has_overlay = true, .has_ctrl2 = true, + .has_crc32 = true, }, }; @@ -145,12 +149,19 @@ static irqreturn_t mxsfb_irq_handler(int irq, void *data) { struct drm_device *drm = data; struct mxsfb_drm_private *mxsfb = drm->dev_private; - u32 reg; + u32 reg, crc; + u64 vbc; reg = readl(mxsfb->base + LCDC_CTRL1); - if (reg & CTRL1_CUR_FRAME_DONE_IRQ) + if (reg & CTRL1_CUR_FRAME_DONE_IRQ) { drm_crtc_handle_vblank(&mxsfb->crtc); + if (mxsfb->crc_active) { + crc = readl(mxsfb->base + LCDC_V4_CRC_STAT); + vbc = drm_crtc_accurate_vblank_count(&mxsfb->crtc); + drm_crtc_add_crc_entry(&mxsfb->crtc, true, vbc, &crc); + } + } writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h b/drivers/gpu/drm/mxsfb/mxsfb_drv.h index ddb5b0417a82c..d160d921b25fc 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h @@ -23,6 +23,7 @@ struct mxsfb_devdata { unsigned int hs_wdth_shift; bool has_overlay; bool has_ctrl2; + bool has_crc32; }; struct mxsfb_drm_private { @@ -44,6 +45,8 @@ struct mxsfb_drm_private { struct drm_encoder encoder; struct drm_connector *connector; struct drm_bridge *bridge; + + bool crc_active; }; static inline struct mxsfb_drm_private * diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c index c7f14ef1edc25..323087944ac56 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c @@ -454,6 +454,41 @@ static void mxsfb_crtc_disable_vblank(struct drm_crtc *crtc) writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); } +static int mxsfb_crtc_set_crc_source(struct drm_crtc *crtc, const char *source) +{ + struct mxsfb_drm_private *mxsfb; + + if (!crtc) + return -ENODEV; + + mxsfb = to_mxsfb_drm_private(crtc->dev); + + if (source && strcmp(source, "auto") == 0) + mxsfb->crc_active = true; + else if (!source) + mxsfb->crc_active = false; + else + return -EINVAL; + + return 0; +} + +static int mxsfb_crtc_verify_crc_source(struct drm_crtc *crtc, + const char *source, size_t *values_cnt) +{ + if (!crtc) + return -ENODEV; + + if (source && strcmp(source, "auto") != 0) { + DRM_DEBUG_DRIVER("Unknown CRC source %s for %s\n", + source, crtc->name); + return -EINVAL; + } + + *values_cnt = 1; + return 0; +} + static const struct drm_crtc_helper_funcs mxsfb_crtc_helper_funcs = { .atomic_check = mxsfb_crtc_atomic_check, .atomic_flush = mxsfb_crtc_atomic_flush, @@ -472,6 +507,19 @@ static const struct drm_crtc_funcs mxsfb_crtc_funcs = { .disable_vblank = mxsfb_crtc_disable_vblank, }; +static const struct drm_crtc_funcs mxsfb_crtc_with_crc_funcs = { + .reset = drm_atomic_helper_crtc_reset, + .destroy = drm_crtc_cleanup, + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, + .enable_vblank = mxsfb_crtc_enable_vblank, + .disable_vblank = mxsfb_crtc_disable_vblank, + .set_crc_source = mxsfb_crtc_set_crc_source, + .verify_crc_source = mxsfb_crtc_verify_crc_source, +}; + /* ----------------------------------------------------------------------------- * Encoder */ @@ -655,9 +703,16 @@ int mxsfb_kms_init(struct mxsfb_drm_private *mxsfb) } drm_crtc_helper_add(crtc, &mxsfb_crtc_helper_funcs); - ret = drm_crtc_init_with_planes(mxsfb->drm, crtc, - &mxsfb->planes.primary, NULL, - &mxsfb_crtc_funcs, NULL); + if (mxsfb->devdata->has_crc32) { + ret = drm_crtc_init_with_planes(mxsfb->drm, crtc, + &mxsfb->planes.primary, NULL, + &mxsfb_crtc_with_crc_funcs, + NULL); + } else { + ret = drm_crtc_init_with_planes(mxsfb->drm, crtc, + &mxsfb->planes.primary, NULL, + &mxsfb_crtc_funcs, NULL); + } if (ret) return ret; diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h index 694fea13e893e..cf813a1da1d78 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h +++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h @@ -26,6 +26,7 @@ #define LCDC_VDCTRL2 0x90 #define LCDC_VDCTRL3 0xa0 #define LCDC_VDCTRL4 0xb0 +#define LCDC_V4_CRC_STAT 0x1a0 #define LCDC_V4_DEBUG0 0x1d0 #define LCDC_V3_DEBUG0 0x1f0 #define LCDC_AS_CTRL 0x210 -- 2.35.1

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[PATCH] drm/nouveau: simplify the return expression of nouveau_debugfs_init()
by cgel.zte＠gmail.com 29 Apr '22

29 Apr '22

From: Minghao Chi <chi.minghao(a)zte.com.cn> Simplify the return expression. Reported-by: Zeal Robot <zealci(a)zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao(a)zte.com.cn> --- drivers/gpu/drm/nouveau/nouveau_debugfs.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c index 1cbe01048b93..76b621f99916 100644 --- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c +++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c @@ -255,19 +255,13 @@ nouveau_drm_debugfs_init(struct drm_minor *minor) int nouveau_debugfs_init(struct nouveau_drm *drm) { - int ret; - drm->debugfs = kzalloc(sizeof(*drm->debugfs), GFP_KERNEL); if (!drm->debugfs) return -ENOMEM; - ret = nvif_object_ctor(&drm->client.device.object, "debugfsCtrl", 0, + return nvif_object_ctor(&drm->client.device.object, "debugfsCtrl", 0, NVIF_CLASS_CONTROL, NULL, 0, &drm->debugfs->ctrl); - if (ret) - return ret; - - return 0; } void -- 2.25.1

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[PATCH 00/41] OMAP1 full multiplatform conversion
by Arnd Bergmann 29 Apr '22

29 Apr '22

From: Arnd Bergmann <arnd(a)arndb.de> This is the full series for converting OMAP1 to multiplatform, rebased from my 2019 attempt to do the same thing. The soc tree contains simpler patches to do the same for iop32x, ixp4xx, ep93xx and s3c24xx, which means we are getting closer to completing this for all ARMv5 platforms (I have patches for PXA, which is the last one remaining). Janusz already tested the branch separately and did the missing work for the common-clk conversion after my previous approach was broken. The fbdev, mmc and ASoC portion of Janusz' work already went into the corresponding maintainer tree, but I include them here for reference. Unless there are any objections, I would add the entire series to the for-next branch of the soc tree, but only send the first 36 patches early in the merge window. After everything else has made it in, I would rebase the last two patches and send them separately, which may or may not make it in the merge window. Arnd Arnd Bergmann (30): video: fbdev: omapfb: lcd_ams_delta: fix unused variable warning ARM: omap1: innovator: pass lcd control address as pdata ARM: omap1: move lcd_dma code into omapfb driver ARM: omap1: declare a dummy omap_set_dma_priority fbdev: omap: pass irqs as resource ARM: omap1: ams-delta: remove camera leftovers ARM: omap1: move mach/usb.h to include/linux/soc ARM: omap1: move some headers to include/linux/soc ARM: omap1: move perseus spi pinconf to board file ARM: omap1: move CF chipselect setup to board file fbdev: omap: avoid using mach/*.h files usb: omap: avoid mach/*.h headers clocksource: ti-dmtimer: avoid using mach/hardware.h serial: 8250/omap1: include linux/soc/ti/omap1-soc.h input: omap: void using mach/*.h headers ARM: omap1: innovator: move ohci phy power handling to board file ARM: omap1: move 32k counter from plat-omap to mach-omap1 ARM: omap: remove debug-leds driver ARM: omap: dma: make usb support optional dma: omap: hide legacy interface ARM: omap1: dma: remove omap2 specific bits ARM: omap1: move plat/dma.c to mach/omap-dma.c ARM: omap: split up arch/arm/plat-omap/Kconfig ARM: omap: un-merge plat/sram.c ARM: omap: remove empty plat-omap directory ARM: omap1: relocate static I/O mapping ARM: omap1: use pci_remap_iospace() for omap_cf ARM: omap1: move mach/*.h into mach directory ARM: omap1: fix build with no SoC selected [TO BE REBASED] ARM: omap1: enable multiplatform Janusz Krzysztofik (11): ARM: OMAP1: Prepare for conversion of OMAP1 clocks to CCF ARM: OMAP1: clock: Fix early UART rate issues ARM: OMAP1: clock: Fix UART rate reporting algorithm ARM: OMAP1: clock: Remove unused code ARM: OMAP1: clock: Remove noop code usb: host: ohci-omap: Make it CCF clk API compatible usb: gadget: omap_udc: Make it CCF clk API compatible [MERGED] video: fbdev: omap: Make it CCF clk API compatible [MERGED] mmc: omap: Make it CCF clk API compatible [MERGED] ASoC: ti: osk5912: Make it CCF clk API compatible [TO BE REBASED] ARM: OMAP1: clock: Convert to CCF arch/arm/Kconfig | 16 - arch/arm/Kconfig.debug | 6 +- arch/arm/Makefile | 1 - arch/arm/configs/omap1_defconfig | 3 + arch/arm/mach-omap1/Kconfig | 72 ++ arch/arm/mach-omap1/Makefile | 6 +- arch/arm/mach-omap1/ams-delta-fiq-handler.S | 3 +- arch/arm/mach-omap1/ams-delta-fiq.c | 2 + arch/arm/mach-omap1/ams-delta-fiq.h | 2 +- arch/arm/mach-omap1/board-ams-delta.c | 18 +- arch/arm/mach-omap1/board-fsample.c | 10 +- arch/arm/mach-omap1/board-generic.c | 8 +- arch/arm/mach-omap1/board-h2.c | 14 +- arch/arm/mach-omap1/board-h3.c | 16 +- arch/arm/mach-omap1/board-htcherald.c | 10 +- arch/arm/mach-omap1/board-innovator.c | 34 +- arch/arm/mach-omap1/board-nokia770.c | 8 +- arch/arm/mach-omap1/board-osk.c | 49 +- arch/arm/mach-omap1/board-palmte.c | 14 +- arch/arm/mach-omap1/board-palmtt.c | 14 +- arch/arm/mach-omap1/board-palmz71.c | 14 +- arch/arm/mach-omap1/board-perseus2.c | 15 +- arch/arm/mach-omap1/board-sx1-mmc.c | 3 +- arch/arm/mach-omap1/board-sx1.c | 12 +- arch/arm/mach-omap1/clock.c | 797 +++++++----------- arch/arm/mach-omap1/clock.h | 191 ++--- arch/arm/mach-omap1/clock_data.c | 508 +++++------ arch/arm/mach-omap1/common.h | 3 +- arch/arm/mach-omap1/devices.c | 12 +- arch/arm/mach-omap1/dma.c | 2 +- arch/arm/mach-omap1/fb.c | 19 +- arch/arm/mach-omap1/flash.c | 5 +- arch/arm/mach-omap1/fpga.c | 3 +- arch/arm/mach-omap1/gpio15xx.c | 3 +- arch/arm/mach-omap1/gpio16xx.c | 5 +- arch/arm/mach-omap1/gpio7xx.c | 3 +- .../mach-omap1/{include/mach => }/hardware.h | 136 +-- arch/arm/mach-omap1/i2c.c | 3 +- arch/arm/mach-omap1/id.c | 5 +- arch/arm/mach-omap1/include/mach/io.h | 45 - arch/arm/mach-omap1/include/mach/lcdc.h | 44 - arch/arm/mach-omap1/include/mach/memory.h | 12 - arch/arm/mach-omap1/include/mach/uncompress.h | 117 --- arch/arm/mach-omap1/io.c | 12 +- arch/arm/mach-omap1/irq.c | 4 +- arch/arm/mach-omap1/{include/mach => }/irqs.h | 2 - arch/arm/mach-omap1/mcbsp.c | 17 +- .../mach-omap1/{include/mach => }/mtd-xip.h | 3 +- arch/arm/mach-omap1/mux.c | 6 +- arch/arm/mach-omap1/mux.h | 144 ++++ arch/arm/mach-omap1/ocpi.c | 8 +- .../dma.c => mach-omap1/omap-dma.c} | 259 ++---- .../mach-omap1/{include/mach => }/omap1510.h | 0 .../mach-omap1/{include/mach => }/omap16xx.h | 0 .../mach-omap1/{include/mach => }/omap7xx.h | 0 arch/arm/mach-omap1/pm.c | 9 +- arch/arm/mach-omap1/pm.h | 2 + arch/arm/mach-omap1/reset.c | 3 +- arch/arm/mach-omap1/serial.c | 10 +- .../mach-omap1/{include/mach => }/serial.h | 0 arch/arm/mach-omap1/sleep.S | 2 +- arch/arm/mach-omap1/soc.h | 6 +- arch/arm/mach-omap1/sram-init.c | 91 +- arch/arm/mach-omap1/sram.S | 4 +- arch/arm/mach-omap1/sram.h | 4 +- arch/arm/mach-omap1/{include/mach => }/tc.h | 2 - arch/arm/mach-omap1/time.c | 7 +- arch/arm/mach-omap1/timer.c | 1 + arch/arm/mach-omap1/timer32k.c | 100 ++- arch/arm/mach-omap1/usb.c | 8 +- arch/arm/mach-omap1/usb.h | 25 + arch/arm/mach-omap2/Kconfig | 49 ++ arch/arm/mach-omap2/sram.c | 91 +- arch/arm/mach-omap2/sram.h | 5 +- arch/arm/plat-omap/Kconfig | 119 --- arch/arm/plat-omap/Makefile | 13 - arch/arm/plat-omap/counter_32k.c | 114 --- arch/arm/plat-omap/debug-leds.c | 171 ---- arch/arm/plat-omap/include/plat/counter-32k.h | 1 - arch/arm/plat-omap/include/plat/cpu.h | 21 - arch/arm/plat-omap/include/plat/sram.h | 8 - arch/arm/plat-omap/sram.c | 129 --- drivers/clocksource/timer-ti-dm.c | 2 +- drivers/dma/ti/omap-dma.c | 19 +- drivers/input/keyboard/omap-keypad.c | 1 + drivers/mmc/host/omap.c | 23 +- drivers/pcmcia/Kconfig | 3 +- drivers/pcmcia/omap_cf.c | 48 +- drivers/spi/Kconfig | 2 +- drivers/spi/spi-omap-uwire.c | 15 +- drivers/tty/serial/8250/8250.h | 1 + drivers/usb/gadget/udc/omap_udc.c | 19 +- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ohci-omap.c | 60 +- drivers/usb/phy/Kconfig | 3 +- drivers/usb/phy/phy-isp1301-omap.c | 6 +- drivers/video/backlight/Kconfig | 4 +- drivers/video/backlight/omap1_bl.c | 4 +- drivers/video/fbdev/Makefile | 2 +- drivers/video/fbdev/omap/Kconfig | 4 +- drivers/video/fbdev/omap/Makefile | 5 + drivers/video/fbdev/omap/hwa742.c | 6 +- drivers/video/fbdev/omap/lcd_ams_delta.c | 5 +- .../video/fbdev/omap}/lcd_dma.c | 7 +- .../video/fbdev/omap}/lcd_dma.h | 2 - drivers/video/fbdev/omap/lcd_inn1510.c | 9 +- drivers/video/fbdev/omap/lcd_osk.c | 4 +- drivers/video/fbdev/omap/lcdc.c | 16 +- drivers/video/fbdev/omap/lcdc.h | 35 + drivers/video/fbdev/omap/omapfb.h | 2 + drivers/video/fbdev/omap/omapfb_main.c | 19 +- drivers/video/fbdev/omap/sossi.c | 9 +- include/linux/omap-dma.h | 28 +- include/linux/platform_data/usb-omap1.h | 2 + include/linux/soc/ti/omap1-io.h | 143 ++++ .../mux.h => include/linux/soc/ti/omap1-mux.h | 142 +--- .../soc.h => include/linux/soc/ti/omap1-soc.h | 22 - .../usb.h => include/linux/soc/ti/omap1-usb.h | 28 +- sound/soc/ti/osk5912.c | 4 +- 119 files changed, 1809 insertions(+), 2610 deletions(-) rename arch/arm/mach-omap1/{include/mach => }/hardware.h (59%) delete mode 100644 arch/arm/mach-omap1/include/mach/io.h delete mode 100644 arch/arm/mach-omap1/include/mach/lcdc.h delete mode 100644 arch/arm/mach-omap1/include/mach/memory.h delete mode 100644 arch/arm/mach-omap1/include/mach/uncompress.h rename arch/arm/mach-omap1/{include/mach => }/irqs.h (99%) rename arch/arm/mach-omap1/{include/mach => }/mtd-xip.h (97%) create mode 100644 arch/arm/mach-omap1/mux.h rename arch/arm/{plat-omap/dma.c => mach-omap1/omap-dma.c} (84%) rename arch/arm/mach-omap1/{include/mach => }/omap1510.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap16xx.h (100%) rename arch/arm/mach-omap1/{include/mach => }/omap7xx.h (100%) rename arch/arm/mach-omap1/{include/mach => }/serial.h (100%) rename arch/arm/mach-omap1/{include/mach => }/tc.h (98%) create mode 100644 arch/arm/mach-omap1/usb.h delete mode 100644 arch/arm/plat-omap/Kconfig delete mode 100644 arch/arm/plat-omap/Makefile delete mode 100644 arch/arm/plat-omap/counter_32k.c delete mode 100644 arch/arm/plat-omap/debug-leds.c delete mode 100644 arch/arm/plat-omap/include/plat/counter-32k.h delete mode 100644 arch/arm/plat-omap/include/plat/cpu.h delete mode 100644 arch/arm/plat-omap/include/plat/sram.h delete mode 100644 arch/arm/plat-omap/sram.c rename {arch/arm/mach-omap1 => drivers/video/fbdev/omap}/lcd_dma.c (98%) rename {arch/arm/mach-omap1/include/mach => drivers/video/fbdev/omap}/lcd_dma.h (98%) create mode 100644 include/linux/soc/ti/omap1-io.h rename arch/arm/mach-omap1/include/mach/mux.h => include/linux/soc/ti/omap1-mux.h (53%) rename arch/arm/mach-omap1/include/mach/soc.h => include/linux/soc/ti/omap1-soc.h (90%) rename arch/arm/mach-omap1/include/mach/usb.h => include/linux/soc/ti/omap1-usb.h (86%) -- 2.29.2 Cc: Russell King <linux(a)armlinux.org.uk> Cc: Aaro Koskinen <aaro.koskinen(a)iki.fi> Cc: Tony Lindgren <tony(a)atomide.com> Cc: Paul Walmsley <paul(a)pwsan.com> Cc: Kevin Hilman <khilman(a)kernel.org> Cc: Peter Ujfalusi <peter.ujfalusi(a)gmail.com> Cc: Vinod Koul <vkoul(a)kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov(a)gmail.com> Cc: Ulf Hansson <ulf.hansson(a)linaro.org> Cc: Dominik Brodowski <linux(a)dominikbrodowski.net> Cc: Mark Brown <broonie(a)kernel.org> Cc: Felipe Balbi <balbi(a)kernel.org> Cc: Alan Stern <stern(a)rowland.harvard.edu> Cc: Lee Jones <lee.jones(a)linaro.org> Cc: Daniel Thompson <daniel.thompson(a)linaro.org> Cc: Jingoo Han <jingoohan1(a)gmail.com> Cc: Helge Deller <deller(a)gmx.de> Cc: Arnd Bergmann <arnd(a)arndb.de> Cc: Linus Walleij <linus.walleij(a)linaro.org> Cc: Janusz Krzysztofik <jmkrzyszt(a)gmail.com> Cc: Krzysztof Kozlowski <krzk(a)kernel.org> Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-kernel(a)vger.kernel.org Cc: linux-omap(a)vger.kernel.org Cc: linux-usb(a)vger.kernel.org Cc: dmaengine(a)vger.kernel.org Cc: linux-input(a)vger.kernel.org Cc: linux-mmc(a)vger.kernel.org Cc: linux-serial(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Cc: linux-fbdev(a)vger.kernel.org Cc: alsa-devel(a)alsa-project.org

9 61

[PATCH 0/4] drm/i915: Prepare for GSC-loaded HuC
by Daniele Ceraolo Spurio 29 Apr '22

29 Apr '22

On newer platforms (starting DG2 G10 B-step and G11 A-step), ownership of HuC loading and authentication has been moved from the GuC to the GSC, with both actions being performed via a single PXP command. Given that the mei code has not fully landed yet (see [1]), we can't implement the new load mechanism, but we can start getting ready for it by taking care of the changes required for the existing code: - The HuC header is now different from the GuC one. This also means that if the FW is for GSC-loading and the HW fuse is set to legacy load (or vice-versa) we can't load the HuC. - To send a PXP message to the GSC we need both MEI_GSC and MEI_PXP. - All legacy HuC loading paths can be skipped. Note that the HuC fw version for DG2 is still not defined, so the HuC code will be skipped until the define is added. [1] https://patchwork.freedesktop.org/series/102339/ Cc: Alan Previn <alan.previn.teres.alexis(a)intel.com> Cc: John Harrison <john.c.harrison(a)intel.com> Daniele Ceraolo Spurio (4): drm/i915/huc: check HW directly for HuC auth status drm/i915/huc: Add fetch support for gsc-loaded HuC binary drm/i915/huc: Prepare for GSC-loaded HuC drm/i915/huc: Don't fail the probe if HuC init fails drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_huc.c | 97 +++++++++++++++---- drivers/gpu/drm/i915/gt/uc/intel_huc.h | 5 +- drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 5 +- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 22 +++-- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 99 ++++++++++++-------- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 + drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h | 9 ++ 8 files changed, 172 insertions(+), 68 deletions(-) -- 2.25.1

4 9

[PATCH v3 0/4] lrc selftest fixes
by Ramalingam C 29 Apr '22

29 Apr '22

Few bug fixes for lrc selftest. v3: Extending the first patch for gen8 Chris Wilson (4): drm/i915/gt: Explicitly clear BB_OFFSET for new contexts drm/i915/selftests: Check for incomplete LRI from the context image drm/i915/selftest: Always cancel semaphore on error drm/i915/selftest: Clear the output buffers before GPU writes drivers/gpu/drm/i915/gt/intel_engine_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_lrc.c | 19 ++++ drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++++++++---- 3 files changed, 115 insertions(+), 20 deletions(-) -- 2.20.1

1 4

[PATCH] MAINTAINERS: Add Dmitry as MSM DRM driver co-maintainer
by Dmitry Baryshkov 29 Apr '22

29 Apr '22

For the past several releases I have been assisting Rob by writing, collecting, testing and integrating patches for non-GPU and non-core parts of MSM DRM driver, while Rob is more interested in improving the GPU-related part. Let's note this in the MAINTAINERS file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 61d9f114c37f..3d7c7d6b0346 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6255,6 +6255,7 @@ F: drivers/gpu/drm/tiny/panel-mipi-dbi.c DRM DRIVER FOR MSM ADRENO GPU M: Rob Clark <robdclark(a)gmail.com> M: Sean Paul <sean(a)poorly.run> +M: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> R: Abhinav Kumar <quic_abhinavk(a)quicinc.com> L: linux-arm-msm(a)vger.kernel.org L: dri-devel(a)lists.freedesktop.org -- 2.35.1

1 0

[PATCH v3 1/2] dt-bindings: display: simple: Add Startek KD070WVFPA043-C069A panel
by Fabio Estevam 29 Apr '22

29 Apr '22

From: Fabio Estevam <festevam(a)denx.de> Add Startek KD070WVFPA043-C069A 7" TFT LCD panel compatible string. Signed-off-by: Fabio Estevam <festevam(a)denx.de> Acked-by: Sam Ravnborg <sam(a)ravnborg.org> --- Changes since v2: - None .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 1eb9dd4f8f58..e190eef66872 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -294,6 +294,8 @@ properties: - starry,kr070pe2t # Starry 12.2" (1920x1200 pixels) TFT LCD panel - starry,kr122ea0sra + # Startek KD070WVFPA043-C069A 7" TFT LCD panel + - startek,kd070wvfpa # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel - team-source-display,tst043015cmhx # Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel -- 2.25.1

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