dri-devel April 2022

dri-devel@lists.freedesktop.org

351 participants
951 discussions

[PATCH 5.4 291/475] video: fbdev: nvidiafb: Use strscpy() to prevent buffer overflow
by Greg Kroah-Hartman 14 Apr '22

14 Apr '22

From: Tim Gardner <tim.gardner(a)canonical.com> [ Upstream commit 37a1a2e6eeeb101285cd34e12e48a881524701aa ] Coverity complains of a possible buffer overflow. However, given the 'static' scope of nvidia_setup_i2c_bus() it looks like that can't happen after examiniing the call sites. CID 19036 (#1 of 1): Copy into fixed size buffer (STRING_OVERFLOW) 1. fixed_size_dest: You might overrun the 48-character fixed-size string chan->adapter.name by copying name without checking the … [View More]

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[PATCH 4.19 1/2] drm/amdgpu: Check if fd really is an amdgpu fd.
by Lee Jones 14 Apr '22

14 Apr '22

From: Bas Nieuwenhuizen <bas(a)basnieuwenhuizen.nl> [ Upstream commit 021830d24ba55a578f602979274965344c8e6284 ] Otherwise we interpret the file private data as drm & amdgpu data while it might not be, possibly allowing one to get memory corruption. Cc: Felix Kuehling <Felix.Kuehling(a)amd.com> Cc: Alex Deucher <alexander.deucher(a)amd.com> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)… [View More]ffwll.ch> Cc: amd-gfx(a)lists.freedesktop.org Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Bas Nieuwenhuizen <bas(a)basnieuwenhuizen.nl> Reviewed-by: Christian König <christian.koenig(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 16 ++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c | 10 +++++++--- 3 files changed, 25 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 447c4c7a36d68..acbd33fcb73d3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -955,6 +955,8 @@ struct amdgpu_gfx { DECLARE_BITMAP (pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); }; +int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv); + int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, unsigned size, struct amdgpu_ib *ib); void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 63b1e325b45c5..b3b22a87b232b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -1132,6 +1132,22 @@ static const struct file_operations amdgpu_driver_kms_fops = { #endif }; +int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv) +{ + struct drm_file *file; + + if (!filp) + return -EINVAL; + + if (filp->f_op != &amdgpu_driver_kms_fops) { + return -EINVAL; + } + + file = filp->private_data; + *fpriv = file->driver_priv; + return 0; +} + static bool amdgpu_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe, bool in_vblank_irq, int *vpos, int *hpos, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c index 1cafe8d83a4db..0b70410488b66 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c @@ -54,16 +54,20 @@ static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev, enum drm_sched_priority priority) { struct file *filp = fget(fd); - struct drm_file *file; struct amdgpu_fpriv *fpriv; struct amdgpu_ctx *ctx; uint32_t id; + int r; if (!filp) return -EINVAL; - file = filp->private_data; - fpriv = file->driver_priv; + r = amdgpu_file_to_fpriv(filp, &fpriv); + if (r) { + fput(filp); + return r; + } + idr_for_each_entry(&fpriv->ctx_mgr.ctx_handles, ctx, id) amdgpu_ctx_priority_override(ctx, priority); -- 2.35.1.1178.g4f1659d476-goog [View Less]

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[PATCH v2 1/2] drm/dp: Factor out a function to probe a DPCD address
by Imre Deak 14 Apr '22

14 Apr '22

Factor out from drm_dp_dpcd_read() a function to probe a DPCD address with a 1-byte read access. This will be needed by the next patch doing a read from an LTTPR address, which must happen without the preceding wake-up read in drm_dp_dpcd_read(). v2: Add a probe function instead of exporting drm_dp_dpcd_access(). (Jani) Cc: Jani Nikula <jani.nikula(a)linux.intel.com> Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Imre Deak <imre.deak(a)intel.com> --- drivers/gpu/drm/dp/… [View More]drm_dp.c | 28 +++++++++++++++++++++++++--- include/drm/dp/drm_dp_helper.h | 1 + 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/dp/drm_dp.c b/drivers/gpu/drm/dp/drm_dp.c index 580016a1b9eb7..b58e30132768d 100644 --- a/drivers/gpu/drm/dp/drm_dp.c +++ b/drivers/gpu/drm/dp/drm_dp.c @@ -527,6 +527,29 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, return ret; } +/** + * drm_dp_dpcd_probe() - probe a given DPCD address with a 1-byte read access + * @aux: DisplayPort AUX channel (SST) + * @offset: address of the register to probe + * + * Probe the provided DPCD address by reading 1 byte from it. The function can + * be used to trigger some side-effect the read access has, like waking up the + * sink, without the need for the read-out value. + * + * Returns 0 if the read access suceeded, or a negative error code on failure. + */ +int drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset) +{ + u8 buffer; + int ret; + + ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, &buffer, 1); + WARN_ON(ret == 0); + + return ret < 0 ? ret : 0; +} +EXPORT_SYMBOL(drm_dp_dpcd_probe); + /** * drm_dp_dpcd_read() - read a series of bytes from the DPCD * @aux: DisplayPort AUX channel (SST or MST) @@ -559,9 +582,8 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, * monitor doesn't power down exactly after the throw away read. */ if (!aux->is_remote) { - ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, - buffer, 1); - if (ret != 1) + ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV); + if (ret < 0) goto out; } diff --git a/include/drm/dp/drm_dp_helper.h b/include/drm/dp/drm_dp_helper.h index 1eccd97419436..91af98e6617c6 100644 --- a/include/drm/dp/drm_dp_helper.h +++ b/include/drm/dp/drm_dp_helper.h @@ -2053,6 +2053,7 @@ struct drm_dp_aux { bool is_remote; }; +int drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset); ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size); ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, -- 2.30.2 [View Less]

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[RESEND][PATCH] omapdrm: fix missing check on list iterator
by Xiaomeng Tong 14 Apr '22

14 Apr '22

The bug is here: bus_flags = connector->display_info.bus_flags; The list iterator 'connector-' will point to a bogus position containing HEAD if the list is empty or no element is found. This case must be checked before any use of the iterator, otherwise it will lead to a invalid memory access. To fix this bug, add an check. Use a new value 'iter' as the list iterator, while use the old value 'connector' as a dedicated variable to point to the found element. Cc: stable(a)vger.kernel.org … [View More]

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[PATCH v10 00/24] drm/rockchip: RK356x VOP2 support
by Sascha Hauer 14 Apr '22

14 Apr '22

This is v10 finally. The series is rebased to v5.18-rc1 which means that it no longer depends on the clk patches, but there are new dependencies: drm/rockchip: Refactor IOMMU initialisation (https://lists.freedesktop.org/archives/dri-devel/2022-April/349548.html) arm64: dts: rockchip: add basic dts for the radxa rock3 model a The latter is only necessary for adding VOP2 support for that board. It should be in Heikos tree already. Highlight in this series is that it now works properly on a … [View More]RK3566. Also z-ordering of the planes is fixed. Sascha Changes since v9: - rebase on v5.18-rc1 - Do not register windows which don't have its own framebuffer on RK3566 - fix mixed up register writes in vop2_setup_dly_for_windows() - move call to rockchip_drm_dma_attach_device() from vop2_bind() to vop2_enable() - Fix zpos handling Changes since v8: - make hclk_vo a critical clock instead of enabling it in the hdmi driver - Fix vop2_setup_layer_mixer(), reported by Andy Yan - Limit planes possible_crtcs to actually existing crtcs - simplify vop2_create_crtc() a bit Changes since v7: - rename hclk to niu Changes since v6: - Move of_graph parsing out of runtime code to initialization Changes since v5: - Add new patch to fix dw-hdmi of_graph binding - Drop "drm/encoder: Add of_graph port to struct drm_encoder" and solve issue internally in the driver - make checkpatch cleaner Changes since v4: - Reorder patches in a way that binding/dts/driver patches are closer together - Drop clk patches already applied by Heiko Changes since v3: - added changelog to each patch - Add 4k support to hdmi driver - rebase on v5.17-rc1 Changes since v2: - Add pin names to HDMI supply pin description - Add hclk support to HDMI driver - Dual license rockchip-vop2 binding, update binding - Add HDMI connector to board dts files - drop unnecessary gamma_lut registers from vop2 - Update dclk_vop[012] clock handling, no longer hacks needed - Complete regmap conversion Changes since v1: - drop all unnecessary waiting for frames within atomic modeset and plane update - Cluster subwin support removed - gamma support removed - unnecessary irq_lock removed - interrupt handling simplified - simplified zpos handling - drop is_alpha_support(), use fb->format->has_alpha instead - use devm_regulator_get() rather than devm_regulator_get_optional() for hdmi regulators - Use fixed number of planes per video port - Drop homegrown regmap code from vop2 driver (not complete yet) - Add separate include file for vop2 driver to not pollute the vop include Andy Yan (1): drm: rockchip: Add VOP2 driver Benjamin Gaignard (1): dt-bindings: display: rockchip: dw-hdmi: Add compatible for rk3568 HDMI Douglas Anderson (2): drm/rockchip: dw_hdmi: Use auto-generated tables drm/rockchip: dw_hdmi: Set cur_ctr to 0 always Michael Riesch (2): arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a Nickey Yang (1): drm/rockchip: dw_hdmi: add default 594Mhz clk for 4K@60hz Sascha Hauer (17): clk: rk3568: Mark hclk_vo as critical drm/rockchip: Embed drm_encoder into rockchip_decoder drm/rockchip: Add crtc_endpoint_id to rockchip_encoder drm/rockchip: dw_hdmi: rename vpll clock to reference clock dt-bindings: display: rockchip: dw-hdmi: use "ref" as clock name arm64: dts: rockchip: rk3399: rename HDMI ref clock to 'ref' drm/rockchip: dw_hdmi: add rk3568 support drm/rockchip: dw_hdmi: add regulator support dt-bindings: display: rockchip: dw-hdmi: Add regulator support drm/rockchip: dw_hdmi: drop mode_valid hook dt-bindings: display: rockchip: dw-hdmi: Make unwedge pinctrl optional arm64: dts: rockchip: rk356x: Add VOP2 nodes arm64: dts: rockchip: rk356x: Add HDMI nodes arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi drm/rockchip: Make VOP driver optional dt-bindings: display: rockchip: Add binding for VOP2 dt-bindings: display: rockchip: dw-hdmi: fix ports description .../display/rockchip/rockchip,dw-hdmi.yaml | 46 +- .../display/rockchip/rockchip-vop2.yaml | 140 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 47 + arch/arm64/boot/dts/rockchip/rk3566.dtsi | 4 + .../boot/dts/rockchip/rk3568-evb1-v10.dts | 47 + .../boot/dts/rockchip/rk3568-rock-3a.dts | 47 + arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 + arch/arm64/boot/dts/rockchip/rk356x.dtsi | 83 + drivers/clk/rockchip/clk-rk3568.c | 1 + drivers/gpu/drm/rockchip/Kconfig | 14 + drivers/gpu/drm/rockchip/Makefile | 4 +- .../gpu/drm/rockchip/analogix_dp-rockchip.c | 32 +- drivers/gpu/drm/rockchip/cdn-dp-core.c | 18 +- drivers/gpu/drm/rockchip/cdn-dp-core.h | 2 +- .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 17 +- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 276 +- drivers/gpu/drm/rockchip/inno_hdmi.c | 32 +- drivers/gpu/drm/rockchip/rk3066_hdmi.c | 34 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 36 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 20 +- drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 2 + drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 15 + drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2706 +++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 477 +++ drivers/gpu/drm/rockchip/rockchip_lvds.c | 26 +- drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 281 ++ include/dt-bindings/soc/rockchip,vop2.h | 14 + 28 files changed, 4232 insertions(+), 195 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c create mode 100644 drivers/gpu/drm/rockchip/rockchip_drm_vop2.h create mode 100644 drivers/gpu/drm/rockchip/rockchip_vop2_reg.c create mode 100644 include/dt-bindings/soc/rockchip,vop2.h -- 2.30.2 [View Less]

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[PATCH v7 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
by Liu Ying 14 Apr '22

14 Apr '22

Hi, This is the v7 series to add i.MX8qxp LVDS PHY mode support for the Mixel PHY in the Freescale i.MX8qxp SoC. The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp SCU firmware. The PHY driver would call a SCU function to configure the mode. The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, where it appears to be a single MIPI DPHY. Patch 1/5 sets PHY mode in the Northwest … [View More]Logic MIPI DSI host controller bridge driver, since i.MX8qxp SoC embeds this controller IP to support MIPI DSI displays together with the Mixel PHY. Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions and through a custom structure added to the generic PHY configuration union. Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Welcome comments, thanks. v6->v7: * Update the year of copyright for patch 2/5. * Better variable explaination for bits_per_lane_and_dclk_cycle in patch 2/5. * Use marco instead of magic number for CCM and CA values for patch 5/5. * Suppress 'checkpatch --strict' warnings for patch 5/5. v5->v6: * Rebase the series upon v5.17-rc1. * Set PHY mode in ->mode_set() instead of ->pre_enable() in the nwl-dsi bridge driver in patch 1/5 due to the rebase. * Drop Guido's R-b tag on patch 1/5 due to the rebase. v4->v5: * Align kernel-doc style of include/linux/phy/phy-lvds.h to include/linux/phy/phy.h for patch 2/5. (Vinod) * Trivial tweaks on patch 2/5. * Drop Robert's R-b tag on patch 2/5. v3->v4: * Add all R-b tags received from v3 on relevant patches and respin. (Robert) v2->v3: * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido) * Improve the 'clock-names' property in the PHY dt binding. v1->v2: * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido) * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido) * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver. Liu Ying (5): drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set() phy: Add LVDS configuration options dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 -- .../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 +++++++ drivers/gpu/drm/bridge/nwl-dsi.c | 6 + .../phy/freescale/phy-fsl-imx8-mipi-dphy.c | 276 +++++++++++++++++- include/linux/phy/phy-lvds.h | 32 ++ include/linux/phy/phy.h | 4 + 6 files changed, 414 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml create mode 100644 include/linux/phy/phy-lvds.h -- 2.25.1 [View Less]

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[PULL] drm-misc-next
by Maxime Ripard 14 Apr '22

14 Apr '22

Hi Daniel, Dave, Here's this week drm-misc-next PR Maxime drm-misc-next-2022-04-14: drm-misc-next for $kernel-version: UAPI Changes: Cross-subsystem Changes: - fbcon: various loading and locking cleanups Core Changes: - buddy: Check for page size alignment at allocation - dma-buf: Add dma_resv_usage enum, new usage for kernel submissions, memory management submissions, documentation improvements, Driver Changes: - Switch drivers to drm_mode_init, drm_mode_copy - amdgpu: Add … [View More]drm buddy allocator support - bridge: Add DDC enable gpio support to display-connector, convert icn6211 to regmap - ingenic: HDMI support - panels: Support for SINO WEALTH SH1106 OLED display, simplify mode parsing in panel-lvds - sti: spelling fixes, bridge list iteration fixes - vc4: Writeback fixes and improvements The following changes since commit c8d4c18bfbc4ab467188dbe45cc8155759f49d9e: dma-buf/drivers: make reserving a shared slot mandatory v4 (2022-04-06 17:38:25 +0200) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2022-04-14 for you to fetch changes up to 9d79799193b728b62c9899d931b5009da1f89b67: fbcon: Fix delayed takeover locking (2022-04-13 22:54:48 +0200) ---------------------------------------------------------------- drm-misc-next for $kernel-version: UAPI Changes: Cross-subsystem Changes: - fbcon: various loading and locking cleanups Core Changes: - buddy: Check for page size alignment at allocation - dma-buf: Add dma_resv_usage enum, new usage for kernel submissions, memory management submissions, documentation improvements, Driver Changes: - Switch drivers to drm_mode_init, drm_mode_copy - amdgpu: Add drm buddy allocator support - bridge: Add DDC enable gpio support to display-connector, convert icn6211 to regmap - ingenic: HDMI support - panels: Support for SINO WEALTH SH1106 OLED display, simplify mode parsing in panel-lvds - sti: spelling fixes, bridge list iteration fixes - vc4: Writeback fixes and improvements ---------------------------------------------------------------- Arunpravin Paneer Selvam (2): drm/amdgpu: add drm buddy support to amdgpu drm: add a check to verify the size alignment Changcheng Deng (1): fbcon: use min() to make code cleaner Chen-Yu Tsai (4): dt-bindings: vendor-prefixes: Add prefix for SINO WEALTH Eletronics Ltd. dt-bindings: display: ssd1307fb: Add entry for SINO WEALTH SH1106 drm/ssd130x: Support page addressing mode drm/ssd130x: Add support for SINO WEALTH SH1106 Christian König (16): dma-buf: add enum dma_resv_usage v4 dma-buf: specify usage while adding fences to dma_resv obj v7 dma-buf & drm/amdgpu: remove dma_resv workaround dma-buf: add DMA_RESV_USAGE_KERNEL v3 drm/amdgpu: use DMA_RESV_USAGE_KERNEL drm/radeon: use DMA_RESV_USAGE_KERNEL RDMA: use DMA_RESV_USAGE_KERNEL dma-buf: add DMA_RESV_USAGE_BOOKKEEP v3 dma-buf: wait for map to complete for static attachments drm/i915: drop bo->moving dependency drm/ttm: remove bo->moving dma-buf: drop seq count based update seqlock: drop seqcount_ww_mutex_t futex: add missing rtmutex.h include drm/ttm: fix logic inversion in ttm_eu_reserve_buffers drm/ttm: fix kerneldoc for ttm_lru_bulk_move Colin Ian King (1): drm: sti: fix spelling mistake: rejec -> rejection Daniel Vetter (18): fbcon: delete a few unneeded forward decl fbcon: Move fbcon_bmove(_rec) functions fbcon: Introduce wrapper for console->fb_info lookup fbcon: delete delayed loading code fbdev/sysfs: Fix locking fbcon: Use delayed work for cursor fbcon: Replace FBCON_FLAGS_INIT with a boolean fb: Delete fb_info->queue fbcon: Extract fbcon_open/release helpers fbcon: Ditch error handling for con2fb_release_oldinfo fbcon: move more common code into fb_open() fbcon: use lock_fb_info in fbcon_open/release fbcon: Consistently protect deferred_takeover with console_lock() fbcon: Move console_lock for register/unlink/unregister fbcon: Move more code into fbcon_release fbcon: untangle fbcon_exit fbcon: Maintain a private array of fb_info fbcon: Fix delayed takeover locking H. Nikolaus Schaller (1): drm/bridge: display-connector: add ddc-en gpio support Javier Martinez Canillas (1): drm/vc4: Use newer fence API properly to fix build errors Jiasheng Jiang (1): drm: mali-dp: potential dereference of null pointer Julia Lawall (1): drm/sti: fix typos in comments Liviu Dudau (1): drm/komeda: return early if drm_universal_plane_init() fails. Marek Vasut (3): drm: bridge: icn6211: Convert to regmap drm/panel: lvds: Simplify mode parsing drm/panel: lvds: Use bus_flags from DT panel-timing property Matthew Auld (4): drm/i915: fix broken build drm/i915: fix i915_gem_object_wait_moving_fence drm/ttm: stop passing NULL fence in ttm_bo_move_sync_cleanup drm/ttm: fixup ttm_bo_add_move_fence v2 Maxime Ripard (6): drm/vc4: hvs: Reset muxes at probe time drm/vc4: txp: Don't set TXP_VSTART_AT_EOF drm/vc4: txp: Force alpha to be 0xff if it's disabled drm/vc4: kms: Store channel in local variable drm/vc4: kms: Warn if we have an incompatible muxing setup drm/vc4: kms: Improve logging Paul Boddie (1): drm/ingenic: Add dw-hdmi driver specialization for jz4780 Paul Cercueil (1): drm/ingenic: Implement proper .atomic_get_input_bus_fmts Randy Dunlap (1): drm: sti: don't use kernel-doc markers Robin Murphy (1): drm/arm/malidp: Stop using iommu_present() Ville Syrjälä (2): drm: Use drm_mode_init() for on-stack modes drm: Use drm_mode_copy() Xiaomeng Tong (1): stm: ltdc: fix two incorrect NULL checks on list iterator Zhou Qingyang (1): drm/komeda: Fix an undefined behavior bug in komeda_plane_add() .../bindings/display/solomon,ssd1307fb.yaml | 13 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + drivers/dma-buf/dma-buf.c | 22 +- drivers/dma-buf/dma-resv.c | 401 +++++------- drivers/dma-buf/st-dma-resv.c | 111 +--- drivers/gpu/drm/Kconfig | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 55 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 14 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 21 +- drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 97 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 359 +++++----- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 89 +++ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +- drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 10 +- drivers/gpu/drm/arm/malidp_crtc.c | 5 +- drivers/gpu/drm/arm/malidp_planes.c | 14 +- drivers/gpu/drm/bridge/Kconfig | 1 + drivers/gpu/drm/bridge/chipone-icn6211.c | 96 ++- drivers/gpu/drm/bridge/display-connector.c | 15 + drivers/gpu/drm/drm_buddy.c | 3 + drivers/gpu/drm/drm_crtc_helper.c | 12 +- drivers/gpu/drm/drm_edid.c | 8 +- drivers/gpu/drm/drm_gem.c | 3 +- drivers/gpu/drm/drm_gem_atomic_helper.c | 2 +- drivers/gpu/drm/drm_modes.c | 4 +- drivers/gpu/drm/drm_vblank.c | 2 +- drivers/gpu/drm/etnaviv/etnaviv_gem.c | 6 +- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 10 +- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 +- drivers/gpu/drm/i915/gem/i915_gem_busy.c | 10 +- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 3 +- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 42 +- drivers/gpu/drm/i915/gem/i915_gem_object.h | 8 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 20 +- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_wait.c | 6 +- .../gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 3 +- .../gpu/drm/i915/gem/selftests/i915_gem_migrate.c | 5 +- drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 4 +- drivers/gpu/drm/i915/i915_deps.c | 2 +- drivers/gpu/drm/i915/i915_request.c | 3 +- drivers/gpu/drm/i915/i915_sw_fence.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 17 +- .../gpu/drm/i915/selftests/intel_memory_region.c | 3 +- drivers/gpu/drm/ingenic/Kconfig | 9 + drivers/gpu/drm/ingenic/Makefile | 1 + drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 28 +- drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 103 +++ drivers/gpu/drm/lima/lima_gem.c | 7 +- drivers/gpu/drm/msm/msm_gem.c | 3 +- drivers/gpu/drm/msm/msm_gem_submit.c | 6 +- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 3 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 17 +- drivers/gpu/drm/nouveau/nouveau_fence.c | 12 +- drivers/gpu/drm/nouveau/nouveau_gem.c | 3 +- drivers/gpu/drm/nouveau/nouveau_prime.c | 17 +- drivers/gpu/drm/panel/panel-lvds.c | 31 +- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +- drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- drivers/gpu/drm/qxl/qxl_debugfs.c | 3 +- drivers/gpu/drm/qxl/qxl_release.c | 3 +- drivers/gpu/drm/radeon/radeon_display.c | 3 +- drivers/gpu/drm/radeon/radeon_gem.c | 9 +- drivers/gpu/drm/radeon/radeon_mn.c | 4 +- drivers/gpu/drm/radeon/radeon_object.c | 13 +- drivers/gpu/drm/radeon/radeon_prime.c | 14 +- drivers/gpu/drm/radeon/radeon_sync.c | 2 +- drivers/gpu/drm/radeon/radeon_uvd.c | 12 +- drivers/gpu/drm/scheduler/sched_main.c | 3 +- drivers/gpu/drm/solomon/Kconfig | 9 +- drivers/gpu/drm/solomon/ssd130x-i2c.c | 11 + drivers/gpu/drm/solomon/ssd130x.c | 73 ++- drivers/gpu/drm/solomon/ssd130x.h | 2 + drivers/gpu/drm/sti/sti_gdp.c | 2 +- drivers/gpu/drm/sti/sti_hdmi.c | 22 +- drivers/gpu/drm/stm/ltdc.c | 16 +- drivers/gpu/drm/ttm/ttm_bo.c | 37 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 27 +- drivers/gpu/drm/ttm/ttm_bo_vm.c | 34 +- drivers/gpu/drm/ttm/ttm_execbuf_util.c | 8 +- drivers/gpu/drm/v3d/v3d_gem.c | 4 +- drivers/gpu/drm/vc4/vc4_gem.c | 6 +- drivers/gpu/drm/vc4/vc4_hvs.c | 26 +- drivers/gpu/drm/vc4/vc4_kms.c | 39 +- drivers/gpu/drm/vc4/vc4_txp.c | 8 +- drivers/gpu/drm/vgem/vgem_fence.c | 13 +- drivers/gpu/drm/virtio/virtgpu_gem.c | 3 +- drivers/gpu/drm/virtio/virtgpu_ioctl.c | 5 +- drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 7 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 5 - drivers/infiniband/core/umem_dmabuf.c | 3 +- drivers/video/fbdev/core/fbcon.c | 720 ++++++++++----------- drivers/video/fbdev/core/fbcon.h | 8 +- drivers/video/fbdev/core/fbmem.c | 27 +- drivers/video/fbdev/core/fbsysfs.c | 2 + include/drm/ttm/ttm_bo_api.h | 2 - include/drm/ttm/ttm_bo_driver.h | 11 +- include/drm/ttm/ttm_resource.h | 3 +- include/linux/dma-buf.h | 24 +- include/linux/dma-resv.h | 180 ++++-- include/linux/fb.h | 1 - include/linux/seqlock.h | 8 +- kernel/futex/futex.h | 1 + 117 files changed, 1823 insertions(+), 1428 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h create mode 100644 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c [View Less]

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[PATCH v8 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
by Liu Ying 14 Apr '22

14 Apr '22

Hi, This is the v8 series to add i.MX8qxp LVDS PHY mode support for the Mixel PHY in the Freescale i.MX8qxp SoC. The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp SCU firmware. The PHY driver would call a SCU function to configure the mode. The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, where it appears to be a single MIPI DPHY. Patch 1/5 sets PHY mode in the Northwest … [View More]Logic MIPI DSI host controller bridge driver, since i.MX8qxp SoC embeds this controller IP to support MIPI DSI displays together with the Mixel PHY. Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions and through a custom structure added to the generic PHY configuration union. Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Welcome comments, thanks. v7->v8: * Trivial kernel doc style fix for patch 2/5 - add '*'. v6->v7: * Update the year of copyright for patch 2/5. * Better variable explanation for bits_per_lane_and_dclk_cycle in patch 2/5. * Use marco instead of magic number for CCM and CA values for patch 5/5. * Suppress 'checkpatch --strict' warnings for patch 5/5. v5->v6: * Rebase the series upon v5.17-rc1. * Set PHY mode in ->mode_set() instead of ->pre_enable() in the nwl-dsi bridge driver in patch 1/5 due to the rebase. * Drop Guido's R-b tag on patch 1/5 due to the rebase. v4->v5: * Align kernel-doc style of include/linux/phy/phy-lvds.h to include/linux/phy/phy.h for patch 2/5. (Vinod) * Trivial tweaks on patch 2/5. * Drop Robert's R-b tag on patch 2/5. v3->v4: * Add all R-b tags received from v3 on relevant patches and respin. (Robert) v2->v3: * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido) * Improve the 'clock-names' property in the PHY dt binding. v1->v2: * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido) * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido) * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver. Liu Ying (5): drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set() phy: Add LVDS configuration options dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 -- .../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 +++++++ drivers/gpu/drm/bridge/nwl-dsi.c | 6 + .../phy/freescale/phy-fsl-imx8-mipi-dphy.c | 276 +++++++++++++++++- include/linux/phy/phy-lvds.h | 32 ++ include/linux/phy/phy.h | 4 + 6 files changed, 414 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml create mode 100644 include/linux/phy/phy-lvds.h -- 2.25.1 [View Less]

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[PATCH v6 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
by Liu Ying 14 Apr '22

14 Apr '22

Hi, This is the v6 series to add i.MX8qxp LVDS PHY mode support for the Mixel PHY in the Freescale i.MX8qxp SoC. Comparing to v5, this version only rebases the series upon v5.17-rc1. The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp SCU firmware. The PHY driver would call a SCU function to configure the mode. The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, where it appears … [View More]to be a single MIPI DPHY. Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host controller bridge driver, since i.MX8qxp SoC embeds this controller IP to support MIPI DSI displays together with the Mixel PHY. Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions and through a custom structure added to the generic PHY configuration union. Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Welcome comments, thanks. v5->v6: * Rebase the series upon v5.17-rc1. * Set PHY mode in ->mode_set() instead of ->pre_enable() in the nwl-dsi bridge driver in patch 1/5 due to the rebase. * Drop Guido's R-b tag on patch 1/5 due to the rebase. * Resend with linux-phy ML Cc'ed and reviewer mail addresses updated for patch 1/5. v4->v5: * Align kernel-doc style of include/linux/phy/phy-lvds.h to include/linux/phy/phy.h for patch 2/5. (Vinod) * Trivial tweaks on patch 2/5. * Drop Robert's R-b tag on patch 2/5. v3->v4: * Add all R-b tags received from v3 on relevant patches and respin. (Robert) v2->v3: * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido) * Improve the 'clock-names' property in the PHY dt binding. v1->v2: * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido) * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido) * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver. Liu Ying (5): drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set() phy: Add LVDS configuration options dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 -- .../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 +++++++ drivers/gpu/drm/bridge/nwl-dsi.c | 6 + .../phy/freescale/phy-fsl-imx8-mipi-dphy.c | 269 +++++++++++++++++- include/linux/phy/phy-lvds.h | 32 +++ include/linux/phy/phy.h | 4 + 6 files changed, 407 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml create mode 100644 include/linux/phy/phy-lvds.h -- 2.25.1 [View Less]

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[pull] amdgpu drm-fixes-5.18
by Alex Deucher 14 Apr '22

14 Apr '22

Hi Dave, Daniel, Fixes for 5.18. The following changes since commit 88711fa9a14f6f473f4a7645155ca51386e36c21: Merge tag 'drm-misc-fixes-2022-04-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes (2022-04-08 09:22:16 +1000) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-fixes-5.18-2022-04-13 for you to fetch changes up to aadaeca46ce54af9f8f494792a1ba47a6fbda7ba: drm/amd/display: remove dtbclk_ss compensation for … [View More]

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