dri-devel May 2022

dri-devel@lists.freedesktop.org

344 participants
736 discussions

[PATCH v11 0/3] eDP/DP Phy vdda realted function
by Kuogee Hsieh 25 May '22

25 May '22

1) add regulator_set_load() to eDP phy 2) add regulator_set_load() to DP phy 3) remove vdda related function out of eDP/DP controller Kuogee Hsieh (3): phy: qcom-edp: add regulator_set_load to edp phy phy: qcom-qmp: add regulator_set_load to dp phy drm/msm/dp: delete vdda regulator related functions from eDP/DP controller drivers/gpu/drm/msm/dp/dp_parser.c | 14 ------ drivers/gpu/drm/msm/dp/dp_parser.h | 6 --- drivers/gpu/drm/msm/dp/dp_power.c | 95 +------------------------------------ drivers/phy/qualcomm/phy-qcom-edp.c | 12 +++++ drivers/phy/qualcomm/phy-qcom-qmp.c | 25 +++++++++- 5 files changed, 38 insertions(+), 114 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

2 6

[PATCH] drm/amdgpu/discovery: make amdgpu_discovery_get_mall_info static
by Jiapeng Chong 24 May '22

24 May '22

This symbol is not used outside of amdgpu_discovery.c, so marks it static. Fixes the following w1 warning: drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1364:5: warning: no previous prototype for ‘amdgpu_discovery_get_mall_info’ [-Wmissing-prototypes]. Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index 881570dced41..16cdfb30b013 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -1361,7 +1361,7 @@ union mall_info { struct mall_info_v1_0 v1; }; -int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) +static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) { struct binary_header *bhdr; union mall_info *mall_info; -- 2.20.1.7.g153144c

2 1

[PATCH v2 -next] drm/panel: Fix build error when CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=y && CONFIG_DRM_DISPLAY_HELPER=m
by gaochao 24 May '22

24 May '22

From: Gao Chao <gaochao49(a)huawei.com> If CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=y && CONFIG_DRM_DISPLAY_HELPER=m, bulding fails: drivers/gpu/drm/panel/panel-samsung-atna33xc20.o: In function `atana33xc20_probe': panel-samsung-atna33xc20.c:(.text+0x744): undefined reference to `drm_panel_dp_aux_backlight' make: *** [vmlinux] Error 1 Let CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 select DRM_DISPLAY_DP_HELPER and CONFIG_DRM_DISPLAY_HELPER to fix this error. Fixes: 32ce3b320343 ("drm/panel: atna33xc20: Introduce the Samsung ATNA33XC20 panel") Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Gao Chao <gaochao49(a)huawei.com> Reviewed-by: Douglas Anderson <dianders(a)chromium.org> --- v1->v2: fix Signed-off-by name --- drivers/gpu/drm/panel/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 38799effd00a..4f1f004b3c54 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -438,6 +438,8 @@ config DRM_PANEL_SAMSUNG_ATNA33XC20 depends on OF depends on BACKLIGHT_CLASS_DEVICE depends on PM + select DRM_DISPLAY_DP_HELPER + select DRM_DISPLAY_HELPER select DRM_DP_AUX_BUS help DRM panel driver for the Samsung ATNA33XC20 panel. This panel can't -- 2.17.1

2 1

[PATCH] drm/sun4i: mixer: fix scanline for V3s and D1
by Genfu Pan 24 May '22

24 May '22

Accrording the SDK from Allwinner, the scanline value of yuv and rgb for V3s are both 1024. The is also the same for mixer 1 of D1. Currently the scanline value of rgb is hardcoded to 2048 for all SOCs. Change the scanline_yuv property of V3s to 1024. Add the scanline_rgb property to the mixer config and replace the hardcoded value with it before scaling. Signed-off-by: Genfu Pan <benlypan(a)gmail.com> --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 13 ++++++++++++- drivers/gpu/drm/sun4i/sun8i_mixer.h | 1 + drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 3 +-- 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 875a1156c..e64e08207 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -567,6 +567,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, .scaler_mask = 0xf, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 3, .vi_num = 1, }; @@ -575,6 +576,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, .scaler_mask = 0x3, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 1, .vi_num = 1, }; @@ -584,6 +586,7 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { .mod_rate = 432000000, .scaler_mask = 0xf, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 3, .vi_num = 1, }; @@ -593,6 +596,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 3, .vi_num = 1, }; @@ -602,6 +606,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 1, .vi_num = 1, }; @@ -610,7 +615,8 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { .vi_num = 2, .ui_num = 1, .scaler_mask = 0x3, - .scanline_yuv = 2048, + .scanline_yuv = 1024, + .scanline_rgb = 1024, .ccsc = CCSC_MIXER0_LAYOUT, .mod_rate = 150000000, }; @@ -620,6 +626,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = { .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 1, .vi_num = 1, }; @@ -629,6 +636,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = { .mod_rate = 297000000, .scaler_mask = 0x1, .scanline_yuv = 1024, + .scanline_rgb = 1024, .ui_num = 0, .vi_num = 1, }; @@ -638,6 +646,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 4096, + .scanline_rgb = 2048, .ui_num = 3, .vi_num = 1, }; @@ -647,6 +656,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, + .scanline_rgb = 2048, .ui_num = 1, .vi_num = 1, }; @@ -657,6 +667,7 @@ static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .mod_rate = 600000000, .scaler_mask = 0xf, .scanline_yuv = 4096, + .scanline_rgb = 2048, .ui_num = 3, .vi_num = 1, }; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 85c94884f..c01b3e9d6 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -172,6 +172,7 @@ struct sun8i_mixer_cfg { unsigned long mod_rate; unsigned int is_de3 : 1; unsigned int scanline_yuv; + unsigned int scanline_rgb; }; struct sun8i_mixer { diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index f7d0b082d..30e6bde92 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -188,8 +188,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, src_h = vn; } - /* it seems that every RGB scaler has buffer for 2048 pixels */ - scanline = subsampled ? mixer->cfg->scanline_yuv : 2048; + scanline = subsampled ? mixer->cfg->scanline_yuv : mixer->cfg->scanline_rgb; if (src_w > scanline) { DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n"); -- 2.36.0

5 7

[PATCH v2 00/13] Add MEMORY_DEVICE_COHERENT for coherent device memory mapping
by Alex Sierra 24 May '22

24 May '22

This is our MEMORY_DEVICE_COHERENT patch series rebased and updated for current 5.18-rc7. Changes since the last version: - Fixed problems with migration during long-term pinning in get_user_pages - Open coded vm_normal_lru_pages as suggested in previous code review - Update hmm_gup_test with more get_user_pages calls, include hmm_cow_in_device in hmm-test. This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory owned by a device that can be mapped into CPU page tables like MEMORY_DEVICE_GENERIC and can also be migrated like MEMORY_DEVICE_PRIVATE. This patch series is mostly self-contained except for a few places where it needs to update other subsystems to handle the new memory type. System stability and performance are not affected according to our ongoing testing, including xfstests. How it works: The system BIOS advertises the GPU device memory (aka VRAM) as SPM (special purpose memory) in the UEFI system address map. The amdgpu driver registers the memory with devmap as MEMORY_DEVICE_COHERENT using devm_memremap_pages. The initial user for this hardware page migration capability is the Frontier supercomputer project. This functionality is not AMD-specific. We expect other GPU vendors to find this functionality useful, and possibly other hardware types in the future. Our test nodes in the lab are similar to the Frontier configuration, with .5 TB of system memory plus 256 GB of device memory split across 4 GPUs, all in a single coherent address space. Page migration is expected to improve application efficiency significantly. We will report empirical results as they become available. Coherent device type pages at gup are now migrated back to system memory if they are being pinned long-term (FOLL_LONGTERM). The reason is, that long-term pinning would interfere with the device memory manager owning the device-coherent pages (e.g. evictions in TTM). These series incorporate Alistair Popple patches to do this migration from pin_user_pages() calls. hmm_gup_test has been added to hmm-test to test different get user pages calls. This series includes handling of device-managed anonymous pages returned by vm_normal_pages. Although they behave like normal pages for purposes of mapping in CPU page tables and for COW, they do not support LRU lists, NUMA migration or THP. We also introduced a FOLL_LRU flag that adds the same behaviour to follow_page and related APIs, to allow callers to specify that they expect to put pages on an LRU list. v2: - Rebase to latest 5.18-rc7. - Drop patch "mm: add device coherent checker to remove migration pte" and modify try_to_migrate_one, to let DEVICE_COHERENT pages fall through to normal page path. Based on Alistair Popple's comment. - Fix comment formatting. - Reword comment in vm_normal_page about pte_devmap(). - Merge "drm/amdkfd: coherent type as sys mem on migration to ram" to "drm/amdkfd: add SPM support for SVM". Alex Sierra (11): mm: add zone device coherent type memory support mm: add device coherent vma selection for memory migration drm/amdkfd: add SPM support for SVM lib: test_hmm add ioctl to get zone device type lib: test_hmm add module param for zone device type lib: add support for device coherent type in test_hmm tools: update hmm-test to support device coherent type tools: update test_hmm script to support SP config mm: handling Non-LRU pages returned by vm_normal_pages tools: add hmm gup tests for device coherent type tools: add selftests to hmm for COW in device memory Alistair Popple (2): mm: remove the vma check in migrate_vma_setup() mm/gup: migrate device coherent pages when pinning instead of failing drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 33 ++- fs/proc/task_mmu.c | 2 +- include/linux/memremap.h | 19 ++ include/linux/migrate.h | 1 + include/linux/mm.h | 3 +- lib/test_hmm.c | 349 +++++++++++++++++------ lib/test_hmm_uapi.h | 22 +- mm/gup.c | 49 +++- mm/huge_memory.c | 2 +- mm/internal.h | 1 + mm/khugepaged.c | 9 +- mm/ksm.c | 6 +- mm/madvise.c | 4 +- mm/memcontrol.c | 7 +- mm/memory-failure.c | 8 +- mm/memory.c | 9 +- mm/mempolicy.c | 2 +- mm/memremap.c | 10 + mm/migrate.c | 4 +- mm/migrate_device.c | 115 ++++++-- mm/mlock.c | 2 +- mm/mprotect.c | 2 +- mm/rmap.c | 5 +- tools/testing/selftests/vm/hmm-tests.c | 308 ++++++++++++++++++-- tools/testing/selftests/vm/test_hmm.sh | 24 +- 25 files changed, 814 insertions(+), 182 deletions(-) -- 2.32.0

4 16

[PATCH v3 0/5] i915: Introduce Ponte Vecchio
by Matt Roper 24 May '22

24 May '22

Ponte Vecchio (PVC) is a new GPU based on the Xe_HPC architecture. As a compute-focused platform, PVC has compute engines and enhanced copy engines, but no render engine (there is no geometry pipeline) and no display. This is just a handful of early enablement patches, including some initial support for the new copy engines (although we're not yet adding those to the platform's engine list or exposing them to userspace just yet). v2: - Drop replicated comment from forcewake patch completely and add an additional commit to provide better documentation for forcewake and shadowed register tables in a way that's clear for all platforms. - Move gvt build fix to its own patch. - Address various minor review feedback from Lucas, Tvrtko, and Prathap. v3: - Flip the feature flag in the PIPE_CONTROL patch. (Lucas) - Add two additional GuC-related patches. Daniele Ceraolo Spurio (1): drm/i915/guc: XEHPSDV and PVC do not use HuC Matt Roper (3): drm/i915/uncore: Reorganize and document shadow and forcewake tables drm/i915/pvc: Add forcewake support drm/i915/pvc: Add new BCS engines to GuC engine list Stuart Summers (1): drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 18 +- drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 15 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 4 + drivers/gpu/drm/i915/i915_drv.h | 4 + drivers/gpu/drm/i915/i915_pci.c | 10 + drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/intel_uncore.c | 267 +++++++++++++++--- drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 + 9 files changed, 268 insertions(+), 55 deletions(-) -- 2.35.1

2 10

[PATCH] drm/msm/disp/dpu1: remove supoerflous init
by Vinod Koul 24 May '22

24 May '22

Commit 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in encoder") added dsc_common_mode variable which was set to zero but then again programmed, so drop the supoerflous init. Fixes: 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in encoder") Reported-by: kernel test robot <yujie.liu(a)intel.com> Signed-off-by: Vinod Koul <vkoul(a)kernel.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 51f24ba68375..388125c8bda1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1798,7 +1798,6 @@ static void dpu_encoder_prep_dsc(struct dpu_encoder_virt *dpu_enc, } } - dsc_common_mode = 0; pic_width = dsc->drm->pic_width; dsc_common_mode = DSC_MODE_MULTIPLEX | DSC_MODE_SPLIT_PANEL; -- 2.34.1

4 3

Re: linux-next: Tree for May 24 (drivers/gpu/drm/i915/display/intel_backlight.o)
by Randy Dunlap 24 May '22

24 May '22

On 5/24/22 02:26, Stephen Rothwell wrote: > Hi all, > > Note: please do not add any v5.20 material to your linux-next included > branches until after v5.19-rc1 has been related. > > Changes since 20220523: > on i386: drivers/gpu/drm/i915/display/intel_backlight.o: in function `intel_backlight_device_register': intel_backlight.c:(.text+0x301e): undefined reference to `backlight_device_register' ld: intel_backlight.c:(.text+0x3181): undefined reference to `backlight_device_register' ld: drivers/gpu/drm/i915/display/intel_backlight.o: in function `intel_backlight_device_unregister': intel_backlight.c:(.text+0x31c9): undefined reference to `backlight_device_unregister' CONFIG_DRM_I915=y CONFIG_BACKLIGHT_CLASS_DEVICE=m Full randconfig file is attached. -- ~Randy

1 0

[PATCH] drm/panfrost: Job should reference MMU not file_priv
by Steven Price 24 May '22

24 May '22

For a while now it's been allowed for a MMU context to outlive it's corresponding panfrost_priv, however the job structure still references panfrost_priv to get hold of the MMU context. If panfrost_priv has been freed this is a use-after-free which I've been able to trigger resulting in a splat. To fix this, drop the reference to panfrost_priv in the job structure and add a direct reference to the MMU structure which is what's actually needed. Fixes: 7fdc48cc63a3 ("drm/panfrost: Make sure MMU context lifetime is not bound to panfrost_priv") Signed-off-by: Steven Price <steven.price(a)arm.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 5 +++-- drivers/gpu/drm/panfrost/panfrost_job.c | 6 +++--- drivers/gpu/drm/panfrost/panfrost_job.h | 2 +- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 7fcbc2a5b6cd..087e69b98d06 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -233,6 +233,7 @@ static int panfrost_ioctl_submit(struct drm_device *dev, void *data, struct drm_file *file) { struct panfrost_device *pfdev = dev->dev_private; + struct panfrost_file_priv *file_priv = file->driver_priv; struct drm_panfrost_submit *args = data; struct drm_syncobj *sync_out = NULL; struct panfrost_job *job; @@ -262,12 +263,12 @@ static int panfrost_ioctl_submit(struct drm_device *dev, void *data, job->jc = args->jc; job->requirements = args->requirements; job->flush_id = panfrost_gpu_get_latest_flush_id(pfdev); - job->file_priv = file->driver_priv; + job->mmu = file_priv->mmu; slot = panfrost_job_get_slot(job); ret = drm_sched_job_init(&job->base, - &job->file_priv->sched_entity[slot], + &file_priv->sched_entity[slot], NULL); if (ret) goto out_put_job; diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c index fda5871aebe3..7c4208476fbd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -201,7 +201,7 @@ static void panfrost_job_hw_submit(struct panfrost_job *job, int js) return; } - cfg = panfrost_mmu_as_get(pfdev, job->file_priv->mmu); + cfg = panfrost_mmu_as_get(pfdev, job->mmu); job_write(pfdev, JS_HEAD_NEXT_LO(js), lower_32_bits(jc_head)); job_write(pfdev, JS_HEAD_NEXT_HI(js), upper_32_bits(jc_head)); @@ -435,7 +435,7 @@ static void panfrost_job_handle_err(struct panfrost_device *pfdev, job->jc = 0; } - panfrost_mmu_as_put(pfdev, job->file_priv->mmu); + panfrost_mmu_as_put(pfdev, job->mmu); panfrost_devfreq_record_idle(&pfdev->pfdevfreq); if (signal_fence) @@ -456,7 +456,7 @@ static void panfrost_job_handle_done(struct panfrost_device *pfdev, * happen when we receive the DONE interrupt while doing a GPU reset). */ job->jc = 0; - panfrost_mmu_as_put(pfdev, job->file_priv->mmu); + panfrost_mmu_as_put(pfdev, job->mmu); panfrost_devfreq_record_idle(&pfdev->pfdevfreq); dma_fence_signal_locked(job->done_fence); diff --git a/drivers/gpu/drm/panfrost/panfrost_job.h b/drivers/gpu/drm/panfrost/panfrost_job.h index 77e6d0e6f612..8becc1ba0eb9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.h +++ b/drivers/gpu/drm/panfrost/panfrost_job.h @@ -17,7 +17,7 @@ struct panfrost_job { struct kref refcount; struct panfrost_device *pfdev; - struct panfrost_file_priv *file_priv; + struct panfrost_mmu *mmu; /* Fence to be signaled by IRQ handler when the job is complete. */ struct dma_fence *done_fence; -- 2.30.2

2 1

[PULL] drm-intel-next-fixes
by Jani Nikula 24 May '22

24 May '22

Hi Dave & Daniel - Some i915 fixes for v5.19 merge window. drm-intel-next-fixes-2022-05-24: drm/i915 fixes for v5.19 merge window: - Build, sparse, UB, and CFI fixes - Variable scope fix - Audio pipe logging fix - ICL+ DSI NULL dereference fix BR, Jani. The following changes since commit f83493f7d34da258310ecd3d07f0cc78f884c954: Merge tag 'drm-msm-next-2022-05-09' of https://gitlab.freedesktop.org/drm/msm into drm-next (2022-05-11 12:40:47 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-fixes-2022-05-24 for you to fetch changes up to 0ea917819d12fed41ea4662cc26ffa0060a5c354: drm/i915/dsi: fix VBT send packet port selection for ICL+ (2022-05-23 12:08:58 +0300) ---------------------------------------------------------------- drm/i915 fixes for v5.19 merge window: - Build, sparse, UB, and CFI fixes - Variable scope fix - Audio pipe logging fix - ICL+ DSI NULL dereference fix ---------------------------------------------------------------- Andi Shyti (1): drm/i915/gt: Fix use of static in macro mismatch Borislav Petkov (1): drm/i915/uc: Fix undefined behavior due to shift overflowing the constant Imre Deak (1): drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c Jani Nikula (3): drm/i915/audio: fix audio code enable/disable pipe logging drm/i915/reg: fix undefined behavior due to shift overflowing the constant drm/i915/dsi: fix VBT send packet port selection for ICL+ Nathan Chancellor (1): drm/i915: Fix CFI violation with show_dynamic_id() YueHaibing (1): drm/i915/gt: Fix build error without CONFIG_PM drivers/gpu/drm/i915/display/intel_audio.c | 4 +-- drivers/gpu/drm/i915/display/intel_display_power.c | 8 +++--- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 33 ++++++++++++++-------- drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 23 +++++++-------- drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 2 +- .../drm/i915/gt/uc/abi/guc_communication_ctb_abi.h | 2 +- drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h | 2 +- drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h | 2 +- drivers/gpu/drm/i915/i915_perf.c | 4 +-- drivers/gpu/drm/i915/i915_perf_types.h | 2 +- drivers/gpu/drm/i915/i915_reg.h | 32 ++++++++++----------- 11 files changed, 63 insertions(+), 51 deletions(-) -- Jani Nikula, Intel Open Source Graphics Center

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dri-devel May 2022