dri-devel April 2012

dri-devel@lists.freedesktop.org

119 participants
668 discussions

exynos broken ioctl
by Dave Airlie 12 Apr '12

12 Apr '12

please before submitting ioctl's can someone review them to make sure they have no pointers in them ever. struct drm_exynos_vidi_connection { unsigned int connection; unsigned int extensions; uint64_t *edid; }; gets passed into DRM_EXYNOS_VIDI_CONNECTION ioctl. Can you remove the point, it should be just a uint64_t most likely. I don't think this has been in a released kernel so should be okay to fix. Dave.

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[pull] drm-intel-fixes for 3.4-rc3
by Daniel Vetter 12 Apr '12

12 Apr '12

Hi Dave 3 regression fixes: - disable gmbus again, too broken for 3.4, we'll try again for 3.5 - dp bandwidth computation fix, we've lost the 6bpc dithering flag sometimes, this is a 3.3 regression (maybe even earlier for some configurations). - fix resume regression caused by the gen2/3 fencing fix merged into -rc2. And a few other fixes: - gpu hang fix for i845 (Chris) - sprite fix (Armin Reese) - crtc disable vs. scanlinewait race fix (Chris) - rc6 module option read-only, it confused testers (Jesse) - fbc related blitter death hw workaround, note that we disable fbc on snb by default anyway. With these fixes we have one 3.4 regression outstanding: One of the cleanup patches for the interlaced support managed to confuse the lvds panel fitter when upscaling. The root-cause is still unclear, but test patches are awaiting feedback from the reporter. Yours, Daniel The following changes since commit 0034102808e0dbbf3a2394b82b1bb40b5778de9e: Linux 3.4-rc2 (2012-04-07 18:30:41 -0700) are available in the git repository at: git://people.freedesktop.org/~danvet/drm-intel drm-intel-fixes for you to fetch changes up to 15a13bbdffb0d6288a5dd04aee9736267da1335f: drm/i915: clear fencing tracking state when retiring requests (2012-04-12 09:02:37 +0200) ---------------------------------------------------------------- Chris Wilson (2): drm/i915: Finish any pending operations on the framebuffer before disabling drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g Daniel Vetter (4): drm/i915: properly compute dp dithering for user-created modes Revert "drm/i915: reenable gmbus on gen3+ again" drm/i915: implement ColorBlt w/a drm/i915: clear fencing tracking state when retiring requests Jesse Barnes (1): drm/i915: make rc6 module parameter read-only acreese (1): drm/i915: Removed IVB forced enable of sprite dest key. drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/i915_reg.h | 3 + drivers/gpu/drm/i915/intel_display.c | 69 ++++++++++++++++++++++-------- drivers/gpu/drm/i915/intel_dp.c | 49 ++++++++++++++++------ drivers/gpu/drm/i915/intel_i2c.c | 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- drivers/gpu/drm/i915/intel_sprite.c | 1 - 8 files changed, 93 insertions(+), 37 deletions(-) -- Daniel Vetter Mail: daniel(a)ffwll.ch Mobile: +41 (0)79 365 57 48

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[PATCH] drm/i915: clear fencing tracking state when retiring request
by Daniel Vetter 12 Apr '12

12 Apr '12

This fixes a regression introduce in commit 7dd4906586274f3945f2aeaaa5a33b451c3b4bba Author: Chris Wilson <chris(a)chris-wilson.co.uk> Date: Wed Mar 21 10:48:18 2012 +0000 drm/i915: Mark untiled BLT commands as fenced on gen2/3 which fixed fencing tracking for untiled blt commands. A side effect of that patch was that now also untiled objects have a non-zero obj->last_fenced_seqno to track when a fence can be set up after a pipelined tiling change. Unfortunately this was only cleared by the fence setup and teardown code, resulting in tons of untiled but inactive objects with non-zero last_fenced_seqno. Now after resume we completely reset the seqno tracking, both on the driver side (by setting dev_priv->next_seqno = 1) and on the hw side (by allocating a new hws page, which contains the seqnos). Hilarity and indefinite waits ensued from the stale seqnos in obj->last_fenced_seqno from before the suspend. The fix is to properly clear the fencing tracking state like we already do for the normal gpu rendering while moving objects off the active list. Reported-and-tested-by: "Rafael J. Wysocki" <rjw(a)sisk.pl> Cc: Jiri Slaby <jslaby(a)suse.cz> Signed-Off-by: Daniel Vetter <daniel.vetter(a)ffwll.ch> --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 71934dd..cf50fbc 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1415,6 +1415,7 @@ i915_gem_object_move_off_active(struct drm_i915_gem_object *obj) { list_del_init(&obj->ring_list); obj->last_rendering_seqno = 0; + obj->last_fenced_seqno = 0; } static void @@ -1443,6 +1444,7 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj) BUG_ON(!list_empty(&obj->gpu_write_list)); BUG_ON(!obj->active); obj->ring = NULL; + obj->last_fenced_ring = NULL; i915_gem_object_move_off_active(obj); obj->fenced_gpu_access = false; -- 1.7.9.1

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[git pull] updated exynos-drm-fixes
by Inki Dae 12 Apr '12

12 Apr '12

Hi Dave, Please pull from git://git.infradead.org/users/kmpark/linux-samsung exynos-drm-fixes this branch is based on git repository below: git://people.freedesktop.org/~airlied/linux.git drm-fixes commit-id: 62fb376e214d3c1bfdf6fbb77dac162f6da04d7e this patch set includes page align and allocation bug fixes and some code cleanup and also Joonyoung's patch set v2 like below. v2: Split "[PATCH 2/4] drm/exynos: remove unused codes in hdmi and mixer driver" patch of patchset v1. Please let me know if there is any problem. Thanks. Inki Dae (2): drm/exynos: fixed page align and code clean. drm/exynos: fixed duplicated page allocation bug. Joonyoung Shim (6): drm/exynos: remove unnecessary type conversion of hdmi and mixer drm/exynos: remove unused codes in hdmi and mixer drm/exynos: rename s/HDMI_OVERLAY_NUMBER/MIXER_WIN_NR drm/exynos: use define instead of default_win member in struct mixer_context drm/exynos: fix struct for operation callback functions to driver name drm/exynos: fix to pointer manager member of struct exynos_drm_subdrv Seung-Woo Kim (1): drm/exynos: add format list of plane drivers/gpu/drm/exynos/exynos_drm_buf.c | 47 ++++--------- drivers/gpu/drm/exynos/exynos_drm_core.c | 14 ++-- drivers/gpu/drm/exynos/exynos_drm_drv.h | 10 ++-- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 20 +++-- drivers/gpu/drm/exynos/exynos_drm_gem.c | 45 ++++++++++--- drivers/gpu/drm/exynos/exynos_drm_gem.h | 2 + drivers/gpu/drm/exynos/exynos_drm_hdmi.c | 107 +++++++++++++---------------- drivers/gpu/drm/exynos/exynos_drm_hdmi.h | 23 +++---- drivers/gpu/drm/exynos/exynos_drm_plane.c | 4 + drivers/gpu/drm/exynos/exynos_drm_vidi.c | 20 +++-- drivers/gpu/drm/exynos/exynos_hdmi.c | 42 ++++++------ drivers/gpu/drm/exynos/exynos_mixer.c | 40 +++++------ include/drm/exynos_drm.h | 3 +- 13 files changed, 191 insertions(+), 186 deletions(-) -- 1.7.4.1

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[Bug 48535] New: Spurious GL_INVALID_OPERATION error generated by glColor()
by bugzilla-daemon＠freedesktop.org 12 Apr '12

12 Apr '12

https://bugs.freedesktop.org/show_bug.cgi?id=48535 Bug #: 48535 Summary: Spurious GL_INVALID_OPERATION error generated by glColor() Classification: Unclassified Product: Mesa Version: 7.10 Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: minor Priority: low Component: Drivers/DRI/Radeon AssignedTo: dri-devel(a)lists.freedesktop.org ReportedBy: i.am.inuyasha(a)gmail.com Created attachment 59785 --> https://bugs.freedesktop.org/attachment.cgi?id=59785 Program that reproduces the issue In some unknown circumstance glColor() can raise a GL_INVALID_OPERATION error, which according to the manual should never happen. The attached program reproduces the issue. It's generated from a log of GL calls made by another program, so it's quite long (and some texture-related commands have been stripped out, which I verified does not affect the result). The output I get is: Error 1282 at line 7353 which is consistent with the original program's issue - glColor() suddenly raises this error after making all these GL calls. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug.

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(no subject)
by Rodrigo Vivi 12 Apr '12

12 Apr '12

There are many bugs open on fd.o regarding missing modes that are supported on Windows and other closed source drivers. >From EDID spec we can (might?) infer modes using GTF and CVT when monitor allows it trough range limited flag... obviously limiting by the range. >From our code: * EDID spec says modes should be preferred in this order: * - preferred detailed mode * - other detailed modes from base block * - detailed modes from extension blocks * - CVT 3-byte code modes * - standard timing codes * - established timing codes * - modes inferred from GTF or CVT range information * * We get this pretty much right. Not actually so right... We were inferring just using GTF... not CVT or even GTF2. This patch not just add some common cvt modes but also allows some modes been inferred when using gtf2 as well. Cheers, Rodrigo. >From 4b7a88d0d812583d850ca691d1ac491355230d11 Mon Sep 17 00:00:00 2001 From: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Date: Wed, 11 Apr 2012 15:36:31 -0300 Subject: [PATCH] drm/edid: Adding common CVT inferred modes when monitor allows range limited ones trough EDID. Signed-off-by: Rodrigo Vivi <rodrigo.vivi(a)intel.com> --- drivers/gpu/drm/drm_edid.c | 37 +++++++++++++- drivers/gpu/drm/drm_edid_modes.h | 101 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 136 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 7ee7be1..3179572 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1020,17 +1020,50 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, return modes; } +static int +drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, + struct detailed_timing *timing) +{ + int i, modes = 0; + struct drm_display_mode *newmode; + struct drm_device *dev = connector->dev; + + for (i = 0; i < drm_num_cvt_inferred_modes; i++) { + if (mode_in_range(drm_cvt_inferred_modes + i, edid, timing)) { + newmode = drm_mode_duplicate(dev, &drm_cvt_inferred_modes[i]); + if (newmode) { + drm_mode_probed_add(connector, newmode); + modes++; + } + } + } + + return modes; +} + static void do_inferred_modes(struct detailed_timing *timing, void *c) { struct detailed_mode_closure *closure = c; struct detailed_non_pixel *data = &timing->data.other_data; - int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); + int timing_level = standard_timing_level(closure->edid); - if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE) + if (data->type == EDID_DETAIL_MONITOR_RANGE) + switch (timing_level) { + case LEVEL_DMT: + break; + case LEVEL_GTF: + case LEVEL_GTF2: closure->modes += drm_gtf_modes_for_range(closure->connector, closure->edid, timing); + break; + case LEVEL_CVT: + closure->modes += drm_cvt_modes_for_range(closure->connector, + closure->edid, + timing); + break; + } } static int diff --git a/drivers/gpu/drm/drm_edid_modes.h b/drivers/gpu/drm/drm_edid_modes.h index a91ffb1..7e14a32 100644 --- a/drivers/gpu/drm/drm_edid_modes.h +++ b/drivers/gpu/drm/drm_edid_modes.h @@ -266,6 +266,107 @@ static const struct drm_display_mode drm_dmt_modes[] = { static const int drm_num_dmt_modes = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); +static const struct drm_display_mode drm_cvt_inferred_modes[] = { + /* 640x480@60Hz */ + { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 23750 640, 664, + 720, 800, 0, 480, 483, 487, 500, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 800x600@60Hz */ + { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 38250, 800, 832, + 912, 1024, 0, 600, 603, 607, 624, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 900x600@60Hz */ + { DRM_MODE("900x600", DRM_MODE_TYPE_DRIVER, 45250, 960, 992, + 1088, 1216, 0, 600, 603, 609, 624, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1024x576@60Hz */ + { DRM_MODE("1024x576", DRM_MODE_TYPE_DRIVER, 46500, 1024, 1064, + 1160, 1296, 0, 576, 579, 584, 599, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1024x768@60Hz */ + { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 63500, 1024, 1072, + 1176, 1328, 0, 768, 771, 775, 798, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1152x864@60Hz */ + { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 81750, 1152, 1216, + 1336, 1520, 0, 864, 867, 871, 897, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1280x720@60Hz */ + { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74500, 1280, 1344, + 1472, 1664, 0, 720, 723, 728, 748, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1280x768@60Hz */ + { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, + 1472, 1664, 0, 768, 771, 781, 798, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1280x800@60Hz */ + { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, + 1480, 1680, 0, 800, 803, 809, 831, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1280x1024@60Hz */ + { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 109000, 1280, 1368, + 1496, 1712, 0, 1024, 1027, 1034, 1063, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1360x768@60Hz */ + { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 84750, 1360, 1432, + 1568, 1776, 0, 768, 771, 781, 798, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1366x768@60Hz */ + { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85250, 1368, 1440, + 1576, 1784, 0, 768, 771, 781, 798, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1440x900@60Hz */ + { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1528, + 1672, 1904, 0, 900, 903, 909, 934, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1400x1050@60Hz */ + { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, + 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1600x900@60Hz */ + { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 118250, 1600, 1696, + 1856, 2112, 0, 900, 903, 908, 934, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1600x1200@60Hz */ + { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 161000, 1600, 1712, + 1880, 2160, 0, 1200, 1203, 1207, 1245, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1680x945@60Hz */ + { DRM_MODE("1680x945", DRM_MODE_TYPE_DRIVER, 130750, 1680, 1776, + 1952, 2224, 0, 945, 948, 953, 981, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1680x1050@60Hz */ + { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, + 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1920x1080@60Hz */ + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 73000, 1920, 2048, + 2248, 2576, 0, 1080, 1083, 1088, 1120, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1920x1200@60Hz */ + { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, + 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 1920x1440@60Hz */ + { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 233500, 1920, 2064, + 2264, 2608, 0, 1440, 1443, 1447, 1493, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 2048x1152@60Hz */ + { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 197000, 2048, 2184, + 2400, 2752, 0, 1152, 1155, 1160, 1195, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 2048x1536@60Hz */ + { DRM_MODE("2048x1536", DRM_MODE_TYPE_DRIVER, 272000, 2048, 2208, + 2424, 2800, 0, 1563, 1566, 1576, 1620, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, + /* 2560x1600@60Hz */ + { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2760, + 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, +}; +static const int drm_num_cvt_inferred_modes = + sizeof(drm_cvt_inferred_modes) / sizeof(struct drm_display_mode); + static const struct drm_display_mode edid_est_modes[] = { { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, -- 1.7.7.6

1 0

(no subject)
by Rodrigo Vivi 12 Apr '12

12 Apr '12

1 0

[PATCH] gma500: Don't needlessly include version.h in mdfld_dsi_output.h
by Jesper Juhl 11 Apr '12

11 Apr '12

drivers/gpu/drm/gma500/mdfld_dsi_output.h does not need to '#include <linux/version.h>' - so don't. Signed-off-by: Jesper Juhl <jj(a)chaosbits.net> --- drivers/gpu/drm/gma500/mdfld_dsi_output.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.h b/drivers/gpu/drm/gma500/mdfld_dsi_output.h index 21071ce..36eb074 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.h +++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.h @@ -29,7 +29,6 @@ #define __MDFLD_DSI_OUTPUT_H__ #include <linux/backlight.h> -#include <linux/version.h> #include <drm/drmP.h> #include <drm/drm.h> #include <drm/drm_crtc.h> -- 1.7.10 -- Jesper Juhl <jj(a)chaosbits.net> http://www.chaosbits.net/ Don't top-post http://www.catb.org/jargon/html/T/top-post.html Plain text mails only, please.

3 2

[3.4-rc1][Regression][intel] Resume from suspend to disk hangs on restoring backlight state
by Maciej Rutecki 11 Apr '12

11 Apr '12

Last known good: 3.3 Bad kernel: 3.4-rc1 Subsystem: power management/suspend/dri(intel) When I resume from suspend to disk then system hangs on this screen: http://mrutecki.pl/download/kernel/3.4-rc1/suspend_resume/DSC_5479.jpg It does not help SysRq keys. Only I can force power off by hold power button. Dmesg: http://mrutecki.pl/download/kernel/3.4-rc1/suspend_resume/dmesg-3.4-rc1.txt Config: http://mrutecki.pl/download/kernel/3.4-rc1/suspend_resume/config-3.4.0-rc1 -- Maciej Rutecki http://www.mrutecki.pl

2 5

i915: NULL pointer dereference in pagevec_move_tail
by Jiri Slaby 11 Apr '12

11 Apr '12

Hi, in today's -next I see: BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<ffffffff810e3990>] pagevec_move_tail+0x30/0x30 PGD 1bf4fc067 PUD 1bf4f0067 PMD 0 Oops: 0000 [#1] SMP CPU 0 Modules linked in: pl2303 usbserial microcode Pid: 4260, comm: X Not tainted 3.4.0-rc2-next-20120410_64+ #1683 To Be Filled By O.E.M. To Be Filled By O.E.M./To be filled by O.E.M. RIP: 0010:[<ffffffff810e3990>] [<ffffffff810e3990>] pagevec_move_tail+0x30/0x30 RSP: 0018:ffff8801bf7f1ca0 EFLAGS: 00010202 RAX: ffff8801c1502b60 RBX: 0000000000000008 RCX: ffff8801c286a000 RDX: 0000000000000000 RSI: 0000000000000819 RDI: 0000000000000000 RBP: ffff8801bf7f1cc8 R08: 0000000000000001 R09: ffff8801bf7f1fd8 R10: ffff8801bf7f1fd8 R11: ffff880000000000 R12: ffff8801bf6cbe00 R13: 0000000000000008 R14: ffff8801bfdf6138 R15: ffff8801c2def000 FS: 00007fd1d3d9f880(0000) GS:ffff8801cbc00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000000 CR3: 00000001bff5b000 CR4: 00000000000007f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Process X (pid: 4260, threadinfo ffff8801bf7f0000, task ffff8801c28ea640) Stack: ffffffff81345290 ffff8801bf7f1cc8 ffff8801bf6cbe00 0000000000000000 ffff8801c286a000 ffff8801bf7f1cf8 ffffffff813486fd ffff8801bf7f1cf8 ffff8801bf6cbe00 ffff8801c286a000 000000000000000a ffff8801bf7f1d18 Call Trace: [<ffffffff81345290>] ? i915_gem_object_put_pages_gtt+0x90/0x180 [<ffffffff813486fd>] i915_gem_object_unbind+0xad/0x1e0 [<ffffffff8134884a>] i915_gem_free_object_tail+0x1a/0xd0 [<ffffffff8134b391>] i915_gem_free_object+0x51/0x60 [<ffffffff8131faa5>] drm_gem_object_free+0x25/0x40 [<ffffffff81320120>] drm_gem_handle_delete+0xf0/0x120 [<ffffffff813203a3>] drm_gem_close_ioctl+0x23/0x30 [<ffffffff8131e20c>] drm_ioctl+0x43c/0x510 [<ffffffff81086472>] ? enqueue_hrtimer+0x22/0x50 [<ffffffff81320380>] ? drm_gem_destroy+0x50/0x50 [<ffffffff81086e9f>] ? hrtimer_start_range_ns+0xf/0x20 [<ffffffff811325d7>] do_vfs_ioctl+0x97/0x580 [<ffffffff81121ead>] ? vfs_read+0xfd/0x180 [<ffffffff81132b0a>] sys_ioctl+0x4a/0x80 [<ffffffff816359e2>] system_call_fastpath+0x16/0x1b Code: 32 0e 81 48 89 e5 48 83 ec 10 48 8d 55 fc c7 45 fc 00 00 00 00 e8 e1 fe ff ff 48 63 45 fc 65 48 01 04 25 b0 e3 00 00 c9 c3 66 90 <48> f7 07 00 c 0f RIP [<ffffffff810e3990>] pagevec_move_tail+0x30/0x30 RSP <ffff8801bf7f1ca0> CR2: 0000000000000000 This is G33: 00:02.0 VGA compatible controller [0300]: Intel Corporation 82G33/G31 Express Integrated Graphics Controller [8086:29c2] (rev 02) (prog-if 00 [VGA controller]) Subsystem: Intel Corporation 82G33/G31 Express Integrated Graphics Controller [8086:29c2] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 42 Region 0: Memory at feb80000 (32-bit, non-prefetchable) [size=512K] Region 1: I/O ports at ec00 [size=8] Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] Region 3: Memory at fea00000 (32-bit, non-prefetchable) [size=1M] Expansion ROM at <unassigned> [disabled] Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4179 Capabilities: [d0] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: i915 00: 86 80 c2 29 07 04 90 00 02 00 00 03 00 00 00 00 10: 00 00 b8 fe 01 ec 00 00 08 00 00 d0 00 00 a0 fe 20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 c2 29 30: 00 00 00 00 90 00 00 00 00 00 00 00 05 01 00 00 40: 09 00 0b 01 00 00 00 00 01 00 00 00 00 00 00 00 50: 00 00 30 02 c9 03 00 00 00 00 00 00 00 00 80 af 60: 00 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 05 d0 01 00 0c 30 e0 fe 79 41 00 00 00 00 00 00 a0: 11 11 00 00 00 00 06 03 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 01 02 00 e0: 00 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 f0: 10 00 00 00 00 00 00 00 90 0f 03 00 e4 e0 5b af thanks, -- js suse labs

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dri-devel April 2012