dri-devel May 2013

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705 discussions

[PATCH] drm/i915: no lvds quirk for hp t5740
by Ben Mesman (Bossers & Cnossen BV) 30 May '13

30 May '13

Hi, Last year, a patch was made for the "HP t5740e Thin Client" (see http://lists.freedesktop.org/archives/dri-devel/2012-May/023245.html). This device reports an lvds panel, but does not really have one. The predecessor of this device is the "hp t5740", which also does not have an lvds panel. This patch will add the same quirk for this device. The dmidecode output is attached below the patch. Regards, Ben Mesman. === --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -748,6 +748,14 @@ }, { .callback = intel_no_lvds_dmi_callback, + .ident = "Hewlett-Packard hp t5740", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "hp t5740"), + }, + }, + { + .callback = intel_no_lvds_dmi_callback, .ident = "Hewlett-Packard HP t5740e Thin Client", .matches = { DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), === # dmidecode 2.11 SMBIOS 2.6 present. 43 structures occupying 1552 bytes. Table at 0x000FD100. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: American Megatrends Inc. Version: 786R8 v1.04 Release Date: 03/22/2011 Address: 0xE0000 Runtime Size: 128 kB ROM Size: 1024 kB Characteristics: PCI is supported PNP is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported EDD is supported 5.25"/360 kB floppy services are supported (int 13h) 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 kB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Function key-initiated network boot is supported Targeted content distribution is supported BIOS Revision: 8.15 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: Hewlett-Packard Product Name: hp t5740 Version: Serial Number: CNVA190LKX UUID: 007F6E00-0BBF-E111-83A5-D5B139101A00 Wake-up Type: Power Switch SKU Number: Climbers Family: 103C_53302C Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: Hewlett-Packard Product Name: 3641h Version: Serial Number: CNVA190LKX Asset Tag: Climbers Features: Board is a hosting board Board is replaceable Location In Chassis: Climbers Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Handle 0x0003, DMI type 3, 21 bytes Chassis Information Manufacturer: Hewlett-Packard Type: Desktop Lock: Not Present Version: Serial Number: CNVA190LKX Asset Tag: <BAD INDEX> Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000000 Height: Unspecified Number Of Power Cords: 1 Contained Elements: 0 Handle 0x0004, DMI type 4, 42 bytes Processor Information Socket Designation: CPU 1 Type: Central Processor Family: Other Manufacturer: Intel ID: C2 06 01 00 FF FB E9 BF Version: Intel(R) Atom(TM) CPU N280 @ 1.66GHz Voltage: 1.2 V External Clock: 167 MHz Max Speed: 1666 MHz Current Speed: 1666 MHz Status: Populated, Enabled Upgrade: None L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: Not Provided Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Part Number: To Be Filled By O.E.M. Core Count: 1 Core Enabled: 1 Thread Count: 2 Characteristics: None Handle 0x0005, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Write Back Location: Internal Installed Size: 24 kB Maximum Size: 24 kB Supported SRAM Types: Burst Installed SRAM Type: Burst Speed: Unknown Error Correction Type: Unknown System Type: Data Associativity: Other Handle 0x0006, DMI type 7, 19 bytes Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Write Back Location: Internal Installed Size: 512 kB Maximum Size: 512 kB Supported SRAM Types: Burst Installed SRAM Type: Burst Speed: Unknown Error Correction Type: Unknown System Type: Unified Associativity: 8-way Set-associative Handle 0x0007, DMI type 5, 20 bytes Memory Controller Information Error Detecting Method: None Error Correcting Capabilities: None Supported Interleave: One-way Interleave Current Interleave: One-way Interleave Maximum Memory Module Size: 4096 MB Maximum Total Memory Size: 8192 MB Supported Speeds: Other Supported Memory Types: SIMM SDRAM Memory Module Voltage: 3.3 V Associated Memory Slots: 2 0x0008 0x0009 Enabled Error Correcting Capabilities: None Handle 0x0008, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM0 Bank Connections: 0 1 Current Speed: Unknown Type: DIMM SDRAM Installed Size: 1024 MB (Single-bank Connection) Enabled Size: 1024 MB (Single-bank Connection) Error Status: OK Handle 0x0009, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM1 Bank Connections: 4 5 Current Speed: Unknown Type: DIMM SDRAM Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x000A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: COM1 Internal Connector Type: 9 Pin Dual Inline (pin 10 cut) External Reference Designator: COM A External Connector Type: DB-9 male Port Type: Serial Port 16450 Compatible Handle 0x000B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: COM2 Internal Connector Type: 9 Pin Dual Inline (pin 10 cut) External Reference Designator: COM B External Connector Type: DB-9 male Port Type: Serial Port 16450 Compatible Handle 0x000C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: LPT1 Internal Connector Type: DB-25 female External Reference Designator: PARALLEL External Connector Type: DB-25 female Port Type: Parallel Port ECP/EPP Handle 0x000D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB0 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB1 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB2 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0010, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB3 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0011, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB4 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0012, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB5 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0013, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB6 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0014, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: USB7 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0015, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: LAN External Connector Type: RJ-45 Port Type: Network Port Handle 0x0016, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: VGA External Connector Type: DB-15 female Port Type: Video Port Handle 0x0017, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: Line out External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0018, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: Microphone External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0019, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: Keyboard External Connector Type: PS/2 Port Type: Keyboard Port Handle 0x001A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: Null Internal Connector Type: None External Reference Designator: Mouse External Connector Type: PS/2 Port Type: Mouse Port Handle 0x001B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: PRIMARY IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: SECONDARY IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001D, DMI type 9, 17 bytes System Slot Information Designation: PCI-X Type: 32-bit PCI-X Current Usage: Available Length: Long ID: 0 Characteristics: 5.0 V is provided PME signal is supported Handle 0x001E, DMI type 11, 5 bytes OEM Strings String 1: $OSTYPE11001 String 2: $582271-00100WES Handle 0x001F, DMI type 13, 22 bytes BIOS Language Information Language Description Format: Long Installable Languages: 3 en|US|iso8859-1 es|ES|iso8859-1 de|DE|iso8859-1 Currently Installed Language: en|US|iso8859-1 Handle 0x0020, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 8 GB Error Information Handle: Not Provided Number Of Devices: 2 Handle 0x0021, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Array Handle: 0x0020 Partition Width: 4 Handle 0x0022, DMI type 17, 28 bytes Memory Device Array Handle: 0x0020 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 1024 MB Form Factor: SODIMM Set: None Locator: DIMM0 Bank Locator: BANK0 Type: DDR2 Type Detail: Synchronous Speed: Unknown Manufacturer: Samsung Serial Number: 27E07E66 Asset Tag: AssetTagNum0 Part Number: M471B2873EH1-CH9 Rank: 14 Handle 0x0023, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Device Handle: 0x0022 Memory Array Mapped Address Handle: 0x0021 Partition Row Position: 1 Handle 0x0024, DMI type 17, 28 bytes Memory Device Array Handle: 0x0020 Error Information Handle: Not Provided Total Width: Unknown Data Width: 64 bits Size: No Module Installed Form Factor: SODIMM Set: None Locator: DIMM1 Bank Locator: BANK1 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer01 Serial Number: SerNum01 Asset Tag: AssetTagNum1 Part Number: ModulePartNumber01 Rank: Unknown Handle 0x0025, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0024 Memory Array Mapped Address Handle: 0x0021 Partition Row Position: 1 Handle 0x0026, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: Flash Memory Error Correction Type: None Maximum Capacity: 1 MB Error Information Handle: Not Provided Number Of Devices: 1 Handle 0x0027, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x000FFF00000 Ending Address: 0x000FFFFFFFF Range Size: 1 MB Physical Array Handle: 0x0026 Partition Width: 1 Handle 0x0028, DMI type 17, 28 bytes Memory Device Array Handle: 0x0026 Error Information Handle: Not Provided Total Width: 8 bits Data Width: 8 bits Size: 1024 kB Form Factor: Chip Set: None Locator: U24 Bank Locator: Type: Flash Type Detail: Non-Volatile Speed: 33 MHz Manufacturer: MXIC Serial Number: Asset Tag: Part Number: 25L8005 Rank: Unknown Handle 0x0029, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x000FFF00000 Ending Address: 0x000FFFFFFFF Range Size: 1 MB Physical Device Handle: 0x0028 Memory Array Mapped Address Handle: 0x0027 Partition Row Position: 1 Handle 0x002A, DMI type 127, 4 bytes End Of Table

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[Bug 64983] New: X3 Terran Conflict displays strange colors.
by bugzilla-daemon＠freedesktop.org 30 May '13

30 May '13

https://bugs.freedesktop.org/show_bug.cgi?id=64983 Priority: medium Bug ID: 64983 Assignee: dri-devel(a)lists.freedesktop.org Summary: X3 Terran Conflict displays strange colors. Severity: normal Classification: Unclassified OS: Linux (All) Reporter: knut.tidemann(a)gmail.com Hardware: Other Status: NEW Version: git Component: Drivers/Gallium/r600 Product: Mesa Created attachment 79788 --> https://bugs.freedesktop.org/attachment.cgi?id=79788&action=edit X3 corruption 1 I'm running mesa 9.2 from git (fd9fe4470be0437c18cbd6d2bc8e568378f88200) and when starting X3: Terran Conflict, I see strange colors on the menu screen. This can also be seen in the game. It also seems that the colors change for each time the game is started. I've attached 4 pictures, the first three shows the incorrect colors in three different variations, and the last one shows the correct rendering (taken from another computer on Windows). It might be a game bug, but I have not seen it mentioned in the support forums. There's nothing in dmesg from the driver and nothing in the game log about errors. I'm running this game on Arch Linux 64-bit with a Radeon 4850. -- You are receiving this mail because: You are the assignee for the bug.

1 5

radeon important ppc fix
by Jerome Glisse 30 May '13

30 May '13

Hi Dave, Can you please apply attached patch, it needs the following commit that is available in Linus git : d82fb31abc46620b7c22758c75707069f2763646 Cheers, Jerome

2 1

[PATCH] drm/radeon: restrict engine clock to fastest power state
by Alan Swanson 30 May '13

30 May '13

Radeon power management restricts the maximum engine clock to the initial default clock. However, on APUs the default clock usually is not the fastest allowed by their defined power states. Change restriction to the fastest engine clock found in power states. Signed-off-by: Alan Swanson <swanson(a)ukfsn.org> --- drivers/gpu/drm/radeon/radeon.h | 1 + drivers/gpu/drm/radeon/radeon_pm.c | 25 ++++++++++++++++++++++--- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 1442ce7..83d1e76 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -1111,6 +1111,7 @@ struct radeon_pm { u32 default_mclk; u16 default_vddc; u16 default_vddci; + u32 max_sclk; struct radeon_i2c_chan *i2c_bus; /* selected pm method */ enum radeon_pm_method pm_method; diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 788c64c..3512af9 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c @@ -164,8 +164,8 @@ static void radeon_set_power_state(struct radeon_device *rdev) if (radeon_gui_idle(rdev)) { sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. clock_info[rdev->pm.requested_clock_mode_index].sclk; - if (sclk > rdev->pm.default_sclk) - sclk = rdev->pm.default_sclk; + if (sclk > rdev->pm.max_sclk) + sclk = rdev->pm.max_sclk; /* starting with BTC, there is one state that is used for both * MH and SH. Difference is that we always use the high clock index for @@ -307,7 +307,7 @@ static void radeon_pm_print_states(struct radeon_device *rdev) DRM_DEBUG_DRIVER("State %d: %s\n", i, radeon_pm_state_type_name[power_state->type]); if (i == rdev->pm.default_power_state_index) - DRM_DEBUG_DRIVER("\tDefault"); + DRM_DEBUG_DRIVER("\tDEFAULT\n"); if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes); if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) @@ -329,6 +329,22 @@ static void radeon_pm_print_states(struct radeon_device *rdev) } } +static void radeon_pm_get_max_clocks(struct radeon_device *rdev) +{ + int i, j; + struct radeon_power_state *power_state; + struct radeon_pm_clock_info *clock_info; + + for (i = 0; i < rdev->pm.num_power_states; i++) { + power_state = &rdev->pm.power_state[i]; + for (j = 0; j < power_state->num_clock_modes; j++) { + clock_info = &(power_state->clock_info[j]); + if (clock_info->sclk > rdev->pm.max_sclk) + rdev->pm.max_sclk = clock_info->sclk; + } + } +} + static ssize_t radeon_get_pm_profile(struct device *dev, struct device_attribute *attr, char *buf) @@ -588,6 +604,7 @@ int radeon_pm_init(struct radeon_device *rdev) rdev->pm.default_mclk = rdev->clock.default_mclk; rdev->pm.current_sclk = rdev->clock.default_sclk; rdev->pm.current_mclk = rdev->clock.default_mclk; + rdev->pm.max_sclk = rdev->clock.default_sclk; rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; if (rdev->bios) { @@ -597,6 +614,7 @@ int radeon_pm_init(struct radeon_device *rdev) radeon_combios_get_power_modes(rdev); radeon_pm_print_states(rdev); radeon_pm_init_profile(rdev); + radeon_pm_get_max_clocks(rdev); /* set up the default clocks if the MC ucode is loaded */ if ((rdev->family >= CHIP_BARTS) && (rdev->family <= CHIP_CAYMAN) && @@ -848,6 +866,7 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); else seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); + seq_printf(m, "maximum engine clock: %u0 kHz\n", rdev->pm.max_sclk); seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); if (rdev->asic->pm.get_memory_clock) seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); -- 1.8.1.5

1 0

[pull] radeon drm-fixes-3.10
by alexdeucher＠gmail.com 29 May '13

29 May '13

From: Alex Deucher <alexander.deucher(a)amd.com> Hi Dave, Just a few minor fixes for radeon. The following changes since commit c89b65e7fffef745bdd36c372aa0dea778fecbab: qxl: fix Kconfig deps - select FB_DEFERRED_IO (2013-05-28 17:03:37 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-3.10 Alex Deucher (4): drm/radeon: fix typo in cu_per_sh on verde drm/radeon: fix card_posted check for newer asics drm/radeon: don't check crtcs in card_posted() on cards without DCE drm/radeon: narrow scope of Apple re-POST hack Christian König (1): drm/radeon: UVD block on SUMO2 is the same as on SUMO Kleber Sacilotto de Souza (1): radeon: use max_bus_speed to activate gen2 speeds drivers/gpu/drm/radeon/evergreen.c | 10 +++------- drivers/gpu/drm/radeon/r600.c | 9 ++------- drivers/gpu/drm/radeon/radeon_device.c | 27 ++++++++++++++++----------- drivers/gpu/drm/radeon/rv770.c | 13 +++---------- drivers/gpu/drm/radeon/si.c | 2 +- 5 files changed, 25 insertions(+), 36 deletions(-)

1 0

[PATCH] drm/radeon: revert Apple re-POST hack
by alexdeucher＠gmail.com 29 May '13

29 May '13

From: Alex Deucher <alexander.deucher(a)amd.com> This reverts: drm/radeon: re-POST the asic on Apple hardware when booted via EFI That patch prevents UVD from working on macs when booted in EFI mode. The original patch may not be required any more due to other fixes for UEFI on non-Mac platforms, but I don't have any Macs. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=63935 Cc: Matthew Garrett <mjg59(a)srcf.ucam.org> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/radeon/radeon_device.c | 4 ---- 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index af82c9b..261fe11 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -467,10 +467,6 @@ bool radeon_card_posted(struct radeon_device *rdev) { uint32_t reg; - if (efi_enabled(EFI_BOOT) && - rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) - return false; - if (ASIC_IS_NODCE(rdev)) goto check_memsize; -- 1.7.7.5

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Nomes dos aprovados Novo Lino
by Edson 29 May '13

29 May '13

Nomes dos aprovados Novo Lino: Bataguassu: ALANA KELLY AFIO CAETANO, KARLA ALEXSANDRA LEITAO LIMA, FABIANA MAIA DE ALCANTARA, MÔNICA MÁRCIA DE LIMA, JOÃO CARLOS MOREIRA DE CARVALHO, CATARINA LABORE VIDAL FERNANDES, MARCELA TEOFILO BARROSO, IKARO GABRIEL CAVALCANTE MONTEIRO PINHEIRO. ROMÁRIO JOSÉ REZENDE DE BRITO, EDNAIRAN DOS SANTOS MARTINS, MARINALDO MANOEL DA SILVA JUNIOR, JOSÉ ELYELSON MARQUES TORRES, VALCLEIDE DOS SANTOS MENDES. Poção de Pedras. Novo Lino, ALINE MOURA FERREIRA, LARESSA RAMOS FERREIRA, FERNANDA LEONTSINIS CARVALHO BRANCO, NATIELLY ALEXANDRE CARNEIRO, JOÃO CARLOS MOREIRA DE CARVALHO, CLAUDIO LUIS GOMES PEREIRA, MARIA CECILIA ALBUQUERQUE CORDEIRO, ISABELLE PEREIRA DA SILVA. RUI ANDRADE DA SILVA, ELIANA DANTAS RIBEIRO, MATHEUS FERNANDES CAMPOS, JOSE VALDIR TEIXEIRA BRAGA FILHO, VINICIUS CANDIDO DOS REIS. Carmo do Rio Claro. Ribeira do Amparo e ALAN ROBSON OLIVEIRA CAVALCANTE, KALIL DE SOUSA CASTRO, ERIKA RAIANY NEGREIROS ROCHA, MILLENA CRISTINA LIMA ABREU DE SOUZA, JOÃO CARLOS MOREIRA DE CARVALHO, CAROLINA SAYONARA BATISTA VIANA, MANUEL MESSIAS MELO, IGOR MOURA BARBOSA. RODRIGO PONTE VIANA, EDJÂNIO MARQUES MOURA, MARILIA MAIA MENDONCA, JOSE AUGUSTO DA SILVA NETO, THIAGO JOSE DE MELO. Ouro Verde de Goiás.

1 0

[Bug 64933] New: Hyperz related gpu lockup on git mesa in Brütal Legend
by bugzilla-daemon＠freedesktop.org 29 May '13

29 May '13

https://bugs.freedesktop.org/show_bug.cgi?id=64933 Priority: medium Bug ID: 64933 Assignee: dri-devel(a)lists.freedesktop.org Summary: Hyperz related gpu lockup on git mesa in Brütal Legend Severity: normal Classification: Unclassified OS: Linux (All) Reporter: thomas.lindroth(a)gmail.com Hardware: x86-64 (AMD64) Status: NEW Version: git Component: Drivers/Gallium/r600 Product: Mesa Created attachment 79724 --> https://bugs.freedesktop.org/attachment.cgi?id=79724&action=edit dmesg, xorg.log It locks up in the opening scene unless R600_HYPERZ=0 is set. Here it a trace for it. https://dl.dropboxusercontent.com/s/w1dr3abdesxcp66/Buddha2.bin.x86.trace.xz [337M] I tried to trim it but I only got an unplayable result. glretrace would segfult in r600g.so so it could also be a problem with the driver. Replaying with mesa-9.1.2 didn't segfault, instead I got this error message: glretrace: ../../src/mesa/main/fbobject.c:2014: reuse_framebuffer_texture_attachment: Assertion `src_att->Renderbuffer != ((void *)0)' failed I uploaded the full trace just to make sure there is nothing wrong with the trace. I'm using 32bit: brütal legend (steam), mesa-git, libdri-git and 64bit: xf86-video-ati-7.1.0 xorg-server-1.13.4 kernel-3.9.3 ./configure --prefix=/usr --build=i686-pc-linux-gnu --host=i686-pc-linux-gnu --mandir=/usr/share/man --infodir=/usr/share/info --datadir=/usr/share --sysconfdir=/etc --localstatedir=/var/lib --disable-silent-rules --disable-dependency-tracking --enable-dri --enable-glx --enable-texture-float --disable-debug --enable-egl --disable-gbm --disable-gles1 --disable-gles2 --enable-glx-tls --disable-osmesa --enable-asm --enable-shared-glapi --disable-xa --disable-xorg --with-dri-drivers= --with-gallium-drivers=,swrast,r600 PYTHON2=/usr/bin/python2.7 --with-egl-platforms=x11 --enable-gallium-egl --enable-gallium-llvm --disable-openvg --disable-r600-llvm-compiler --disable-vdpau --disable-xvmc -- You are receiving this mail because: You are the assignee for the bug.

1 1

[Bug 65095] New: BARTS [drm:r600_uvd_init] *ERROR* UVD not responding, trying to reset the VCPU!!!
by bugzilla-daemon＠freedesktop.org 28 May '13

28 May '13

https://bugs.freedesktop.org/show_bug.cgi?id=65095 Priority: medium Bug ID: 65095 Assignee: dri-devel(a)lists.freedesktop.org Summary: BARTS [drm:r600_uvd_init] *ERROR* UVD not responding, trying to reset the VCPU!!! Severity: major Classification: Unclassified OS: Linux (All) Reporter: spamjunkeater(a)gmail.com Hardware: x86-64 (AMD64) Status: NEW Version: XOrg CVS Component: DRM/Radeon Product: DRI UVD is not working on BARTS (HD6850) with Linux 3.10-rc2 I got [drm:r600_uvd_init] *ERROR* UVD not responding, trying to reset the VCPU!!! errors on log. I believe it's same issue with bug ID 63935 ( https://bugs.freedesktop.org/show_bug.cgi?id=63935 ) Thanks. -- You are receiving this mail because: You are the assignee for the bug.

1 1

[PULL] drm-intel-next for 3.11
by Daniel Vetter 28 May '13

28 May '13

Hi Dave, So I've figured it's time to upon up drm-next with a nice pile of intel patches. And there seems to be some other stuff pending on dri-devel already, too ;-) Highlights (copy-pasted from my testing cycle mails): - fbc support for Haswell (Rodrigo) - streamlined workaround comments, including an igt tool to grep for them (Damien) - sdvo and TV out cleanups, including a fixup for sdvo multifunction devices - refactor our eDP mess a bit (Imre) - don't register the hdmi connector on haswell when desktop eDP is present - vlv support is no longer preliminary! - more vlv fixes from Jesse for stolen and dpll handling - more flexible power well checking infrastructure from Paulo - a few gtt patches from Ben - a bit of OCD cleanups for transcoder #defines and an assorted pile of smaller things. - fixes for the gmch modeset sequence - a bit of OCD around plane/pipe usage (Ville) - vlv turbo support (Jesse) - tons of vlv modeset fixes (Jesse et al.) - vlv pte write fixes (Kenneth Graunke) - hpd filtering to avoid costly probes on unaffected outputs (Egbert Eich) - intel dev_info cleanups and refactorings (Damien) - vlv rc6 support (Jesse) - random pile of fixes around non-24bpp modes handling - asle/opregion cleanups and locking fixes (Jani) - dp dpll refactoring - improvements for reduced_clock computation on g4x/ilk+ - pfit state refactored to use pipe_config (Jesse) - lots more computed modeset state moved to pipe_config, including readout and cross-check support - fdi auto-dithering for ivb B/C links, using the neat pipe_config improvements - drm_rect helpers plus sprite clipping fixes (Ville) - hw context refcounting (Mika + Ben) Note that the merge with Linus' tree was a bit messy so I've also pushed out a 2nd tag drm-intel-next-2013-05-20-merged which has the backmerge which is already in my queue. Pull request for the merged tree below. Just drop the -merged suffix if you want to have some fun ;-) Cheers, Daniel The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75: Linux 3.10-rc2 (2013-05-20 14:37:38 -0700) are available in the git repository at: git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-next-2013-05-20-merged for you to fetch changes up to e1b73cba13a0cc68dd4f746eced15bd6bb24cda4: Merge tag 'v3.10-rc2' into drm-intel-next-queued (2013-05-21 09:52:16 +0200) ---------------------------------------------------------------- Ben Widawsky (3): drm/i915: Assert mutex_is_locked on context lookup drm/i915: BUG_ON bad PPGTT offset drm/i915: Extract PDE writes Chris Wilson (2): drm/i915: Only print the info message about incresing stolen size for FBC once drm/i915: put context upon switching Damien Lespiau (12): drm/i915: Remove mention of Haswell in DDI code drm/i915: Turn DEV_INFO_FLAGS into a foreach style macro drm/i915: Replace the line of %s by a DEV_INFO_FOR_EACH_FLAG() invocation drm/i915: Use DEV_INFO_FOR_EACH_FLAG() to declare flags as well drm/i915: Turn HAS_DDI() into a device_info flag drm/i915: Introduce HAS_FPGA_DBG_UNCLAIMED() drm/i915: Turn HAS_FPGA_DBG_UNCLAIMED into a device_info flag drm/i915: Ivybridge is the odd one when it comes to pipe scalers drm/i915: Add platform information to implemented workarounds drm/i915: Add references to some workaround we implement drm/i915: Compute WR PLL dividers dynamically drm/i915: Add missing platform tags to FBC workaround comments Daniel Vetter (56): drm/i915: don't enable the plane too early in i9xx_crtc_mode_set drm/i915: drop redundant vblank waits drm/i915: add pipe asserts for the crtc enable sequence drm/i915: add i9xx pfit pipe asserts drm/i915: move debug output back to the right place drm/i915: fix VLV limits drm/i915: magic VLV PLL registers in the dpio sideband drm/i915: disable interrupts earlier in the driver unload code drm/i915: Disable high-bpc on pre-1.4 EDID screens drm/i915: Fixup non-24bpp support for VGA screens on Haswell drm/i915: consolidate pch pll computations a bit drm/i915: shovel compute clock into crtc->config.dpll on ilk drm/i915: move dp clock computations to encoder->compute_config drm/i915: use pipe_config for lvds dithering drm/i915: don't force matching p1 for g4x/ilk+ reduced pll settings drm/i915: remove redundant has_pch_encoder check drm/i915: simplify config->pixel_multiplier handling drm/i915: put the right cpu_transcoder into pipe_config for hw state readout drm/i915: force bpp for eDP panels drm/i915: drop adjusted_mode from *_set_pipeconf functions drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv drm/i915: allow high-bpc modes on DP drm/i915: move intel_crtc->fdi_lanes to pipe_config drm/i915: hw state readout support for pipe_config->fdi_lanes drm/i915: split up fdi_set_m_n into computation and hw setup drm/i915: compute fdi lane config earlier drm/i915: Split up ironlake_check_fdi_lanes drm/i915: move fdi lane configuration checks ahead drm/i915: don't count cpu ports for fdi B/C lane sharing drm/i915: fixup 12bpc hdmi dotclock handling drm/i915: implement fdi auto-dithering drm/i915: stop for_each_intel_crtc_masked macro from leaking drm/i915: introduce macros to check pipe config properties drm/i915: hw state readout support for fdi m/n drm/i915: hw state readout support for pipe timings drm/i915: move lvds_border_bits to pipe_config drm/i915: rip out indirection for pfit pipe_config assignment drm/i915: move border color writes to pfit_enable drm/i915: simplify DP/DDI port width macros drm/i915: don't setup hdmi for port D edp in ddi_init drm/i915: fix up adjusted_mode tracking for interlaced modes drm/i915: s/TRANSCONF/PCH_TRANSCONF/ drm/i915: PCH_ prefix for transcoder timings drm/i915: make set_m_n functions static drm/i915: Apply OCD to data/link m/n register #defines drm/i915: make intel_cpt_verify_modeset static drm/i915: move sdvo TV clock computation to intel_sdvo.c drm/i915: drop TVclock special casing on ilk+ drm/i915: rip out TV-out lore ... drm/i915: rip out now unused is_foo tracking from crtc code drm/i915: make SDVO TV-out work for multifunction devices drm/i915: rip out an unused lvds_reg variable drm/i915: panel fitter hw state readout&check support drm/i915: Use pipe_config state to disable ilk+ pfit drm/i915: Use pipe config state to control gmch pfit enable/disable Merge tag 'v3.10-rc2' into drm-intel-next-queued Egbert Eich (2): drm/i915: Add bit field to record which pins have received HPD events (v3) drm/i915: Only reprobe display on encoder which has received an HPD event (v2) Imre Deak (8): drm/i915: HSW: allow PCH clock gating for suspend drm/i915: use enc_to_intel_dp() instead of opencoding the same drm/i915: hsw: replace !is_pch_edp() with port==PORT_A drm/i915: ilk-ivb: replace !is_pch_edp() with port==PORT_A drm/i915: stop using is_pch_edp() in intel_dp_init_connector() drm/i915: stop using is_pch_edp() in is_cpu_edp() drm/i915: remove is_pch_edp() helpers and state variable drm/i915: print DP init debug messages from a single place Jan-Simon Möller (1): drm/i915: Fix declaration of intel_gmbus_{is_forced_bit/is_port_falid} Jani Nikula (12): drm/i915: keep max backlight internal to intel_panel.c drm/i915: protect backlight registers and data with a spinlock drm/i915: don't pretend we support ASLE ALS, PFIT, or PFMB drm/i915/opregion: don't pretend we did something when we didn't drm/i915: drop code duplication in favor of asle interrupt handler drm/i915: hsw backlight registers need transcoder instead of pipe drm/i915: cleanup opregion technology enabled indicator defines drm/i915: manage opregion asle driver readiness properly drm/i915: untie opregion init and asle irq/pipestat enable drm/i915: cleanup redundant checks from intel_enable_asle drm/i915: cleanup opregion asle pipestat enable drm/i915: fix hotplug event bit tracking Jesse Barnes (21): drm/i915: VLV GPU frequency to opcode functions drm/i915: turbo & RC6 support for VLV v7 drm/i915: drop init_dpio, shouldn't be needed drm/i915: update VLV PLL and DPIO code v11 drm/i915: use vlv_dport_to_channel in vlv_signal_levels drm/i915: fix locking around punit access in cur_delayinfo for VLV drm/i915: make sure GPU freq drops to minimum after entering RC6 v4 drm/i915: cancel RPS work before disabling RPS drm/i915: create spearate VLV disable_rps function drm/i915: factor out GMCH panel fitting code and use for eDP v3 drm/i915: move PCH pfit controls into pipe_config drm/i915: warn about invalid pfit modes drm/i915: remove VLV MSI IRQ hack drm/i915: fix Haswell pfit power well check v2 drm/i915: read current freq from Punit on VLV drm/i915: go back to switch for VLV mem freq detection v2 drm/i915: fix panel fitting on LVDS on ILK+ v2 drm/i915: set proper DPIO post divider for VGA on VLV v4 drm/i915: BIOS and power context stolen mem handling for VLV v7 drm/i915: allow stolen, pre-allocated objects to avoid GTT allocation v2 drm/i915: VLV support is no longer preliminary Kenneth Graunke (3): drm/i915: Add PTE encoding function to the gtt/ppgtt vtables. drm/i915: Fix page table entries for Bay Trail. drm/i915: Split out Haswell code from gen6_pte_encode. Mika Kuoppala (3): drm/i915: reference count for i915_hw_contexts drm/i915: unreference default context on module unload drm/i915: add context into request struct Pallavi G (1): drm/i915/dp: program VSwing and Preemphasis control settings on VLV v2 Paulo Zanoni (10): drm/i915: report Gen5+ CPU and PCH FIFO underruns drm/i915: print Gen5+ CPU/PCH poison interrupts drm/i915: check the power well inside haswell_get_pipe_config drm/i915: use cpu_transcoder for TRANS_DDI_FUNC_CTL drm/i915: add intel_display_power_enabled drm/i915: add power well and cpu transcoder info to the error state drm/i915: clear FPGA_DBG_RM_NOCLAIM when capturing error state drm/i915: check the power well on i915_pipe_enabled drm/i915: only disable DDI sound if intel_crtc->eld_vld drm/i915: implement WADPOClockGatingDisable for LPT Rodrigo Vivi (7): drm/i915: Organize VBT stuff inside drm_i915_private drm/i915: Add support for FBC on Ivybridge. drm/i915: IVB FBC WaFbcAsynchFlipDisableFbcQueue drm/i915: IVB FBC WaFbcDisableDpfcClockGating drm/i915: Enable FBC at Haswell. drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueue drm/i915: HSW FBC WaFbcDisableDpfcClockGating Ville Syrjälä (14): drm/i915: Use pipe_name() and port_name() where appropriate drm/i915: Use port_name() in PCH port audio power change message drm/i915: Print plane, pipe, port names as alphabetical insted of decimal drm/i915: Use alphabetical names for transcoders too drm/i915: Use alphabetical names for sprites drm/i915: Move the CSC_MODE bits next to the register drm/i915: Make struct dpll == intel_clock_t drm: Add struct drm_rect and assorted utility functions drm: Add drm_rect_calc_{hscale, vscale}() utility functions drm: Add drm_rect_debug_print() drm: Add drm_rect_equals() drm/i915: Implement proper clipping for video sprites drm/i915: Relax the sprite scaling limits checks drm/i915: Re-enable FBC WM if the watermark is good on gen6+ braggle(a)free.fr (1): drm/i915: add support for dvo Chrontel 7010B Documentation/DocBook/drm.tmpl | 2 + drivers/gpu/drm/Makefile | 3 +- drivers/gpu/drm/drm_rect.c | 295 ++++++ drivers/gpu/drm/i915/dvo_ch7xxx.c | 28 +- drivers/gpu/drm/i915/i915_debugfs.c | 70 +- drivers/gpu/drm/i915/i915_dma.c | 27 +- drivers/gpu/drm/i915/i915_drv.c | 24 +- drivers/gpu/drm/i915/i915_drv.h | 214 +++-- drivers/gpu/drm/i915/i915_gem.c | 24 +- drivers/gpu/drm/i915/i915_gem_context.c | 74 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 110 ++- drivers/gpu/drm/i915/i915_gem_stolen.c | 18 +- drivers/gpu/drm/i915/i915_irq.c | 441 ++++++++- drivers/gpu/drm/i915/i915_reg.h | 366 +++++-- drivers/gpu/drm/i915/i915_suspend.c | 10 + drivers/gpu/drm/i915/i915_sysfs.c | 74 +- drivers/gpu/drm/i915/i915_ums.c | 88 +- drivers/gpu/drm/i915/intel_bios.c | 100 +- drivers/gpu/drm/i915/intel_crt.c | 8 +- drivers/gpu/drm/i915/intel_ddi.c | 710 +++++--------- drivers/gpu/drm/i915/intel_display.c | 1594 ++++++++++++++++++------------- drivers/gpu/drm/i915/intel_dp.c | 352 +++++-- drivers/gpu/drm/i915/intel_drv.h | 117 ++- drivers/gpu/drm/i915/intel_dvo.c | 7 + drivers/gpu/drm/i915/intel_hdmi.c | 139 ++- drivers/gpu/drm/i915/intel_lvds.c | 248 +---- drivers/gpu/drm/i915/intel_opregion.c | 102 +- drivers/gpu/drm/i915/intel_panel.c | 296 +++++- drivers/gpu/drm/i915/intel_pm.c | 591 ++++++++++-- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 + drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- drivers/gpu/drm/i915/intel_sdvo.c | 44 +- drivers/gpu/drm/i915/intel_sprite.c | 213 ++++- drivers/gpu/drm/i915/intel_tv.c | 8 +- include/drm/drm_rect.h | 160 ++++ 35 files changed, 4400 insertions(+), 2161 deletions(-) create mode 100644 drivers/gpu/drm/drm_rect.c create mode 100644 include/drm/drm_rect.h -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch

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dri-devel May 2013