dri-devel July 2013

dri-devel@lists.freedesktop.org

142 participants
850 discussions

[PATCH -next] drm/radeon/dpm: Add missing #include <linux/seq_file.h>
by Geert Uytterhoeven 05 Jul '13

05 Jul '13

ia64_defconfig: drivers/gpu/drm/radeon/rv6xx_dpm.c: In function 'rv6xx_dpm_debugfs_print_current_performance_level': drivers/gpu/drm/radeon/rv6xx_dpm.c:2041:3: error: implicit declaration of function 'seq_printf' [-Werror=implicit-function-declaration] Signed-off-by: Geert Uytterhoeven <geert(a)linux-m68k.org> --- http://kisskb.ellerman.id.au/kisskb/buildresult/9068726/ drivers/gpu/drm/radeon/rv6xx_dpm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c index 33705c5..0d09677 100644 --- a/drivers/gpu/drm/radeon/rv6xx_dpm.c +++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c @@ -22,6 +22,7 @@ * Authors: Alex Deucher */ +#include <linux/seq_file.h> #include "drmP.h" #include "radeon.h" #include "rv6xxd.h" -- 1.7.9.5

2 1

[PATCH 0/2] R-Car DU DRM fixes for v3.11
by Laurent Pinchart 05 Jul '13

05 Jul '13

Hello, Here are two small fixes to the R-Car DU DRM driver. They have previously been posted as part of the larger "R-Car DU DRM support for R8A7790" series, and Daniel Vetter rightfully noticed that they should be applied to v3.11. Laurent Pinchart (2): drm/rcar-du: Don't ignore rcar_du_crtc_create() return value drm/rcar-du: Fix buffer pitch alignment drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 26 +++++++++++++++++++++++--- drivers/gpu/drm/rcar-du/rcar_du_kms.h | 3 +++ 3 files changed, 27 insertions(+), 4 deletions(-) -- Regards, Laurent Pinchart

2 3

Best practice device tree design for display subsystems/DRM
by Daniel Drake 05 Jul '13

05 Jul '13

Hi, I'm looking into implementing devicetree support in armada_drm and would like to better understand the best practice here. Adding DT support for a DRM driver seems to be complicated by the fact that DRM is not "hotpluggable" - it is not possible for the drm_device to be initialised without an output, with the output connector/encoder appearing at some later moment. Instead, the connectors/encoders must be fully loaded before the drm_driver load function returns. This means that we cannot drive the individual display components through individual, separate modules - we need a way to control their load order. Looking at existing DRM drivers: tilcdc_drm takes an approach that each of the components in the display subsystem (panel, framebuffer, encoder, display controllers) are separate DT nodes and do not have any DT-level linkage. It implements just a single module, and that module carefully initialises things in this order: 1. Register platform drivers for output components 2. Register main drm_driver When the output component's platform drivers get loaded, probes for such drivers immediately run as they match things in the device tree. At this point, there is no drm_device available for the outputs to bind to, so instead, references to these platform devices just get saved in some global structures. Later, when the drm_driver gets registered and loaded, the global structures are consulted to find all of the output devices at the right moment. exynos seems to take a the same approach. Components are separate in the device tree, and each component is implemented as a platform driver or i2c driver. However all the drivers are built together in the same module, and the module_init sequence is careful to initialise all of the output component drivers before loading the DRM driver. The output component driver store their findings in global structures. Russell King suggested an alternative design for armada_drm. If all display components are represented within the same "display" super-node, we can examine the DT during drm_device initialisation and initialise the appropriate output components. In this case, the output components would not be registered as platform drivers. The end result would be something similar to exynos/tilcdc (i.e. drm_driver figuring out its output in the appropriate moment), however the hackyness of using global storage to store output devices before drm_driver is ready is avoided. And there is the obvious difference in devicetree layout, which would look something like: display { compatible = "marvell,armada-510-display"; clocks = <&ext_clk0>, <&lcd_pll_clk>; lcd0 { compatible = "marvell,armada-510-lcd"; reg = <0xf1820000 0x1000>; interrupts = <47>; }; lcd1 { compatible = "marvell,armada-510-lcd"; reg = <0xf1810000 0x1000>; interrupts = <46>; }; dcon { compatible = "marvell,armada-510-dcon"; reg = <...>; }; }; Any thoughts/comments? Thanks Daniel

12 66

[PATCH] via: New TTM/GEM ioctls to support.
by James Simmons 04 Jul '13

04 Jul '13

Add new TTM/GEM ioctls to be able to manage buffer regions from different domains. Included in the new ioctls is the ability to query hardware information. Signed-Off-by: James Simmons <jsimmons(a)infradead.org> --- include/uapi/drm/via_drm.h | 115 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 95 insertions(+), 20 deletions(-) diff --git a/include/uapi/drm/via_drm.h b/include/uapi/drm/via_drm.h index 8b0533c..7a32594 100644 --- a/include/uapi/drm/via_drm.h +++ b/include/uapi/drm/via_drm.h @@ -16,7 +16,7 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * THE AUTHOR(S) OR COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. @@ -24,7 +24,7 @@ #ifndef _VIA_DRM_H_ #define _VIA_DRM_H_ -#include <drm/drm.h> +#include "drm.h" /* WARNING: These defines must be the same as what the Xserver uses. * if you change them, you must change the defines in the Xserver. @@ -33,14 +33,10 @@ #ifndef _VIA_DEFINES_ #define _VIA_DEFINES_ -#ifndef __KERNEL__ -#include "via_drmclient.h" -#endif - #define VIA_NR_SAREA_CLIPRECTS 8 -#define VIA_NR_XVMC_PORTS 10 -#define VIA_NR_XVMC_LOCKS 5 -#define VIA_MAX_CACHELINE_SIZE 64 +#define VIA_NR_XVMC_PORTS 10 +#define VIA_NR_XVMC_LOCKS 5 +#define VIA_MAX_CACHELINE_SIZE 64 #define XVMCLOCKPTR(saPriv,lockNo) \ ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ (VIA_MAX_CACHELINE_SIZE - 1)) & \ @@ -64,21 +60,28 @@ /* VIA specific ioctls */ #define DRM_VIA_ALLOCMEM 0x00 -#define DRM_VIA_FREEMEM 0x01 +#define DRM_VIA_FREEMEM 0x01 #define DRM_VIA_AGP_INIT 0x02 -#define DRM_VIA_FB_INIT 0x03 +#define DRM_VIA_FB_INIT 0x03 #define DRM_VIA_MAP_INIT 0x04 -#define DRM_VIA_DEC_FUTEX 0x05 -#define NOT_USED +#define DRM_VIA_DEC_FUTEX 0x05 +#define DRM_VIA_OLD_GEM_CREATE 0x06 #define DRM_VIA_DMA_INIT 0x07 #define DRM_VIA_CMDBUFFER 0x08 -#define DRM_VIA_FLUSH 0x09 -#define DRM_VIA_PCICMD 0x0a +#define DRM_VIA_FLUSH 0x09 +#define DRM_VIA_PCICMD 0x0a #define DRM_VIA_CMDBUF_SIZE 0x0b #define NOT_USED -#define DRM_VIA_WAIT_IRQ 0x0d -#define DRM_VIA_DMA_BLIT 0x0e -#define DRM_VIA_BLIT_SYNC 0x0f +#define DRM_VIA_WAIT_IRQ 0x0d +#define DRM_VIA_DMA_BLIT 0x0e +#define DRM_VIA_BLIT_SYNC 0x0f + +/* KMS ioctls */ +#define DRM_VIA_GETPARAM 0x10 +#define DRM_VIA_SETPARAM 0x11 +#define DRM_VIA_GEM_CREATE 0x12 +#define DRM_VIA_GEM_WAIT 0x13 +#define DRM_VIA_GEM_STATE 0x14 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) @@ -86,6 +89,7 @@ #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) +#define DRM_IOCTL_VIA_OLD_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_OLD_GEM_CREATE, struct drm_via_gem_create) #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) @@ -96,6 +100,13 @@ #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) +/* KMS ioctls */ +#define DRM_IOCTL_VIA_GETPARAM DRM_IOR(DRM_COMMAND_BASE + DRM_VIA_GETPARAM, struct drm_via_param) +#define DRM_IOCTL_VIA_SETPARAM DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_SETPARAM, struct drm_via_param) +#define DRM_IOCTL_VIA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_CREATE, struct drm_via_gem_create) +#define DRM_IOCTL_VIA_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_GEM_WAIT, struct drm_via_gem_wait) +#define DRM_IOCTL_VIA_GEM_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_STATE, struct drm_via_gem_create) + /* Indices into buf.Setup where various bits of state are mirrored per * context and per buffer. These can be fired at the card as a unit, * or in a piecewise fashion as required. @@ -109,6 +120,7 @@ #define VIA_BACK 0x2 #define VIA_DEPTH 0x4 #define VIA_STENCIL 0x8 + #define VIA_MEM_VIDEO 0 /* matches drm constant */ #define VIA_MEM_AGP 1 /* matches drm constant */ #define VIA_MEM_SYSTEM 2 @@ -274,8 +286,71 @@ typedef struct drm_via_dmablit { drm_via_blitsync_t sync; } drm_via_dmablit_t; -struct via_file_private { - struct list_head obj_list; +/* Ioctl to query kernel params: + */ +#define VIA_PARAM_CHIPSET_ID 0 +#define VIA_PARAM_REVISION_ID 1 + +struct drm_via_param { + uint64_t param; + uint64_t value; +}; + +struct drm_via_gem_create { + /** + * Requested size for the object. + * + * The (page-aligned) allocated size for the object will be returned. + */ + uint64_t size; + + /* + * Place the memory at the proper byte alignment. + */ + uint32_t alignment; + + /** + * Format of data i.e tile pitch, for linear it is zero + */ + uint32_t pitch; + + /** + * Give hints where to allocate this object. + */ + uint32_t domains; + + /** + * chmod values applied to a buffer. + */ + uint32_t mode_t; + + /** + * Offset to start of memory region. + */ + uint64_t offset; + + /** + * Returned handle need to mmap the buffer. + */ + uint64_t map_handle; + + /** + * Returned handle for the object. + * + * Object handles are nonzero. + */ + uint32_t handle; + + /** + * Padding for future expansion. + */ + uint32_t pad1; +}; + +struct drm_via_gem_wait { + /* the buffer object handle */ + uint32_t handle; + uint32_t no_wait; }; #endif /* _VIA_DRM_H_ */ -- 1.7.10.4

1 0

[Bug 43114] New: Can't set high engine clock for RadeonHD 6620G
by bugzilla-daemon＠bugzilla.kernel.org 04 Jul '13

04 Jul '13

https://bugzilla.kernel.org/show_bug.cgi?id=43114 Summary: Can't set high engine clock for RadeonHD 6620G Product: Drivers Version: 2.5 Platform: All OS/Version: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) AssignedTo: drivers_video-dri(a)kernel-bugs.osdl.org ReportedBy: runetmember(a)gmail.com Regression: No APU model: A8-3500M with Radeon HD 6620G. Laptop model: Acer Aspire 7560G. According to official specs of this APU http://www.amd.com/us/products/notebook/apu/mainstream/Pages/mainstream.asp… https://en.wikipedia.org/wiki/Comparison_of_AMD_graphics_processing_units#c… GPU core clock on high profile should be 444 MHz, but even when I set high profile manually ~# cat /sys/class/drm/card0/device/power_method profile ~# cat /sys/class/drm/card0/device/power_profile high GPU core clock is not 444 MHz anyway, even below 200 MHz: ~$ cat /sys/kernel/debug/dri/0/radeon_pm_info default engine clock: 200000 kHz current engine clock: 7990 kHz default memory clock: 667000 kHz Maybe output of radeon_pm_info is incorrect, because change between different profiles and dynpm make no difference in radeon_pm_info information. Reproduceable with Linux 3.2 and Linux 3.4rc3. dmesg of 3.4rc3 boot process attached. Is there any additional information I need to provide? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are watching the assignee of the bug.

1 4

[ANNOUNCE] libdrm 2.4.46
by Dave Airlie 04 Jul '13

04 Jul '13

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Release because I want the cursor ioctls released, also haswell and radeon ids. Alex Deucher (3): radeon: add CIK chip families radeon: add Bonaire pci ids radeon: add kabini pci ids Damien Lespiau (3): intel/aub: Sync the AUB defines with mesa's intel/aub: Return early if we disable aub dumps intel/aub: Implement a way to specify the output .aub filename Dave Airlie (2): drm: add hotspot cursor interface support. libdrm: bump to 2.4.46 Mark Kettenis (1): radeon: correct RADEON_GEM_WAIT_IDLE use Rob Clark (3): freedreno: add handle and name tracking freedreno: add some asserts freedreno: also remove from name table on bo delete Rodrigo Vivi (2): intel: Fix Haswell GT3 names. intel: Adding more reserved PCI IDs for Haswell. Ville Syrjälä (1): modetest: Make RGB565 pwetty too git tag: libdrm-2.4.46 http://dri.freedesktop.org/libdrm/libdrm-2.4.46.tar.bz2 MD5: 9cba217fd3daa10b1d052ec60d3aa7d5 libdrm-2.4.46.tar.bz2 SHA1: b3a0fac0c8ef9110dce32feb8004f53f0081dea4 libdrm-2.4.46.tar.bz2 SHA256: 33cf320dad4e8060768714792e12643ddf6756a719d262ba7d60b39c2b2650f1 libdrm-2.4.46.tar.bz2 http://dri.freedesktop.org/libdrm/libdrm-2.4.46.tar.gz MD5: b454a43366eb386294f87a5cd16699e6 libdrm-2.4.46.tar.gz SHA1: dbd99aca49db5fa87e49fec5fa3d2eba5a781185 libdrm-2.4.46.tar.gz SHA256: 75dda05aa7717594d48f215d598525ffb7d4c60f60cc3fc2084672ca5d3ae039 libdrm-2.4.46.tar.gz -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQIcBAEBAgAGBQJR0o14AAoJEAx081l5xIa+QOAP/A9wAIljpxy6KGYC7LutVzTy oncZk3ivkKI0a+rAqXP5DrV+Fu9Gkmx/rSNrHw/VwdY83EenRbyijIQk4QQjj0AN ibPWyWTIlc+sdJoXBEieqWdSxZLqCgT3GIhaBmnkVBEPyse2qu5ob1MZQYX62tKJ MZ45OpW8glhEvBdKrcvN1wfe710MH1RYwwgIrkmD1RPuCFyhIOnkj/hMICCnBOil vkng1tW7TitW84YFsUDu4rV6iug9OSnIvNNN/j810QREGyNdhPqPV5rhv8zncjRk cg3nFmcjyTnzHX0Eq1gHQenam0ocHvfGuknQ2tiIaH4MiN7TIg+39NK8Zi4OvAMj DfxlYHna3xBpnhTKuyRkG/1/BrUFr1f8vnw2yqV5qUBJeZ5uZIEt7rAGZcMOkKuE LCA9boM1KgNaAG4i6NPaWJwavM25DFYDV/I6Xy8xeFPvChslc7VBmei9B53NNAx8 k3yyz0+LICjJo8XKZouueK6UaZFE7+9lHhLp8qxXMqLH/cErdUirUEDUvB3YdUEI bjq41nMsIYnBCIdkNpiUQVUP5rGeUEsninZO7nfVRV6sQXVI5rsb+iob6aA1rwJM am+/3vppn1oTjrvFxywY6ctBIu1Ko+DCHmo/1WpdNNnMIXRr24FMXYrkUcORrp7Z ZQm76FmMzsSxgCv2/iUT =esMI -----END PGP SIGNATURE-----

5 6

[GIT PULL v2] exynos-drm-next
by Inki Dae 04 Jul '13

04 Jul '13

Hi Dave, This is final pull request for 3.11. This resolves some memory leak issues, and includes some code and dt document file cleanups; just removed unnecessary descriptions. And the patch work for enhancing hdmiphy driver isn't in progress so this patch may go to 3.12. Please kindly let me know if there is any problem. Thanks, Inki Dae The following changes since commit 69163ea82732894e8c1e17df4010372ed078efdd: drm/mm: kill color_search_free/get_block (2013-07-04 10:57:40 +1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos exynos-drm-next Sachin Kamat (1): of/documentation: Update hpd gpio property for exynos_hdmi Seung-Woo Kim (1): drm/exynos: remove duplicated error routine and unnecessary assign YoungJun Cho (6): drm/exynos: fix not to remain exynos_gem_obj as a leak drm/exynos: remove dead code in vidi_power_on drm/exynos: initialize the buf_num in vp_video_buffer drm/exynos: add error check routine in exynos_drm_open drm/exynos: use drm_calloc_large when allocates pointer array drm/exynos: fix pages allocation size in lowlevel_buffer_allocate .../devicetree/bindings/video/exynos_hdmi.txt | 6 ++---- drivers/gpu/drm/exynos/exynos_drm_buf.c | 13 ++++++------- drivers/gpu/drm/exynos/exynos_drm_drv.c | 9 ++++++++- drivers/gpu/drm/exynos/exynos_drm_g2d.c | 18 +++++++----------- drivers/gpu/drm/exynos/exynos_drm_gem.c | 9 +++++---- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 3 --- drivers/gpu/drm/exynos/exynos_mixer.c | 2 +- 7 files changed, 29 insertions(+), 31 deletions(-)

1 0

Bug report for Radeon HD 7870
by Andrej Gelenberg 04 Jul '13

04 Jul '13

Hi, i have an Radeon HD 7870 GHz Edition graphic card and at finnaly got some 3D and VDPAU acceleration with kernel 3.10, mesa 9.2 from 19.6.2013 and glamor accelerations, but it carsh a lot. I attached dmesg witch hopefully helpful error messages and X.org.log. If you need more information, tell me how and i will try to get it for you. Regards, Andrej Gelenberg

2 1

[PATCH RESEND] drm/prime: fix sgt NULL checking
by Joonyoung Shim 04 Jul '13

04 Jul '13

The drm_gem_map_detach() can be called with sgt is NULL. Signed-off-by: Joonyoung Shim <jy0922.shim(a)samsung.com> --- drivers/gpu/drm/drm_prime.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c index 1e0de41..ff5fece 100644 --- a/drivers/gpu/drm/drm_prime.c +++ b/drivers/gpu/drm/drm_prime.c @@ -119,12 +119,13 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf, return; sgt = prime_attach->sgt; + if (sgt) { + if (prime_attach->dir != DMA_NONE) + dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, + prime_attach->dir); + sg_free_table(sgt); + } - if (prime_attach->dir != DMA_NONE) - dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, - prime_attach->dir); - - sg_free_table(sgt); kfree(sgt); kfree(prime_attach); attach->priv = NULL; -- 1.8.1.2

1 0

[PATCH] drm/prime: fix sgt NULL checking
by Joonyoung Shim 04 Jul '13

04 Jul '13

The drm_gem_map_detach() can be called with sgt is NULL. Change-Id: I3b2f5878dfac6e1e77aebeeb7be781113dec59a7 Signed-off-by: Joonyoung Shim <jy0922.shim(a)samsung.com> --- drivers/gpu/drm/drm_prime.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c index 1e0de41..ff5fece 100644 --- a/drivers/gpu/drm/drm_prime.c +++ b/drivers/gpu/drm/drm_prime.c @@ -119,12 +119,13 @@ static void drm_gem_map_detach(struct dma_buf *dma_buf, return; sgt = prime_attach->sgt; + if (sgt) { + if (prime_attach->dir != DMA_NONE) + dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, + prime_attach->dir); + sg_free_table(sgt); + } - if (prime_attach->dir != DMA_NONE) - dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, - prime_attach->dir); - - sg_free_table(sgt); kfree(sgt); kfree(prime_attach); attach->priv = NULL; -- 1.8.1.2

1 0

← Newer
1
...
78
79
80
81
82
83
84
85
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel July 2013