dri-devel September 2014

dri-devel@lists.freedesktop.org

173 participants
1045 discussions

[pull] radeon drm-next-3.18
by Alex Deucher 11 Sep '14

11 Sep '14

Hi Dave, This pull adds concurrent buffer read support to radeon to avoid serialization when read buffers are shared between engines. The following changes since commit c4d922b14544d115232b7448a2ea7640ba901eb6: Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next (2014-09-11 20:53:57 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-3.18 for you to fetch changes up to 298593b609ecbf9e8a99e8a41c8c46acb3528468: drm/radeon: allow concurrent buffer reads (2014-09-11 10:46:02 -0400) ---------------------------------------------------------------- Christian König (3): drm/ttm: allow fence to be added as shared drm/radeon: add the infrastructure for concurrent buffer access drm/radeon: allow concurrent buffer reads drivers/gpu/drm/qxl/qxl_release.c | 1 + drivers/gpu/drm/radeon/cik.c | 25 ++++++----- drivers/gpu/drm/radeon/cik_sdma.c | 25 ++++++----- drivers/gpu/drm/radeon/evergreen_dma.c | 24 +++++----- drivers/gpu/drm/radeon/r100.c | 21 +++++---- drivers/gpu/drm/radeon/r200.c | 21 +++++---- drivers/gpu/drm/radeon/r600.c | 23 +++++----- drivers/gpu/drm/radeon/r600_dma.c | 25 ++++++----- drivers/gpu/drm/radeon/radeon.h | 43 +++++++++--------- drivers/gpu/drm/radeon/radeon_asic.h | 74 ++++++++++++++++--------------- drivers/gpu/drm/radeon/radeon_benchmark.c | 30 ++++++------- drivers/gpu/drm/radeon/radeon_cs.c | 10 ++--- drivers/gpu/drm/radeon/radeon_ib.c | 2 +- drivers/gpu/drm/radeon/radeon_semaphore.c | 38 ++++++++++++++-- drivers/gpu/drm/radeon/radeon_test.c | 24 +++++++--- drivers/gpu/drm/radeon/radeon_ttm.c | 12 ++--- drivers/gpu/drm/radeon/radeon_vm.c | 19 +++----- drivers/gpu/drm/radeon/rv770_dma.c | 25 ++++++----- drivers/gpu/drm/radeon/si_dma.c | 25 ++++++----- drivers/gpu/drm/ttm/ttm_execbuf_util.c | 18 ++++++-- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 3 ++ drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 5 +++ include/drm/ttm/ttm_execbuf_util.h | 2 + 23 files changed, 284 insertions(+), 211 deletions(-)

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[drm-next-3.18 (-wip)] only works with b6c2b4 below evergreen (UVD)
by Dieter Nützel 11 Sep '14

11 Sep '14

Hello Alex and Christian, RV730 (AGP) need badly From b6c2b4faf90230ef9cf1a81f36cbccda4a606c59 Mon Sep 17 00:00:00 2001 From: Alex Deucher <alexander.deucher(a)amd.com> Date: Mon, 8 Sep 2014 13:16:39 -0400 Subject: [PATCH] drm/radeon: only use me/pfp sync on evergreen+ The packet seems to cause hangs on some 7xx asics. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83616 Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> to get UVD going, again. Thanks, Dieter. PS Examination of [ 11.279944] radeon 0000:01:00.0: (-1) pin WB bo failed [ 11.279956] radeon 0000:01:00.0: f6124800 unpin not necessary [ 11.279975] radeon 0000:01:00.0: disabling GPU acceleration [ 11.331227] radeon 0000:01:00.0: f610e000 unpin not necessary is under way - I'm learning GIT...;-)

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[PATCH] drm/exynos: update to use component match support
by Inki Dae 11 Sep '14

11 Sep '14

Update Exynos's DRM driver to use component match support rater than add_components. Signed-off-by: Inki Dae <inki.dae(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_drv.c | 40 ++++++++++++++----------------- 1 file changed, 18 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index feee991..dae62c2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c @@ -503,16 +503,15 @@ static int compare_of(struct device *dev, void *data) return dev == (struct device *)data; } -static int exynos_drm_add_components(struct device *dev, struct master *m) +static struct component_match *exynos_drm_match_add(struct device *dev) { + struct component_match *match = NULL; struct component_dev *cdev; unsigned int attach_cnt = 0; mutex_lock(&drm_component_lock); list_for_each_entry(cdev, &drm_component_list, list) { - int ret; - /* * Add components to master only in case that crtc and * encoder/connector device objects exist. @@ -527,16 +526,10 @@ static int exynos_drm_add_components(struct device *dev, struct master *m) /* * fimd and dpi modules have same device object so add * only crtc device object in this case. - * - * TODO. if dpi module follows driver-model driver then - * below codes can be removed. */ if (cdev->crtc_dev == cdev->conn_dev) { - ret = component_master_add_child(m, compare_of, - cdev->crtc_dev); - if (ret < 0) - return ret; - + component_match_add(dev, &match, compare_of, + cdev->crtc_dev); goto out_lock; } @@ -546,11 +539,8 @@ static int exynos_drm_add_components(struct device *dev, struct master *m) * connector/encoder need pipe number of crtc when they * are created. */ - ret = component_master_add_child(m, compare_of, cdev->crtc_dev); - ret |= component_master_add_child(m, compare_of, - cdev->conn_dev); - if (ret < 0) - return ret; + component_match_add(dev, &match, compare_of, cdev->crtc_dev); + component_match_add(dev, &match, compare_of, cdev->conn_dev); out_lock: mutex_lock(&drm_component_lock); @@ -558,7 +548,7 @@ out_lock: mutex_unlock(&drm_component_lock); - return attach_cnt ? 0 : -ENODEV; + return attach_cnt ? match : ERR_PTR(-EPROBE_DEFER); } static int exynos_drm_bind(struct device *dev) @@ -572,13 +562,13 @@ static void exynos_drm_unbind(struct device *dev) } static const struct component_master_ops exynos_drm_ops = { - .add_components = exynos_drm_add_components, .bind = exynos_drm_bind, .unbind = exynos_drm_unbind, }; static int exynos_drm_platform_probe(struct platform_device *pdev) { + struct component_match *match; int ret; pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); @@ -645,13 +635,19 @@ static int exynos_drm_platform_probe(struct platform_device *pdev) goto err_unregister_ipp_drv; #endif - ret = component_master_add(&pdev->dev, &exynos_drm_ops); - if (ret < 0) - DRM_DEBUG_KMS("re-tried by last sub driver probed later.\n"); + match = exynos_drm_match_add(&pdev->dev); + if (IS_ERR(match)) { + ret = PTR_ERR(match); + goto err_unregister_ipp_dev; + } - return 0; + return component_master_add_with_match(&pdev->dev, &exynos_drm_ops, + match); + +err_unregister_ipp_dev: #ifdef CONFIG_DRM_EXYNOS_IPP + exynos_platform_device_ipp_unregister(); err_unregister_ipp_drv: platform_driver_unregister(&ipp_driver); err_unregister_gsc_drv: -- 1.7.9.5

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[PATCH v3] drm/i915: Merge of visible and !visible paths for primary planes
by Gustavo Padovan 11 Sep '14

11 Sep '14

From: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Fold intel_pipe_set_base() in the update primary plane path merging pieces of code that are common to both paths. Basically the the pin/unpin procedures are the same for both paths and some checks can also be shared (some of the were moved to the check() stage) v2: take Ville's comments: - remove unnecessary plane check - move mutex lock to inside the conditional - make the pin fail message a debug one - add a fixme for the fastboot hack - call intel_frontbuffer_flip() after FBC update v3: take more Ville's comments: - fold update code under if (intel_crtc->active), and do the visible/!visible split inside. - check ret inside the same conditional we assign it Suggested-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Signed-off-by: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> --- drivers/gpu/drm/i915/intel_display.c | 139 +++++++++++++++++++++-------------- 1 file changed, 82 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b78f00a..8f3144e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11824,12 +11824,23 @@ intel_check_primary_plane(struct drm_plane *plane, struct drm_rect *dest = &state->dst; struct drm_rect *src = &state->src; const struct drm_rect *clip = &state->clip; + int ret; - return drm_plane_helper_check_update(plane, crtc, fb, + ret = drm_plane_helper_check_update(plane, crtc, fb, src, dest, clip, DRM_PLANE_HELPER_NO_SCALING, DRM_PLANE_HELPER_NO_SCALING, false, true, &state->visible); + if (ret) + return ret; + + /* no fb bound */ + if (state->visible && !fb) { + DRM_ERROR("No FB bound\n"); + return -EINVAL; + } + + return 0; } static int @@ -11841,6 +11852,8 @@ intel_commit_primary_plane(struct drm_plane *plane, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + enum pipe pipe = intel_crtc->pipe; + struct drm_framebuffer *old_fb = plane->fb; struct drm_i915_gem_object *obj = intel_fb_obj(fb); struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->fb); struct intel_plane *intel_plane = to_intel_plane(plane); @@ -11849,67 +11862,28 @@ intel_commit_primary_plane(struct drm_plane *plane, intel_crtc_wait_for_pending_flips(crtc); - /* - * If clipping results in a non-visible primary plane, we'll disable - * the primary plane. Note that this is a bit different than what - * happens if userspace explicitly disables the plane by passing fb=0 - * because plane->fb still gets set and pinned. - */ - if (!state->visible) { - mutex_lock(&dev->struct_mutex); - - /* - * Try to pin the new fb first so that we can bail out if we - * fail. - */ - if (plane->fb != fb) { - ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); - if (ret) { - mutex_unlock(&dev->struct_mutex); - return ret; - } - } - - i915_gem_track_fb(old_obj, obj, - INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe)); - - if (intel_crtc->primary_enabled) - intel_disable_primary_hw_plane(plane, crtc); - - - if (plane->fb != fb) - if (plane->fb) - intel_unpin_fb_obj(old_obj); + if (intel_crtc_has_pending_flip(crtc)) { + DRM_ERROR("pipe is still busy with an old pageflip\n"); + return -EBUSY; + } + if (plane->fb != fb) { + mutex_lock(&dev->struct_mutex); + ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); + if (ret == 0) + i915_gem_track_fb(old_obj, obj, + INTEL_FRONTBUFFER_PRIMARY(pipe)); mutex_unlock(&dev->struct_mutex); - - } else { - if (intel_crtc && intel_crtc->active && - intel_crtc->primary_enabled) { - /* - * FBC does not work on some platforms for rotated - * planes, so disable it when rotation is not 0 and - * update it when rotation is set back to 0. - * - * FIXME: This is redundant with the fbc update done in - * the primary plane enable function except that that - * one is done too late. We eventually need to unify - * this. - */ - if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) && - dev_priv->fbc.plane == intel_crtc->plane && - intel_plane->rotation != BIT(DRM_ROTATE_0)) { - intel_disable_fbc(dev); - } - } - ret = intel_pipe_set_base(crtc, src->x1, src->y1, fb); - if (ret) + if (ret != 0) { + DRM_DEBUG_KMS("pin & fence failed\n"); return ret; - - if (!intel_crtc->primary_enabled) - intel_enable_primary_hw_plane(plane, crtc); + } } + crtc->primary->fb = fb; + crtc->x = src->x1; + crtc->y = src->y1; + intel_plane->crtc_x = state->orig_dst.x1; intel_plane->crtc_y = state->orig_dst.y1; intel_plane->crtc_w = drm_rect_width(&state->orig_dst); @@ -11920,6 +11894,57 @@ intel_commit_primary_plane(struct drm_plane *plane, intel_plane->src_h = drm_rect_height(&state->orig_src); intel_plane->obj = obj; + if (intel_crtc->active) { + /* + * FBC does not work on some platforms for rotated + * planes, so disable it when rotation is not 0 and + * update it when rotation is set back to 0. + * + * FIXME: This is redundant with the fbc update done in + * the primary plane enable function except that that + * one is done too late. We eventually need to unify + * this. + */ + if (intel_crtc->primary_enabled && + INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) && + dev_priv->fbc.plane == intel_crtc->plane && + intel_plane->rotation != BIT(DRM_ROTATE_0)) { + intel_disable_fbc(dev); + } + + if (state->visible) { + /* FIXME: kill this fastboot hack */ + intel_update_pipe_size(intel_crtc); + intel_enable_primary_hw_plane(plane, crtc); + } else { + /* + * If clipping results in a non-visible primary plane, + * we'll disable the primary plane. Note that this is + * a bit different than what happens if userspace + * explicitly disables the plane by passing fb=0 + * because plane->fb still gets set and pinned. + */ + intel_disable_primary_hw_plane(plane, crtc); + } + + intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe)); + + mutex_lock(&dev->struct_mutex); + intel_update_fbc(dev); + mutex_unlock(&dev->struct_mutex); + } + + if (old_fb) { + if (intel_crtc->active && old_fb != fb) + intel_wait_for_vblank(dev, intel_crtc->pipe); + + if (old_fb != fb) { + mutex_lock(&dev->struct_mutex); + intel_unpin_fb_obj(old_obj); + mutex_unlock(&dev->struct_mutex); + } + } + return 0; } -- 1.9.3

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[PATCH 1/4] drm: Really never disable vblank irqs for offdelay==0
by Daniel Vetter 11 Sep '14

11 Sep '14

With the new support for immediate vblank disabling we always disabled the vblank interrupt right away, irrespective of the vblank offdelay setting. But being able to let vblanks run forever is fairly useful for debugging, so restore that behaviour. Suggested-by: Mario Kleiner <mario.kleiner.de(a)gmail.com> Cc: Mario Kleiner <mario.kleiner.de(a)gmail.com> Cc: Matt Roper <matthew.d.roper(a)intel.com> Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> --- drivers/gpu/drm/drm_irq.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index a75da075927c..6eb015020af2 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c @@ -1024,9 +1024,11 @@ void drm_vblank_put(struct drm_device *dev, int crtc) /* Last user schedules interrupt disable */ if (atomic_dec_and_test(&vblank->refcount)) { - if (dev->vblank_disable_immediate || drm_vblank_offdelay < 0) + if (drm_vblank_offdelay == 0) + return; + else if (dev->vblank_disable_immediate || drm_vblank_offdelay < 0) vblank_disable_fn((unsigned long)vblank); - else if (drm_vblank_offdelay > 0) + else mod_timer(&vblank->disable_timer, jiffies + ((drm_vblank_offdelay * HZ)/1000)); } -- 1.9.3

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[Bug 82551] monitor resolution wrongly set when using kernels > 3.13
by bugzilla-daemon＠bugzilla.kernel.org 11 Sep '14

11 Sep '14

https://bugzilla.kernel.org/show_bug.cgi?id=82551 --- Comment #11 from Alex Deucher <alexdeucher(a)gmail.com> --- You'll have to ask ubuntu if they have added any special changes. I'm not able to reproduce any display problems. -- You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH v2 00/17] drm/exynos/ipp: image post processing fixes and improvements, part four
by Andrzej Hajda 11 Sep '14

11 Sep '14

This set of patches contains various improvement and fixes for exynos_drm ipp framework. The patchset is based on exynos-drm-next branch. IPP framework was tested for regressions on exynos4210-trats target. In the 2nd version of the series I have included changes proposed by Joonyoung Shim. I have decided to resend whole series because the changes caused merge conflicts and two separate patches have been added to the series. Changes are described in comit messages. Regards Andrzej Andrzej Hajda (17): drm/exynos/ipp: remove fake pm callbacks drm/exynos/ipp: cancel works before command node clean drm/exynos/ipp: move file reference from memory to command node drm/exynos/ipp: remove only related commands on file close drm/exynos/ipp: remove unused field in command node drm/exynos/ipp: free partially allocated resources on error drm/exynos/ipp: move nodes cleaning to separate function drm/exynos/ipp: clean memory nodes on command node cleaning drm/exynos/ipp: replace work_struct casting with better constructs drm/exynos/ipp: stop hardware before freeing memory drm/exynos/ipp: remove events during command cleaning drm/exynos/fimc: avoid clearing overflow bits drm/exynos/fimc: do not enable fimc twice drm/exynos/fimc: simplify buffer queuing drm/exynos/fimc: fix source buffer registers drm/exynos/ipp: remove file argument from node related functions drm/exynos/ipp: add file checks for ioctls drivers/gpu/drm/exynos/exynos_drm_fimc.c | 90 ++----- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 3 +- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 397 ++++++++++++---------------- drivers/gpu/drm/exynos/exynos_drm_ipp.h | 4 +- drivers/gpu/drm/exynos/exynos_drm_rotator.c | 3 +- 5 files changed, 195 insertions(+), 302 deletions(-) -- 1.9.1

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Shareable bufmgr objects
by Lionel Landwerlin 11 Sep '14

11 Sep '14

Hi there, Here is a small modification I had to make to get buffers shared between Mesa and LibVA on Chrome OS. This is required to have refcounting properly between the 2 API otherwise, Mesa might end up calling exit() when the kernel tells it that one of the buffer object used in a batch buffer is invalid : http://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/intel_… Thanks, - Lionel

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[pull] drm/msm: msm-next for 3.18
by Rob Clark 11 Sep '14

11 Sep '14

Hi Dave, main pull for 3.18: 1) add LVDS support for mdp4 (tested with auo B101XTN01.0 panel) 2) add B101XTN01.0 panel 3) bit of gpu refactoring to prepare for addition of addition gpu generations beyond just a3xx Thierry, I wasn't quite sure if I should include the panel patch or if you were going to send that.. it is easy enough for me to drop that one patch and resend the pull if that is preferred. --- The following changes since commit fdcaa1dbb7c6ed419b10fb8cdb5001ab0a00538f: Merge tag 'ipu-3.18' of git://git.pengutronix.de/git/pza/linux into drm-next (2014-09-10 19:43:29 +1000) are available in the git repository at: git://people.freedesktop.org/~robclark/linux msm-next for you to fetch changes up to 3bcefb0497f9fcad19be286b14d286784d584c5b: drm/msm/adreno: push dump/show stuff to base class (2014-09-10 11:19:09 -0400) ---------------------------------------------------------------- Rob Clark (8): drm/msm: update generated headers drm/msm/mdp4: fix blend setup with multiple crtcs drm/msm/mdp4: add LVDS panel support drm/panel/simple: add optronics B101XTN01.0 (v3) drm/msm/adreno: split adreno device out into it's own file drm/msm/adreno: move decision about what gpu to to load drm/msm/adreno: bit of init refactoring drm/msm/adreno: push dump/show stuff to base class .../devicetree/bindings/panel/auo,b101xtn01.txt | 7 + drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/msm/Makefile | 4 + drivers/gpu/drm/msm/adreno/a2xx.xml.h | 6 +- drivers/gpu/drm/msm/adreno/a3xx.xml.h | 12 +- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 214 +-------- drivers/gpu/drm/msm/adreno/adreno_common.xml.h | 6 +- drivers/gpu/drm/msm/adreno/adreno_device.c | 285 ++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 151 +++--- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 17 +- drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 10 +- drivers/gpu/drm/msm/dsi/dsi.xml.h | 10 +- drivers/gpu/drm/msm/dsi/mmss_cc.xml.h | 18 +- drivers/gpu/drm/msm/dsi/sfpb.xml.h | 10 +- drivers/gpu/drm/msm/hdmi/hdmi.c | 4 +- drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 10 +- drivers/gpu/drm/msm/hdmi/qfprom.xml.h | 10 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4.xml.h | 107 ++++- drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c | 21 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c | 2 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 89 +++- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h | 63 ++- drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c | 506 +++++++++++++++++++++ drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c | 151 ++++++ drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_pll.c | 172 +++++++ drivers/gpu/drm/msm/msm_drv.c | 37 +- drivers/gpu/drm/msm/msm_gpu.h | 6 +- drivers/gpu/drm/panel/panel-simple.c | 27 ++ 28 files changed, 1544 insertions(+), 412 deletions(-) create mode 100644 Documentation/devicetree/bindings/panel/auo,b101xtn01.txt create mode 100644 drivers/gpu/drm/msm/adreno/adreno_device.c create mode 100644 drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c create mode 100644 drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_connector.c create mode 100644 drivers/gpu/drm/msm/mdp/mdp4/mdp4_lvds_pll.c

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[PULL] topic/vblank-rework
by Daniel Vetter 11 Sep '14

11 Sep '14

Hi Dave, So here's the final bits of Ville's vblank rework with a bit of cleanup from Mario on top. The neat thing this finally allows is to immediately disable the vblank interrupt on the last drm_vblank_put if the hardware has perfectly accurate vblank counter and timestamp readout support. On i915 that required piles of small adjustements from Ville since depending upon the platform and port the vblank happens at different scanout lines. Of course this is fully opt-in and per-device (we need that since gen2 doesn't have a hw vblank counter). Mario reviewed the entire pile too and after some initial hesitation (about drivers without accurate timestampt support) acked it. Cheers, Daniel The following changes since commit 21d70354bba9965a098382fc4d7fb17e138111f3: drm: move drm_stub.c to drm_drv.c (2014-08-06 19:10:44 +1000) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/topic/vblank-rework-2014-09-10 for you to fetch changes up to 2368ffb18b1d2b04eb80478d225676caa7a3c4c8: drm: Use vblank_disable_and_save in drm_vblank_cleanup() (2014-09-10 09:41:29 +0200) ---------------------------------------------------------------- Mario Kleiner (2): drm: Remove drm_vblank_cleanup from drm_vblank_init error path. drm: Use vblank_disable_and_save in drm_vblank_cleanup() Ville Syrjälä (16): drm: Always reject drm_vblank_get() after drm_vblank_off() drm/i915: Warn if drm_vblank_get() still works after drm_vblank_off() drm: Don't clear vblank timestamps when vblank interrupt is disabled drm: Move drm_update_vblank_count() drm: Have the vblank counter account for the time between vblank irq disable and drm_vblank_off() drm: Avoid random vblank counter jumps if the hardware counter has been reset drm: Reduce the amount of dev->vblank[crtc] in the code drm: Fix deadlock between event_lock and vbl_lock/vblank_time_lock drm: Fix race between drm_vblank_off() and drm_queue_vblank_event() drm: Disable vblank interrupt immediately when drm_vblank_offdelay<0 drm: Add dev->vblank_disable_immediate flag drm/i915: Opt out of vblank disable timer on >gen2 drm: Kick start vblank interrupts at drm_vblank_on() drm/i915: Update scanline_offset only for active crtcs drm: Fix confusing debug message in drm_update_vblank_count() drm: Store the vblank timestamp when adjusting the counter during disable Documentation/DocBook/drm.tmpl | 7 + drivers/gpu/drm/drm_drv.c | 4 +- drivers/gpu/drm/drm_irq.c | 345 ++++++++++++++++++++++------------- drivers/gpu/drm/i915/i915_irq.c | 8 + drivers/gpu/drm/i915/intel_display.c | 17 +- include/drm/drmP.h | 12 +- 6 files changed, 256 insertions(+), 137 deletions(-) -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch

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dri-devel September 2014