dri-devel January 2016

dri-devel@lists.freedesktop.org

194 participants
1200 discussions

[patch] drm/nouveau/pci: reversed condition in nvkm_pcie_set_link()
by Dan Carpenter 13 Jan '16

13 Jan '16

The condition is reversed so this function is a no-op. Fixes: bcc19d9bf5cd ('drm/nouveau/pci: implement generic code for pcie speed change') Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c index b32954f..d71e5db 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c @@ -119,7 +119,7 @@ nvkm_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width) struct pci_bus *pbus; int ret; - if (pci || !pci_is_pcie(pci->pdev)) + if (!pci || !pci_is_pcie(pci->pdev)) return 0; pbus = pci->pdev->bus;

3 2

[PATCH 00/10] libdrm amdgpu patches
by Marek Olšák 13 Jan '16

13 Jan '16

Hi, These are libdrm_amdgpu patches harvested from an internal branch. The first patch is a revert I had to make to fix the build. Yeah, sequence_mutex should be renamed to a more appropriate name. That can be done as a follow-up. One notable change is the addition of DRM_IOCTL_AMDGPU_WAIT_FENCES. I hope the kernel contains (or will contain) the changes too, so that I don't push something that doesn't exist in the kernel. Please let me know if these are okay to push. Thanks, Chunming Zhou (3): amdgpu: add semaphore support tests/amdgpu: add semaphore test amdgpu: validate user memory for userptr Junwei Zhang (3): amdgpu: add the interface of waiting multiple fences amdgpu/tests: add multi-fence test in base test amdgpu: list each entry safely for sw semaphore when submit ib Marek Olšák (1): Revert "amdgpu: remove sequence mutex" Michel Dänzer (1): amdgpu: Cast pointer to uintptr_t for assignment to unsigned integer monk.liu (2): amdgpu: drop address patching logics amdgpu: cs_wait_fences now can return the first signaled fence index amdgpu/amdgpu.h | 88 +++++++++++++++++++++++++++++++++++++++++ amdgpu/amdgpu_bo.c | 14 ++----- amdgpu/amdgpu_cs.c | 253 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- amdgpu/amdgpu_internal.h | 15 +++++++ include/drm/amdgpu_drm.h | 28 +++++++++++++ tests/amdgpu/basic_tests.c | 233 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 616 insertions(+), 15 deletions(-) Marek

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[PATCH] drm/nouveau/device: ensure ret is initialized to zero
by Colin King 13 Jan '16

13 Jan '16

From: Colin Ian King <colin.king(a)canonical.com> nvkm_udevice_time does not initialize ret and this is used in the macro nvif_unpack(). Intializing it to zero allows the compiler to optimize out the ret == -ENOSYS check in the macro. Issue found by static analysis with cppcheck: [drivers/gpu/drm/nouveau/nvkm/engine/device/user.c:136]: (error) Uninitialized variable: ret Signed-off-by: Colin Ian King <colin.king(a)canonical.com> --- drivers/gpu/drm/nouveau/nvkm/engine/device/user.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c index 1ae48f2..93e0e53 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c @@ -127,7 +127,7 @@ nvkm_udevice_time(struct nvkm_udevice *udev, void *data, u32 size) union { struct nv_device_time_v0 v0; } *args = data; - int ret; + int ret = 0; if (nvif_unpack(args->v0, 0, 0, false)) { args->v0.time = nvkm_timer_read(device->timer); -- 2.7.0.rc3

1 0

[PATCH 0/5] sti fix to enable atomic modesetting
by Benjamin Gaignard 13 Jan '16

13 Jan '16

Those patches fix the issues found by using atomictest on sti driver. After testing we are confident to enable atomic modesetting so we decide to set DRIVER_ATOMIC flag. Benjamin Gaignard (4): drm: sti: fix potential crash in gdp drm: sti: add atomic get/set properties for planes drm: sti: set CRTC modesetting parameters drm: sti: set DRIVER_ATOMIC for sti Fabien Dessenne (1): drm: sti: fix cursor coordinates drivers/gpu/drm/sti/sti_crtc.c | 1 + drivers/gpu/drm/sti/sti_cursor.c | 2 +- drivers/gpu/drm/sti/sti_drv.c | 2 +- drivers/gpu/drm/sti/sti_gdp.c | 13 +++++++------ drivers/gpu/drm/sti/sti_plane.c | 40 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 50 insertions(+), 8 deletions(-) -- 1.9.1

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[PATCH] drm/rockchip: vop: fix mask when updating interrupts
by John Keeping 13 Jan '16

13 Jan '16

Commit dbb3d94 (drm/rockchip: vop: move interrupt registers into vop_data) introduced new macros for updating the interrupt control registers but these always use the mask from the register definition without refining it for the particular bits that are being changed. This means that whenever we enable/disable a particular interrupt we end up disabling all of the others as a side effect. Signed-off-by: John Keeping <john(a)metanate.com> --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 46c2a8d..fd37054 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -43,8 +43,8 @@ #define REG_SET(x, base, reg, v, mode) \ __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) -#define REG_SET_MASK(x, base, reg, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) +#define REG_SET_MASK(x, base, reg, mask, v, mode) \ + __REG_SET_##mode(x, base + reg.offset, mask, reg.shift, v) #define VOP_WIN_SET(x, win, name, v) \ REG_SET(x, win->base, win->phy->name, v, RELAXED) @@ -58,16 +58,18 @@ #define VOP_INTR_GET(vop, name) \ vop_read_reg(vop, 0, &vop->data->ctrl->name) -#define VOP_INTR_SET(vop, name, v) \ - REG_SET(vop, 0, vop->data->intr->name, v, NORMAL) +#define VOP_INTR_SET(vop, name, mask, v) \ + REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL) #define VOP_INTR_SET_TYPE(vop, name, type, v) \ do { \ - int i, reg = 0; \ + int i, reg = 0, mask = 0; \ for (i = 0; i < vop->data->intr->nintrs; i++) { \ - if (vop->data->intr->intrs[i] & type) \ + if (vop->data->intr->intrs[i] & type) { \ reg |= (v) << i; \ + mask |= 1 << i; \ + } \ } \ - VOP_INTR_SET(vop, name, reg); \ + VOP_INTR_SET(vop, name, mask, reg); \ } while (0) #define VOP_INTR_GET_TYPE(vop, name, type) \ vop_get_intr_type(vop, &vop->data->intr->name, type) -- 2.7.0.rc3.140.g520a093

2 1

[PATCH] drm/panel: simple: Add support for Sharp LQ101K1LY04
by Joshua Clayton 12 Jan '16

12 Jan '16

Sharp LQ101K1LY04 is a 10 inch WXGA (1280x800) lvds panel --- drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f97b73e..9207b5d 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -708,6 +708,29 @@ static const struct panel_desc giantplus_gpg482739qs5 = { .bus_format = MEDIA_BUS_FMT_RGB888_1X24, }; +static const struct display_timing sharp_lq101k1ly04_timing = { + .pixelclock = { 60000000, 65000000, 80000000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 20, 20, 20 }, + .hback_porch = { 20, 20, 20 }, + .hsync_len = { 10, 10, 10 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 4, 4, 4 }, + .vback_porch = { 4, 4, 4 }, + .vsync_len = { 4, 4, 4 }, + .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, +}; +static const struct panel_desc sharp_lq101k1ly04 = { + .timings = &sharp_lq101k1ly04_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 217, + .height = 136, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, +}; + static const struct display_timing hannstar_hsd070pww1_timing = { .pixelclock = { 64300000, 71100000, 82000000 }, .hactive = { 1280, 1280, 1280 }, @@ -1146,6 +1169,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "hannstar,hsd070pww1", .data = &hannstar_hsd070pww1, }, { + .compatible = "sharp,lq101k1ly04", + .data = &sharp_lq101k1ly04, + }, { .compatible = "hannstar,hsd100pxn1", .data = &hannstar_hsd100pxn1, }, { -- 2.5.0

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[PATCH 1/2] drm/dp: Add definition for Display Control DPCD Registers capability size
by Yetunde Adebisi 12 Jan '16

12 Jan '16

This is used when reading Display Control capability Registers on the sink device. cc: Jani Nikula <jani.nikula(a)intel.com> cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Yetunde Adebisi <yetundex.adebisi(a)intel.com> --- include/drm/drm_dp_helper.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 1252108..92d9a52 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf #define EDP_PSR_RECEIVER_CAP_SIZE 2 +#define EDP_DISPLAY_CTL_CAP_SIZE 3 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); -- 1.9.3

1 0

[GIT PULL 2nd] exynos-drm-next
by inki.dae＠samsung.com 12 Jan '16

12 Jan '16

Hi Dave, This 2nd pull request includes the following, - add configurable plane support and relevant cleanups. - fixup kernel panic issue at drm releasing. - remove unnecessary codes. This has been delayed to resolve a critical issue - which incurrs a kernel panic when driver is released - and review it. Please, kindly let me know if there is any problem. Thanks, Inki Dae The following changes since commit 8a0d560f3e651808ae0a3d9ab9fe476e59de132b: drm/amdgpu/powerplay: include asm/div64.h for do_div() (2016-01-12 09:29:25 +1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git exynos-drm-next for you to fetch changes up to c74d8eb5649386c2cfcd65cc960fd283ba876877: drm/exynos: fix kernel panic issue at drm releasing (2016-01-13 00:16:39 +0900) ---------------------------------------------------------------- Inki Dae (2): drm/exynos: crtc: do not wait for the scanout completion drm/exynos: fix kernel panic issue at drm releasing Marek Szyprowski (7): drm/exynos: rename zpos to index drm/exynos: make zpos property configurable drm/exynos: mixer: set window priority based on zpos drm/exynos: mixer: refactor layer setup drm/exynos: mixer: unify a check for video-processor window drm/exynos: crtc: rework atomic_{begin,flush} drm/exynos: mixer: properly update all planes on the same vblank event Tobias Jakobi (2): drm/exynos: mixer: remove all static blending setup drm/exynos: mixer: also allow ARGB1555 and ARGB4444 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 20 ++-- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 20 ++-- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 69 +++++------ drivers/gpu/drm/exynos/exynos_drm_crtc.h | 5 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 5 + drivers/gpu/drm/exynos/exynos_drm_drv.h | 18 +-- drivers/gpu/drm/exynos/exynos_drm_fb.c | 3 - drivers/gpu/drm/exynos/exynos_drm_fimd.c | 20 ++-- drivers/gpu/drm/exynos/exynos_drm_plane.c | 55 +++++++-- drivers/gpu/drm/exynos/exynos_drm_plane.h | 2 +- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 2 +- drivers/gpu/drm/exynos/exynos_mixer.c | 155 ++++++++++++++++--------- drivers/gpu/drm/exynos/regs-mixer.h | 4 + 13 files changed, 235 insertions(+), 143 deletions(-)

1 0

RPM wakelock ref not held during HW access
by Sergey Senozhatsky 12 Jan '16

12 Jan '16

Hello, -mmots 4.4.0-mm1-dbg-00602-g776bd09 [ 5331.509087] WARNING: CPU: 0 PID: 359 at drivers/gpu/drm/i915/intel_drv.h:1446 gen6_read32+0x7b/0x253 [i915]() [ 5331.509091] RPM wakelock ref not held during HW access [ 5331.509093] Modules linked in: [ 5331.509182] CPU: 0 PID: 359 Comm: Xorg Not tainted 4.4.0-mm1-dbg-00602-g776bd09-dirty #34 [ 5331.509186] 0000000000000000 ffff88041bddfac0 ffffffff811eb860 ffff88041bddfb08 [ 5331.509194] ffff88041bddfaf8 ffffffff81040fc2 ffffffffa05442a9 ffff88041aab0000 [ 5331.509200] 0000000000064000 ffff88041afcb001 0000000000000001 ffff88041bddfb60 [ 5331.509207] Call Trace: [ 5331.509218] [<ffffffff811eb860>] dump_stack+0x4b/0x63 [ 5331.509227] [<ffffffff81040fc2>] warn_slowpath_common+0x99/0xb2 [ 5331.509277] [<ffffffffa05442a9>] ? gen6_read32+0x7b/0x253 [i915] [ 5331.509283] [<ffffffff81041023>] warn_slowpath_fmt+0x48/0x50 [ 5331.509331] [<ffffffffa05442a9>] gen6_read32+0x7b/0x253 [i915] [ 5331.509338] [<ffffffff813b8ff6>] ? mutex_unlock+0xe/0x10 [ 5331.509391] [<ffffffffa057ae04>] intel_ddi_get_hw_state+0x5e/0x159 [i915] [ 5331.509443] [<ffffffffa057cdd8>] intel_ddi_connector_get_hw_state+0x5c/0xdf [i915] [ 5331.509494] [<ffffffffa056134b>] intel_atomic_commit+0x8e0/0x1250 [i915] [ 5331.509528] [<ffffffffa03f7acb>] ? drm_atomic_check_only+0x293/0x564 [drm] [ 5331.509558] [<ffffffffa03f7de9>] drm_atomic_commit+0x4d/0x52 [drm] [ 5331.509572] [<ffffffffa04e193e>] drm_atomic_helper_connector_dpms+0x116/0x17e [drm_kms_helper] [ 5331.509599] [<ffffffffa03ee56c>] drm_mode_obj_set_property_ioctl+0xef/0x17a [drm] [ 5331.509626] [<ffffffffa03ee627>] drm_mode_connector_property_set_ioctl+0x30/0x32 [drm] [ 5331.509642] [<ffffffffa03e10cb>] drm_ioctl+0x26d/0x3a8 [drm] [ 5331.509668] [<ffffffffa03ee5f7>] ? drm_mode_obj_set_property_ioctl+0x17a/0x17a [drm] [ 5331.509675] [<ffffffff81081c42>] ? lock_acquire+0x101/0x188 [ 5331.509681] [<ffffffff81165543>] ? __fget+0x5/0x19d [ 5331.509685] [<ffffffff8107d59a>] ? __lock_is_held+0x3c/0x57 [ 5331.509691] [<ffffffff8115ae60>] vfs_ioctl+0x18/0x34 [ 5331.509695] [<ffffffff8115b489>] do_vfs_ioctl+0x572/0x5f1 [ 5331.509699] [<ffffffff81165764>] ? __fget_light+0x62/0x71 [ 5331.509704] [<ffffffff8115b54b>] SyS_ioctl+0x43/0x61 [ 5331.509711] [<ffffffff813bb017>] entry_SYSCALL_64_fastpath+0x12/0x6f [ 5331.509715] ---[ end trace 70d4fd86a0395d92 ]--- -ss

2 1

[PATCH] drm/i915: Assign crtc correctly in load detection.
by Maarten Lankhorst 12 Jan '16

12 Jan '16

drm_atomic_set_crtc_for_connector should be used, and crtc->primary->crtc is assigned by atomic_commit. Rely on the helpers for setting this correctly, so connector_mask gets updated too. Signed-off-by: Maarten Lankhorst <maarten.lankhorst(a)linux.intel.com> --- Should this be applied to topic/drm-misc since atomic connector_masks are added there? diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bc2ec444925e..6b25a90d1e0a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10553,7 +10553,9 @@ retry: goto fail; } - connector_state->crtc = crtc; + ret = drm_atomic_set_crtc_for_connector(connector_state, crtc); + if (ret) + goto fail; crtc_state = intel_atomic_get_crtc_state(state, intel_crtc); if (IS_ERR(crtc_state)) { @@ -10597,7 +10599,6 @@ retry: old->release_fb->funcs->destroy(old->release_fb); goto fail; } - crtc->primary->crtc = crtc; /* let the connector get through one full cycle before testing */ intel_wait_for_vblank(dev, intel_crtc->pipe);

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dri-devel January 2016