dri-devel February 2016

dri-devel@lists.freedesktop.org

180 participants
1240 discussions

[PATCH 1/8] drm/amdgpu: move gmc7 support out of CIK dependency
by Alex Deucher 03 Feb '16

03 Feb '16

It's used by iceland which is VI. Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org --- drivers/gpu/drm/amd/amdgpu/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index 66f729e..20c9539 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -25,7 +25,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o # add asic specific block -amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o gmc_v7_0.o cik_ih.o kv_smc.o kv_dpm.o \ +amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \ ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o \ amdgpu_amdkfd_gfx_v7.o @@ -34,6 +34,7 @@ amdgpu-y += \ # add GMC block amdgpu-y += \ + gmc_v7_0.o \ gmc_v8_0.o # add IH block -- 2.5.0

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[PATCH v8 00/13] MT8173 DRM support
by Philipp Zabel 03 Feb '16

03 Feb '16

Hi, this MT8173 DRM update changes the clock bindings once more, as the MIPI_TX D-PHY and the HDMI PHY have internal PLLs that are better abstracted using the common clock framework. The clock outputs of the PHY modules are routed to the respective encoders, in the HDMI case by way of the TOP clock module. I'd like it if Michael or Stephen could take a look at the clock patches and maybe give an Ack or a Nope for this to be merged through the DRM tree. Various other issues have been fixed, for more details see the individual patches. Some changes since v7: - Added PLL reference input clocks and output clocks to the MIPI TX D-PHY and HDMI PHY nodes - Added HS input clocks to the MIPI DSI encoder nodes - Dropped the hdmitx_dig_cts clock from the TOP dividers, it is not a child of tvdpll_445p5m anyway. This clock signal really is provided by the HDMI PHY - Added "power-domains" properties to all nodes in the MM domain - Documented the merge and split function block bindings - Merged Daniel's wait for exclusive fences on incoming framebuffers using reservation_object_wait_timeout_rcu in .atomic_complete() into the DRM driver patch. This allowed to drop the drm/atomic-helper wait_for_fences export patch again. - Added missing atomic destroy_state callbacks, cleaned up reset callbacks - Added a pending_planes flag to mtk_crtc so we can atomically update the plane configuration - Fixed OD ddp_comp function setup - Separated enabling MIPI TX phy output from enabling the PLL (via CCF), this allows to keep the pixel clock running separately from the encoder output when disabling the crtc, to wait for the last vblank. - Fixed mtk_dpi_power_on reference counting - Fill ELD info in the HDMI driver, for future audio support. - Renamed the MT8173 specific HDMI PHY driver, as MT2701 has a different PHY. - Update iommus binding to v7 IOMMU patches. The following patches are needed to cleanly apply the device tree changes on top of v4.4-rc1: 61aee9342514 ("arm64: dts: mt8173: add MT8173 display PWM driver support node") from https://github.com/mbgg/linux-mediatek.git v4.4-next/arm64 https://patchwork.kernel.org/patch/7880431/ ("dts: mt8173: Add iommu/smi nodes for mt8173") And to build: https://patchwork.kernel.org/patch/7880301/ ("dt-bindings: mediatek: Add smi dts binding") https://patchwork.kernel.org/patch/7880321/ ("memory: mediatek: Add SMI driver") CK Hu (5): dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. drm/mediatek: Add DSI sub driver arm64: dts: mt8173: Add display subsystem related nodes arm64: dts: mt8173: Add HDMI related nodes Jie Qiu (3): drm/mediatek: Add DPI sub driver drm/mediatek: Add HDMI support drm/mediatek: enable hdmi output control bit Philipp Zabel (5): dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding clk: mediatek: make dpi0_sel propagate rate changes clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation clk: mediatek: remove hdmitx_dig_cts from TOP clocks .../bindings/display/connector/hdmi-connector.txt | 1 + .../bindings/display/mediatek/mediatek,disp.txt | 203 +++++ .../bindings/display/mediatek/mediatek,dpi.txt | 35 + .../bindings/display/mediatek/mediatek,dsi.txt | 60 ++ .../bindings/display/mediatek/mediatek,hdmi.txt | 148 ++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 312 ++++++++ drivers/clk/mediatek/clk-mt8173.c | 8 +- drivers/clk/mediatek/clk-mtk.h | 7 +- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/mediatek/Kconfig | 22 + drivers/gpu/drm/mediatek/Makefile | 22 + drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++++++ drivers/gpu/drm/mediatek/mtk_cec.h | 25 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 301 ++++++++ drivers/gpu/drm/mediatek/mtk_dpi.c | 737 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_dpi.h | 84 ++ drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 228 ++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 603 +++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 32 + drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 355 +++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 41 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 275 +++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 148 ++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 581 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 55 ++ drivers/gpu/drm/mediatek/mtk_drm_fb.c | 165 ++++ drivers/gpu/drm/mediatek/mtk_drm_fb.h | 29 + drivers/gpu/drm/mediatek/mtk_drm_gem.c | 227 ++++++ drivers/gpu/drm/mediatek/mtk_drm_gem.h | 55 ++ drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c | 610 +++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_plane.c | 242 ++++++ drivers/gpu/drm/mediatek/mtk_drm_plane.h | 59 ++ drivers/gpu/drm/mediatek/mtk_dsi.c | 847 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_dsi.h | 58 ++ drivers/gpu/drm/mediatek/mtk_hdmi.c | 482 ++++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi.h | 231 ++++++ drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c | 362 +++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 768 +++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_hw.h | 76 ++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 222 ++++++ drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 ++++++++++++ drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 506 ++++++++++++ include/dt-bindings/clock/mt8173-clk.h | 3 +- 44 files changed, 9955 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt create mode 100644 drivers/gpu/drm/mediatek/Kconfig create mode 100644 drivers/gpu/drm/mediatek/Makefile create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.c create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.h create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl.c create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi_regs.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.h create mode 100644 drivers/gpu/drm/mediatek/mtk_dsi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_dsi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mipi_tx.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c -- 2.6.2

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[PATCH v9 1/2] Documentation: bridge: Add documentation for ps8640 DT properties
by Jitao Shi 03 Feb '16

03 Feb '16

Add documentation for DT properties supported by ps8640 DSI-eDP converter. Signed-off-by: Jitao Shi <jitao.shi(a)mediatek.com> Acked-by: Rob Herring <robh(a)kernel.org> Reviewed-by: Philipp Zabel <p.zabel(a)pengutronix.de> --- Changes since v8: - No change --- .../devicetree/bindings/display/bridge/ps8640.txt | 43 ++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ps8640.txt diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.txt b/Documentation/devicetree/bindings/display/bridge/ps8640.txt new file mode 100644 index 0000000..a3e0971 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ps8640.txt @@ -0,0 +1,43 @@ +ps8640-bridge bindings + +Required properties: + - compatible: "parade,ps8640" + - reg: first page address of the bridge. + - sleep-gpios: OF device-tree gpio specification for PD_ pin. + - reset-gpios: OF device-tree gpio specification for reset pin. + - mode-sel-gpios: OF device-tree gpio specification for mode-sel pin. + - vdd12-supply: OF device-tree regulator specification for 1.2V power. + - vdd33-supply: OF device-tree regulator specification for 3.3V power. + - ports: The device node can contain video interface port nodes per + the video-interfaces bind[1]. For port@0,set the reg = <0> as + ps8640 dsi in and port@1,set the reg = <1> as ps8640 eDP out. + +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + edp-bridge@18 { + compatible = "parade,ps8640"; + reg = <0x18>; + sleep-gpios = <&pio 116 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 115 GPIO_ACTIVE_HIGH>; + mode-sel-gpios = <&pio 92 GPIO_ACTIVE_HIGH>; + vdd12-supply = <&ps8640_fixed_1v2>; + vdd33-supply = <&mt6397_vgp2_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + ps8640_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + port@1 { + reg = <1>; + ps8640_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; -- 1.7.9.5

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[PATCH v2 00/11] android sync framework: clean up IOCTLs and ABI
by Gustavo Padovan 03 Feb '16

03 Feb '16

From: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Hi, This patch series clean up IOCTLs and abi of sync framework and it is a follow up on the clean up series I've sent on Jan 21: http://thread.gmane.org/gmane.comp.video.dri.devel/145509 The main changes here are: * remove of SYNC_WAIT ioctl, poll() should be used instead. * rename some structs and macros to better reflect the new internal names. * clean up and improve ABI on SYNC_IOC_FILE_INFO * add flags filed to all ABI structs * make sync_file_info->len return only the size of the array of fence_infos v2: - Check flags passed to the kernel (Maarten) - Rework len to report only the size of fence_infos array (Emil) - Fix fence_info type. Use __u64 pointer type (Emil, Maarten) Please review! Thanks. Gustavo Padovan (11): staging/android: remove SYNC_WAIT ioctl staging/android: rename sync_pt_info to fence_info staging/android: rename sync_file_info_data to sync_file_info staging/android: remove driver_data from struct fence_info staging/android: remove len field from struct fence_info staging/android: turn fence_info into a __u64 pointer staging/android: add num_fences field to struct sync_file_info staging/android: make info->len return only the size of fence_infos staging/android: rename SYNC_IOC_FENCE_INFO staging/android: add flags member to sync ioctl structs staging/android: remove redundant comments on sync_merge_data drivers/staging/android/sw_sync.c | 14 ---- drivers/staging/android/sync.c | 128 +++++++++-------------------------- drivers/staging/android/sync.h | 20 ------ drivers/staging/android/trace/sync.h | 44 ------------ drivers/staging/android/uapi/sync.h | 50 ++++++-------- 5 files changed, 55 insertions(+), 201 deletions(-) -- 2.5.0

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[PATCH v3 00/10] Add DRM Driver for HiSilicon Kirin hi6220 SoC
by Xinliang Liu 03 Feb '16

03 Feb '16

This patch set adds a new drm driver for HiSilicon Kirin hi6220 SoC. Current testing and support board is Hikey board which is one of Linaro 96boards. It is an arm64 open source board. For more information about this board, please access https://www.96boards.org. Hardware Detail --------------- The display subsystem of Hi6220 SoC is shown as bellow: +-----+ +----------+ +-----+ +---------+ | | | | | | | | | FB |------>| ADE |---->| DSI |---->| External| | | | | | | | HDMI | +-----+ +----------+ +-----+ +---------+ - ADE(Advanced Display Engine) is the display controller. It contains 7 channels, 3 overlay compositors and a LDI. - A channel looks like: DMA-->clip-->scale-->ctrans(or called csc). - Overlay compositor is response to compose planes which come from 7 channels and pass composed image to LDI. - LDI is response to generate timings and RGB data stream. - DSI converts the RGB data stream from ADE to DSI packets. - External HDMI module is connected with DSI bus. Now Hikey use a ADI's ADV7533 external HDMI chip. Change History ------------- Changes in v3: - Move and rename all the files to kirin sub-directory. So that we could separate different seires SoCs' driver. - Make ade as the drm master node. - Replace drm_platform_init, load, unload implementation. - Use assigned-clocks to set clock rate. - Use ports to connect display relavant nodes. - Rename hisi_drm_dsi.c to dw_drm_dsi.c - Make encoder type as DRM_MODE_ENCODER_DSI. - A few cleanup on regs and code. Changes in v2: - Remove abtraction layer of plane/crtc/encoder/connector. - Refactor atomic implementation according to Daniel Vetter's guides: http://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html http://blog.ffwll.ch/2015/09/xdc-2015-atomic-modesetting-for-drivers.html http://blog.ffwll.ch/2015/08/atomic-modesetting-design-overview.html - Use bridge instead of slave encoder to connect external HDMI. - Move dt binding docs to bindings/display/hisilicon directory. Xinliang Liu (10): drm/hisilicon: Add device tree binding for hi6220 display subsystem drm/hisilicon: Add hisilicon kirin drm master driver drm/hisilicon: Add crtc driver for ADE drm/hisilicon: Add plane driver for ADE drm/hisilicon: Add vblank driver for ADE drm/hisilicon: Add cma fbdev and hotplug drm/hisilicon: Add designware dsi encoder driver drm/hisilicon: Add designware dsi host driver drm/hisilicon: Add support for external bridge MAINTAINERS: Add maintainer for hisilicon DRM driver .../bindings/display/hisilicon/dw-dsi.txt | 60 ++ .../bindings/display/hisilicon/hisi-ade.txt | 56 ++ MAINTAINERS | 9 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/hisilicon/Kconfig | 5 + drivers/gpu/drm/hisilicon/Makefile | 5 + drivers/gpu/drm/hisilicon/kirin/Kconfig | 10 + drivers/gpu/drm/hisilicon/kirin/Makefile | 5 + drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 845 ++++++++++++++++ drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h | 83 ++ drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 280 ++++++ drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 1053 ++++++++++++++++++++ drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 382 +++++++ drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h | 31 + 15 files changed, 2827 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt create mode 100644 drivers/gpu/drm/hisilicon/Kconfig create mode 100644 drivers/gpu/drm/hisilicon/Makefile create mode 100644 drivers/gpu/drm/hisilicon/kirin/Kconfig create mode 100644 drivers/gpu/drm/hisilicon/kirin/Makefile create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h -- 1.9.1

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[PATCH v8 1/2] Documentation: bridge: Add documentation for ps8640 DT properties
by Jitao Shi 03 Feb '16

03 Feb '16

Add documentation for DT properties supported by ps8640 DSI-eDP converter. Signed-off-by: Jitao Shi <jitao.shi(a)mediatek.com> Acked-by: Rob Herring <robh(a)kernel.org> Reviewed-by: Philipp Zabel <p.zabel(a)pengutronix.de> --- Changes since v7: - No change --- .../devicetree/bindings/display/bridge/ps8640.txt | 43 ++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ps8640.txt diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.txt b/Documentation/devicetree/bindings/display/bridge/ps8640.txt new file mode 100644 index 0000000..a3e0971 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ps8640.txt @@ -0,0 +1,43 @@ +ps8640-bridge bindings + +Required properties: + - compatible: "parade,ps8640" + - reg: first page address of the bridge. + - sleep-gpios: OF device-tree gpio specification for PD_ pin. + - reset-gpios: OF device-tree gpio specification for reset pin. + - mode-sel-gpios: OF device-tree gpio specification for mode-sel pin. + - vdd12-supply: OF device-tree regulator specification for 1.2V power. + - vdd33-supply: OF device-tree regulator specification for 3.3V power. + - ports: The device node can contain video interface port nodes per + the video-interfaces bind[1]. For port@0,set the reg = <0> as + ps8640 dsi in and port@1,set the reg = <1> as ps8640 eDP out. + +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt + +Example: + edp-bridge@18 { + compatible = "parade,ps8640"; + reg = <0x18>; + sleep-gpios = <&pio 116 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 115 GPIO_ACTIVE_HIGH>; + mode-sel-gpios = <&pio 92 GPIO_ACTIVE_HIGH>; + vdd12-supply = <&ps8640_fixed_1v2>; + vdd33-supply = <&mt6397_vgp2_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + ps8640_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + port@1 { + reg = <1>; + ps8640_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; -- 1.7.9.5

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[PATCH 1/4] drm/fsl-dcu: Cleanup vblank interrupt mask and status setting code
by Meng Yi 03 Feb '16

03 Feb '16

From: Jianwei Wang <jianwei.wang.chn(a)gmail.com> Switch update interrupt mask bit with regmap_update_bits, and clear interrupt status by writing 1 to relevant bit before setting mask in fsl_dcu_drm_irq_init function. Signed-off-by: JianWei Wang <jianwei.wang.chn(a)gmail.com> Signed-off-by: Meng Yi <meng.yi(a)nxp.com> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index fca97d3..cbef47c 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c @@ -38,21 +38,17 @@ static const struct regmap_config fsl_dcu_regmap_config = { static int fsl_dcu_drm_irq_init(struct drm_device *dev) { struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; - unsigned int value; int ret; ret = drm_irq_install(dev, fsl_dev->irq); if (ret < 0) dev_err(dev->dev, "failed to install IRQ handler\n"); - ret = regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0); + ret = regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0xffffffff); if (ret) dev_err(dev->dev, "set DCU_INT_STATUS failed\n"); - ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); - if (ret) - dev_err(dev->dev, "read DCU_INT_MASK failed\n"); - value &= DCU_INT_MASK_VBLANK; - ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); + ret = regmap_update_bits(fsl_dev->regmap, DCU_INT_MASK, + DCU_INT_MASK_VBLANK, ~DCU_INT_MASK_VBLANK); if (ret) dev_err(dev->dev, "set DCU_INT_MASK failed\n"); ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE, @@ -143,14 +139,10 @@ static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe) { struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; - unsigned int value; int ret; - ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); - if (ret) - dev_err(dev->dev, "read DCU_INT_MASK failed\n"); - value &= ~DCU_INT_MASK_VBLANK; - ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); + ret = regmap_update_bits(fsl_dev->regmap, DCU_INT_MASK, + DCU_INT_MASK_VBLANK, ~DCU_INT_MASK_VBLANK); if (ret) dev_err(dev->dev, "set DCU_INT_MASK failed\n"); return 0; @@ -160,14 +152,10 @@ static void fsl_dcu_drm_disable_vblank(struct drm_device *dev, unsigned int pipe) { struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; - unsigned int value; int ret; - ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value); - if (ret) - dev_err(dev->dev, "read DCU_INT_MASK failed\n"); - value |= DCU_INT_MASK_VBLANK; - ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value); + ret = regmap_update_bits(fsl_dev->regmap, DCU_INT_MASK, + DCU_INT_MASK_VBLANK, DCU_INT_MASK_VBLANK); if (ret) dev_err(dev->dev, "set DCU_INT_MASK failed\n"); } -- 2.1.0.27.g96db324

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[Bug 93970] Second Life - Advanced Lighting Model shader fails to compile on Radeon SI driver
by bugzilla-daemon＠freedesktop.org 03 Feb '16

03 Feb '16

https://bugs.freedesktop.org/show_bug.cgi?id=93970 Bug ID: 93970 Summary: Second Life - Advanced Lighting Model shader fails to compile on Radeon SI driver Product: Mesa Version: 11.0 Hardware: Other OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org Reporter: sonichedgehog_hyperblast00(a)yahoo.com QA Contact: dri-devel(a)lists.freedesktop.org Created attachment 121467 --> https://bugs.freedesktop.org/attachment.cgi?id=121467&action=edit Shader compilation log Advanced Lighting Model shader for Second Life fails to compile. When enabled, the menu waits for a moment then turns the option back off. I attached a log of the messages printed to the console during shader activation... there seem to be a lot of complaints about FXAA. The problem only exists in the RadeonSI driver, not the R600 driver! Until yesterday I had a Radeon HD 6870 video card (AMD BARTS) and the shader worked perfectly, now I got a Radeon R7 370 (AMD PITCAIRN) and the problem occurs since I installed it. -- You are receiving this mail because: You are the assignee for the bug.

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[PATCH 1/2] drm/fsl-dcu: fix register initialization
by Stefan Agner 03 Feb '16

03 Feb '16

The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for Vybrid) whereas the register enumeration start from 1 (1-10 for LS1021a and 1-9 for Vybrid). The loop started off from 0 for both iterations and initialized the number of layers inclusive, which is one layer too many. All extensively written registers seem to be unassigned, it seems that the write to those registers did not do any harm in practice. Signed-off-by: Stefan Agner <stefan(a)agner.ch> --- This two patches apply cleanly on top of my earlier DCU fixes patchset: https://lkml.org/lkml/2015/11/18/953 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index db69725..3c92889 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -169,8 +169,8 @@ int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev) reg_num = LS1021A_LAYER_REG_NUM; else reg_num = VF610_LAYER_REG_NUM; - for (i = 0; i <= fsl_dev->soc->total_layer; i++) { - for (j = 0; j < reg_num; j++) + for (i = 0; i < fsl_dev->soc->total_layer; i++) { + for (j = 1; j <= reg_num; j++) regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0); } regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE, -- 2.7.0

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SDL and drm driver
by Richard Greene 02 Feb '16

02 Feb '16

Hello, I'm finding that attempts to change the video mode via libdrm don't allow SDL to use that mode, and I'm wondering if anyone can tell me why or what I might need to do to make it work. I'm using SDL 1.2 on a BeagleBone Black running Wheezy, 3.8.13-bone71, and Rob Clark's tilcdc/tda998x drm driver. I can boot into either of two video modes using the appropriate kms_force_mode setting in uEnv.txt. When I run a modified version of modetest (built from git://anongit.freedesktop.org/mesa/drm) that sets the opposite mode from the one defined in uEnv.txt and then calls SDL_Init and SDL_GetVideoInfo, the later always finds the same mode as was set in uEnv.txt. Then a call to SDL_SetVideoMode (also with the opposite of the uEnv.txt mode) always fails, just as it does if I hadn't attempted to change the mode via libdrm. For example, when this line is in uEnv.txt: kms_force_mode=video=HDMI-A-1:912x1140M@60 and in the modified modetest, with count == 1, I call: parse_connector(&pipe_args[count], "5:1280x800") ... set_mode(&dev, pipe_args, count) It then reports: setting mode 1280x800-60Hz@XR24 on connectors 5, crtc 3 But SDL_GetVideoInfo still reports the mode as 912x1140, and on attempting to use SDL_SetVideoMode to set it to 1280x800, it fails with the error message: No video mode large enough for 1280x800 FYI, the output of the (unmodified) modetest when using this same uEnv.txt file is shown below. Richard trying to open device 'i915'...failed trying to open device 'radeon'...failed trying to open device 'nouveau'...failed trying to open device 'vmwgfx'...failed trying to open device 'omapdrm'...failed trying to open device 'exynos'...failed trying to open device 'tilcdc'...done Encoders: id crtc type possible crtcs possible clones 4 3 TMDS 0x00000001 0x00000000 Connectors: id encoder status name size (mm) modes encoders 5 4 connected HDMI-A-1 520x320 4 4 modes: name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot) 1280x800 60 1280 1352 1480 1680 800 810 816 831 flags: phsync, pvsync; type: preferred, driver 912x1140 60 912 952 1016 1192 1140 1150 1156 1170 flags: phsync, pvsync; type: driver 752x470 70 752 776 856 960 470 471 474 490 flags: nhsync, pvsync; type: 720x450 60 720 736 808 896 450 451 454 466 flags: nhsync, pvsync; type: props: 1 EDID: flags: immutable blob blobs: value: 00ffffffffffff001190004501000000 0d170103803420a002ee95a3544c9926 0f505400000001000100010001000100 0100010001009e20009051201f304880 a60006442100001ea820901831741e40 2840a60006442100001e000000fc004c 437220343530300a20202020000000fa 001d003b003f0a2020010001000a00db 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 1 CRTCs: id fb pos size 3 10 (0,0) (912x1140) 912x1140 60 912 952 1016 1192 1140 1150 1156 1170 flags: phsync, pvsync; type: driver props: Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs Frame buffers: id size pitch

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dri-devel February 2016