dri-devel March 2018

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[PATCH] video: fbdev: sis: avoid mismatched prototypes
by Arnd Bergmann 12 Mar '18

12 Mar '18

Building with LTO enabled reveals some functions whose prototypes in the header are different from the definition: drivers/video/fbdev/sis/sis_main.h:765:0: error: type of 'SiS_SetCH70xxANDOR' does not match original declaration [-Werror=lto-type-mismatch] extern void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, drivers/video/fbdev/sis/init301.c:8937:0: note: type mismatch in parameter 4 SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, drivers/video/fbdev/sis/init301.c:8937:0: note: type 'short unsigned int' should match type 'unsigned char' drivers/video/fbdev/sis/init301.c:8937:0: note: 'SiS_SetCH70xxANDOR' was previously declared here The root cause appears to be the way that header files are used in this driver, where they contain both static variable and declarations for symbols in other files. To clean that up, I'm changing all mixed headers to only contain declarations the way we normally do in C, or contain only static variables, and move the rest to a more appropriate place. Once that is done, the headers can be included in the other files as well, and guarantee that the prototypes match. There are a few headers that now only contain static variables, and I'm leaving those alone here as the patch is already too big. These could be trivially moved into the respective .c files. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- drivers/video/fbdev/sis/init.h | 76 --------- drivers/video/fbdev/sis/init301.c | 326 +++++++++++++++++++++++++++++++++++++ drivers/video/fbdev/sis/init301.h | 320 ------------------------------------ drivers/video/fbdev/sis/sis.h | 131 +++++++++++++++ drivers/video/fbdev/sis/sis_main.c | 51 ++++++ drivers/video/fbdev/sis/sis_main.h | 117 ------------- 6 files changed, 508 insertions(+), 513 deletions(-) diff --git a/drivers/video/fbdev/sis/init.h b/drivers/video/fbdev/sis/init.h index 85d6738b6c64..400b0e5681b2 100644 --- a/drivers/video/fbdev/sis/init.h +++ b/drivers/video/fbdev/sis/init.h @@ -1461,81 +1461,5 @@ static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1_H[] = 0x00}} }; -bool SiSInitPtr(struct SiS_Private *SiS_Pr); -unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, bool FSTN, - unsigned short CustomT, int LCDwith, int LCDheight, - unsigned int VBFlags2); -unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, unsigned int VBFlags2); -unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, unsigned int VBFlags2); - -void SiS_DisplayOn(struct SiS_Private *SiS_Pr); -void SiS_DisplayOff(struct SiS_Private *SiS_Pr); -void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); -void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); -void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); -unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); - -bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, - unsigned short *ModeIdIndex); -unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); -unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); -unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo, - unsigned short ModeIdIndex, unsigned short RRTI); -#ifdef CONFIG_FB_SIS_300 -void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, - unsigned short *idx2); -unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2); -unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); -#endif -void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); -bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); -void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); -void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, - int yres, struct fb_var_screeninfo *var, bool writeres); - -/* From init301.c: */ -extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex, int chkcrt2mode); -extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr); -extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); -extern void SiS_DisableBridge(struct SiS_Private *); -extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short); -extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); -extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex); -extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); -extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, - unsigned short ModeIdIndex, unsigned short RRTI); -extern bool SiS_IsVAMode(struct SiS_Private *); -extern bool SiS_IsDualEdge(struct SiS_Private *); - -#ifdef CONFIG_FB_SIS_300 -extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); -extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, - unsigned int val); -#endif -#ifdef CONFIG_FB_SIS_315 -extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, - unsigned char val); -extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); -#endif - #endif diff --git a/drivers/video/fbdev/sis/init301.c b/drivers/video/fbdev/sis/init301.c index 02ee752d5000..27a2b72e50e8 100644 --- a/drivers/video/fbdev/sis/init301.c +++ b/drivers/video/fbdev/sis/init301.c @@ -82,6 +82,332 @@ #define SiS_I2CDELAY 1000 #define SiS_I2CDELAYSHORT 150 +static const unsigned char SiS_YPbPrTable[3][64] = { + { + 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, + 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, + 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17, + 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02, + 0x03,0x0a,0x65,0x9d /*0x8d*/,0x08,0x92,0x8f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x53 /*0x50*/, + 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 + }, + { + 0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c, + 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, + 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13, + 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8, + 0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e, + 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00 + }, + { +#if 0 /* OK, but sticks to left edge */ + 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c, + 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, + 0xed,0x50,0x70,0x9f,0x16,0x59,0x21 /*0x2b*/,0x13, + 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0, + 0x4b,0x4b,0x65 /*0x6f*/,0x2f,0x63,0x92,0x0f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27, + 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00 +#endif +#if 1 /* Perfect */ + 0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c, + 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, + 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13, + 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0, + 0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73, + 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00 +#endif + } +}; + +static const unsigned char SiS_TVPhase[] = +{ + 0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */ + 0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */ + 0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */ + 0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */ + 0x1E,0x8B,0xA2,0xA7, + 0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */ + 0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00, + 0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */ + 0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */ + 0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */ + 0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */ + 0x1E,0x8B,0xA2,0xA7, + 0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */ + 0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00, + 0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */ + 0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */ +}; + +static const unsigned char SiS_HiTVGroup3_1[] = { + 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13, + 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6, + 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, + 0xac, 0xda, 0x60, 0xfe, 0x6a, 0x9a, 0x06, 0x10, + 0xd1, 0x04, 0x18, 0x0a, 0xff, 0x80, 0x00, 0x80, + 0x3b, 0x77, 0x00, 0xef, 0xe0, 0x10, 0xb0, 0xe0, + 0x10, 0x4f, 0x0f, 0x0f, 0x05, 0x0f, 0x08, 0x6e, + 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01 +}; + +static const unsigned char SiS_HiTVGroup3_2[] = { + 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a, + 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6, + 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, + 0xac, 0x6a, 0x60, 0x2b, 0x52, 0xcd, 0x61, 0x10, + 0x51, 0x04, 0x18, 0x0a, 0x1f, 0x80, 0x00, 0x80, + 0xff, 0xa4, 0x04, 0x2b, 0x94, 0x21, 0x72, 0x94, + 0x26, 0x05, 0x01, 0x0f, 0xed, 0x0f, 0x0a, 0x64, + 0x18, 0x1d, 0x23, 0x28, 0x4c, 0xaa, 0x01 +}; + +/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */ + +static const unsigned char SiS_Part2CLVX_1[] = { + 0x00,0x00, + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E +}; + +static const unsigned char SiS_Part2CLVX_2[] = { + 0x00,0x00, + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E +}; + +static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */ + 0xE0,0x01, + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, + 0x58,0x02, + 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, + 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, + 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06, + 0x00,0x03, + 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00,0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01, + 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02,0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03, + 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05,0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06, + 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07,0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08, + 0xFF,0xFF +}; + +static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */ + 0x58,0x02, + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + 0x00,0x03, + 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x11,0x0B,0x7F, + 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0C,0x00,0x03,0x10,0x0D,0x00,0x02,0x0F,0x0E,0x01, + 0x01,0x0F,0x0F,0x01,0x01,0x0E,0x0F,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0C,0x11,0x04, + 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x11,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07, + 0x40,0x02, + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, + 0xFF,0xFF +}; + +static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */ + 0x00,0x03, + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + 0xFF,0xFF +}; + +static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */ + 0x00,0x04, + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, + 0xFF,0xFF, +}; + +#ifdef CONFIG_FB_SIS_315 +/* 661 et al LCD data structure (2.03.00) */ +static const unsigned char SiS_LCDStruct661[] = { + /* 1024x768 */ +/* type|CR37| HDE | VDE | HT | VT | hss | hse */ + 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88, + 0x00,0x02,0x00,0x06,0x00,0x41,0x5A,0x64,0x00,0x00,0x00,0x00,0x04, + /* | vss | vse |clck| clock |CRT2DataP|CRT2DataP|idx */ + /* VESA non-VESA noscale */ + /* 1280x1024 */ + 0x03,0xC0,0x00,0x05,0x00,0x04,0x98,0x06,0x2A,0x04,0x30,0x00,0x70, + 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x08, + /* 1400x1050 */ + 0x09,0x20,0x78,0x05,0x1A,0x04,0x98,0x06,0x2A,0x04,0x18,0x00,0x38, + 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x09, + /* 1600x1200 */ + 0x0B,0xE0,0x40,0x06,0xB0,0x04,0x70,0x08,0xE2,0x04,0x40,0x00,0xC0, + 0x00,0x01,0x00,0x03,0x00,0xA2,0x70,0x24,0x00,0x00,0x00,0x00,0x0A, + /* 1280x768 (_2) */ + 0x0A,0xE0,0x00,0x05,0x00,0x03,0x7C,0x06,0x26,0x03,0x30,0x00,0x70, + 0x00,0x03,0x00,0x06,0x00,0x4D,0xC8,0x48,0x00,0x00,0x00,0x00,0x06, + /* 1280x720 */ + 0x0E,0xE0,0x00,0x05,0xD0,0x02,0x80,0x05,0x26,0x03,0x10,0x00,0x20, + 0x00,0x01,0x00,0x06,0x00,0x45,0x9C,0x62,0x00,0x00,0x00,0x00,0x05, + /* 1280x800 (_2) */ + 0x0C,0xE0,0x00,0x05,0x20,0x03,0x10,0x06,0x2C,0x03,0x30,0x00,0x70, + 0x00,0x04,0x00,0x03,0x00,0x49,0xCE,0x1E,0x00,0x00,0x00,0x00,0x09, + /* 1680x1050 */ + 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C, + 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06, + /* 1280x800_3 */ + 0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50, + 0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07, + /* 800x600 */ + 0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80, + 0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00, + /* 1280x854 */ + 0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70, + 0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08 +}; +#endif + +#ifdef CONFIG_FB_SIS_300 +static unsigned char SiS300_TrumpionData[14][80] = { + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, + 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23, + 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xBC,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x09,0x04,0x04,0x05, + 0x04,0x0C,0x09,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5A,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x27,0x00,0x80,0x02, + 0x20,0x03,0x07,0x00,0x5E,0x01,0x0D,0x02,0x60,0x0C,0x30,0x11,0x00,0x00,0x04,0x23, + 0x00,0x00,0x03,0x80,0x03,0x28,0x06,0x08,0x40,0x11,0x00,0x11,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0x90,0x01,0xFF,0x0F,0xF4,0x19,0x01,0x00,0x05,0x01,0x00,0x04,0x05, + 0x04,0x0C,0x02,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEC,0x57,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02, + 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, + 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xD9,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, + 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x59,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02, + 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, + 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, + 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, + 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05, + 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03, + 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D, + 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D, + 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B, + 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04, + 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01, + 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, + /* variant 2 */ + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, + 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05, + 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, + 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05, + 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02, + 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, + 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, + 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02, + 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, + 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, + 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, + 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05, + 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03, + 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D, + 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D, + 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B, + 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }, + { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04, + 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23, + 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23, + 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01, + 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 } +}; +#endif + +#ifdef CONFIG_FB_SIS_315 +static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr); +static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr); +static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr); +static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr); +#endif /* 315 */ + +#ifdef CONFIG_FB_SIS_300 +static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); +#endif + +static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, + int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, + bool checkcr32, unsigned int VBFlags2); +static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); +static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, + unsigned char *buffer); +static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr); +static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr); +static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr); +static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr); +static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr); +static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr); +static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax); +static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr); +static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr); +static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr); +static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr); +static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno); +static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr); + +#ifdef CONFIG_FB_SIS_300 +static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr, + unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex); +static void SetOEMLCDData2(struct SiS_Private *SiS_Pr, + unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex); +#endif +#ifdef CONFIG_FB_SIS_315 +static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr, + unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); +static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr, + unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); +static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short); +#endif + static unsigned short SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr); static void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); diff --git a/drivers/video/fbdev/sis/init301.h b/drivers/video/fbdev/sis/init301.h index 2112d6d7feda..6e5cf14c4ce4 100644 --- a/drivers/video/fbdev/sis/init301.h +++ b/drivers/video/fbdev/sis/init301.h @@ -66,287 +66,6 @@ #include "sis.h" #include <video/sisfb.h> -static const unsigned char SiS_YPbPrTable[3][64] = { - { - 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, - 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, - 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, - 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17, - 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02, - 0x03,0x0a,0x65,0x9d /*0x8d*/,0x08,0x92,0x8f,0x40, - 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x53 /*0x50*/, - 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 - }, - { - 0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c, - 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a, - 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, - 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13, - 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8, - 0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40, - 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e, - 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00 - }, - { -#if 0 /* OK, but sticks to left edge */ - 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c, - 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, - 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, - 0xed,0x50,0x70,0x9f,0x16,0x59,0x21 /*0x2b*/,0x13, - 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0, - 0x4b,0x4b,0x65 /*0x6f*/,0x2f,0x63,0x92,0x0f,0x40, - 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27, - 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00 -#endif -#if 1 /* Perfect */ - 0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c, - 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, - 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, - 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13, - 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0, - 0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40, - 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73, - 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00 -#endif - } -}; - -static const unsigned char SiS_TVPhase[] = -{ - 0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */ - 0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */ - 0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */ - 0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */ - 0x1E,0x8B,0xA2,0xA7, - 0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */ - 0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00, - 0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */ - 0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */ - 0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */ - 0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */ - 0x1E,0x8B,0xA2,0xA7, - 0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */ - 0x00,0x00,0x00,0x00, - 0x00,0x00,0x00,0x00, - 0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */ - 0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */ -}; - -static const unsigned char SiS_HiTVGroup3_1[] = { - 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13, - 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6, - 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, - 0xac, 0xda, 0x60, 0xfe, 0x6a, 0x9a, 0x06, 0x10, - 0xd1, 0x04, 0x18, 0x0a, 0xff, 0x80, 0x00, 0x80, - 0x3b, 0x77, 0x00, 0xef, 0xe0, 0x10, 0xb0, 0xe0, - 0x10, 0x4f, 0x0f, 0x0f, 0x05, 0x0f, 0x08, 0x6e, - 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01 -}; - -static const unsigned char SiS_HiTVGroup3_2[] = { - 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a, - 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6, - 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, - 0xac, 0x6a, 0x60, 0x2b, 0x52, 0xcd, 0x61, 0x10, - 0x51, 0x04, 0x18, 0x0a, 0x1f, 0x80, 0x00, 0x80, - 0xff, 0xa4, 0x04, 0x2b, 0x94, 0x21, 0x72, 0x94, - 0x26, 0x05, 0x01, 0x0f, 0xed, 0x0f, 0x0a, 0x64, - 0x18, 0x1d, 0x23, 0x28, 0x4c, 0xaa, 0x01 -}; - -/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */ - -static const unsigned char SiS_Part2CLVX_1[] = { - 0x00,0x00, - 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, - 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, - 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, - 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E -}; - -static const unsigned char SiS_Part2CLVX_2[] = { - 0x00,0x00, - 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, - 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, - 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, - 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E -}; - -static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */ - 0xE0,0x01, - 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, - 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, - 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, - 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, - 0x58,0x02, - 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, - 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, - 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, - 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06, - 0x00,0x03, - 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00,0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01, - 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02,0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03, - 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05,0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06, - 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07,0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08, - 0xFF,0xFF -}; - -static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */ - 0x58,0x02, - 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, - 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, - 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, - 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, - 0x00,0x03, - 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x11,0x0B,0x7F, - 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0C,0x00,0x03,0x10,0x0D,0x00,0x02,0x0F,0x0E,0x01, - 0x01,0x0F,0x0F,0x01,0x01,0x0E,0x0F,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0C,0x11,0x04, - 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x11,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07, - 0x40,0x02, - 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, - 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, - 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, - 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, - 0xFF,0xFF -}; - -static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */ - 0x00,0x03, - 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, - 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, - 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, - 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, - 0xFF,0xFF -}; - -static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */ - 0x00,0x04, - 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, - 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, - 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, - 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, - 0xFF,0xFF, -}; - -#ifdef CONFIG_FB_SIS_315 -/* 661 et al LCD data structure (2.03.00) */ -static const unsigned char SiS_LCDStruct661[] = { - /* 1024x768 */ -/* type|CR37| HDE | VDE | HT | VT | hss | hse */ - 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88, - 0x00,0x02,0x00,0x06,0x00,0x41,0x5A,0x64,0x00,0x00,0x00,0x00,0x04, - /* | vss | vse |clck| clock |CRT2DataP|CRT2DataP|idx */ - /* VESA non-VESA noscale */ - /* 1280x1024 */ - 0x03,0xC0,0x00,0x05,0x00,0x04,0x98,0x06,0x2A,0x04,0x30,0x00,0x70, - 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x08, - /* 1400x1050 */ - 0x09,0x20,0x78,0x05,0x1A,0x04,0x98,0x06,0x2A,0x04,0x18,0x00,0x38, - 0x00,0x01,0x00,0x03,0x00,0x6C,0xF8,0x2F,0x00,0x00,0x00,0x00,0x09, - /* 1600x1200 */ - 0x0B,0xE0,0x40,0x06,0xB0,0x04,0x70,0x08,0xE2,0x04,0x40,0x00,0xC0, - 0x00,0x01,0x00,0x03,0x00,0xA2,0x70,0x24,0x00,0x00,0x00,0x00,0x0A, - /* 1280x768 (_2) */ - 0x0A,0xE0,0x00,0x05,0x00,0x03,0x7C,0x06,0x26,0x03,0x30,0x00,0x70, - 0x00,0x03,0x00,0x06,0x00,0x4D,0xC8,0x48,0x00,0x00,0x00,0x00,0x06, - /* 1280x720 */ - 0x0E,0xE0,0x00,0x05,0xD0,0x02,0x80,0x05,0x26,0x03,0x10,0x00,0x20, - 0x00,0x01,0x00,0x06,0x00,0x45,0x9C,0x62,0x00,0x00,0x00,0x00,0x05, - /* 1280x800 (_2) */ - 0x0C,0xE0,0x00,0x05,0x20,0x03,0x10,0x06,0x2C,0x03,0x30,0x00,0x70, - 0x00,0x04,0x00,0x03,0x00,0x49,0xCE,0x1E,0x00,0x00,0x00,0x00,0x09, - /* 1680x1050 */ - 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C, - 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06, - /* 1280x800_3 */ - 0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50, - 0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07, - /* 800x600 */ - 0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80, - 0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00, - /* 1280x854 */ - 0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70, - 0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08 -}; -#endif - -#ifdef CONFIG_FB_SIS_300 -static unsigned char SiS300_TrumpionData[14][80] = { - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, - 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23, - 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xBC,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x09,0x04,0x04,0x05, - 0x04,0x0C,0x09,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5A,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x27,0x00,0x80,0x02, - 0x20,0x03,0x07,0x00,0x5E,0x01,0x0D,0x02,0x60,0x0C,0x30,0x11,0x00,0x00,0x04,0x23, - 0x00,0x00,0x03,0x80,0x03,0x28,0x06,0x08,0x40,0x11,0x00,0x11,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0x90,0x01,0xFF,0x0F,0xF4,0x19,0x01,0x00,0x05,0x01,0x00,0x04,0x05, - 0x04,0x0C,0x02,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEC,0x57,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02, - 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, - 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xD9,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, - 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x59,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02, - 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, - 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, - 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, - 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05, - 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03, - 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D, - 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D, - 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B, - 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04, - 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01, - 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 }, - /* variant 2 */ - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, - 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05, - 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, - 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05, - 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02, - 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, - 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, - 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02, - 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23, - 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05, - 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, - 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05, - 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03, - 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D, - 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D, - 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B, - 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }, - { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04, - 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23, - 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23, - 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01, - 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 } -}; -#endif - void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); @@ -375,16 +94,11 @@ unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax); void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char orval,unsigned short andval); #ifdef CONFIG_FB_SIS_315 -static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr); -static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr); -static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr); -static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr); void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr); void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); #endif /* 315 */ #ifdef CONFIG_FB_SIS_300 -static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); #endif @@ -394,40 +108,6 @@ unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, i unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer, unsigned int VBFlags2); -static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, - int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, - bool checkcr32, unsigned int VBFlags2); -static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); -static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, - unsigned char *buffer); -static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr); -static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr); -static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr); -static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr); -static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr); -static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr); -static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax); -static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr); -static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr); -static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr); -static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr); -static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno); -static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr); - -#ifdef CONFIG_FB_SIS_300 -static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr, - unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex); -static void SetOEMLCDData2(struct SiS_Private *SiS_Pr, - unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex); -#endif -#ifdef CONFIG_FB_SIS_315 -static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr, - unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); -static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr, - unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI); -static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short); -#endif - extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr); extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr); extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *); diff --git a/drivers/video/fbdev/sis/sis.h b/drivers/video/fbdev/sis/sis.h index ea1d1c9640bf..d04982b0cd6f 100644 --- a/drivers/video/fbdev/sis/sis.h +++ b/drivers/video/fbdev/sis/sis.h @@ -28,6 +28,7 @@ #include "vgatypes.h" #include "vstruct.h" +#include "init.h" #define VER_MAJOR 1 #define VER_MINOR 8 @@ -321,6 +322,85 @@ u8 SiS_GetRegByte(SISIOADDRESS); u16 SiS_GetRegShort(SISIOADDRESS); u32 SiS_GetRegLong(SISIOADDRESS); +/* Chrontel TV, DDC and DPMS functions */ +/* from init.c */ +bool SiSInitPtr(struct SiS_Private *SiS_Pr); +unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, bool FSTN, + unsigned short CustomT, int LCDwith, int LCDheight, + unsigned int VBFlags2); +unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, unsigned int VBFlags2); +unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, unsigned int VBFlags2); + +void SiS_DisplayOn(struct SiS_Private *SiS_Pr); +void SiS_DisplayOff(struct SiS_Private *SiS_Pr); +void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); +void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); +void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); +unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); + +bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, + unsigned short *ModeIdIndex); +unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); +unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide); +unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo, + unsigned short ModeIdIndex, unsigned short RRTI); +#ifdef CONFIG_FB_SIS_300 +void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1, + unsigned short *idx2); +unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2); +unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index); +#endif +void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); +bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); +void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); +void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, + int yres, struct fb_var_screeninfo *var, bool writeres); + +/* From init301.c: */ +extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex, int chkcrt2mode); +extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr); +extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); +extern void SiS_DisableBridge(struct SiS_Private *); +extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short); +extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); +extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex); +extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); +extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, + unsigned short ModeIdIndex, unsigned short RRTI); +extern bool SiS_IsVAMode(struct SiS_Private *); +extern bool SiS_IsDualEdge(struct SiS_Private *); + +#ifdef CONFIG_FB_SIS_300 +extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); +extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, + unsigned int val); +#endif +#ifdef CONFIG_FB_SIS_315 +extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, + unsigned char val); +extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); +#endif + + /* MMIO access macros */ #define MMIO_IN8(base, offset) readb((base+offset)) #define MMIO_IN16(base, offset) readw((base+offset)) @@ -583,4 +663,55 @@ struct sis_video_info { struct sis_video_info *next; }; +/* from sis_accel.c */ +extern void fbcon_sis_fillrect(struct fb_info *info, + const struct fb_fillrect *rect); +extern void fbcon_sis_copyarea(struct fb_info *info, + const struct fb_copyarea *area); +extern int fbcon_sis_sync(struct fb_info *info); + +/* Internal 2D accelerator functions */ +extern int sisfb_initaccel(struct sis_video_info *ivideo); +extern void sisfb_syncaccel(struct sis_video_info *ivideo); + +/* Internal general routines */ +#ifdef CONFIG_FB_SIS_300 +unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); +void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val); +unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg); +#endif +#ifdef CONFIG_FB_SIS_315 +void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val); +unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); +#endif + +/* SiS-specific exported functions */ +void sis_malloc(struct sis_memreq *req); +void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req); +void sis_free(u32 base); +void sis_free_new(struct pci_dev *pdev, u32 base); + +/* Routines from init.c/init301.c */ +extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, bool FSTN, unsigned short CustomT, + int LCDwith, int LCDheight, unsigned int VBFlags2); +extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, unsigned int VBFlags2); +extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, + int VDisplay, int Depth, unsigned int VBFlags2); +extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); +extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); +extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); +extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); + +extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); + +extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, + int *htotal, int *vtotal, unsigned char rateindex); +extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, + unsigned char modeno, unsigned char rateindex); +extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, + unsigned char rateindex, struct fb_var_screeninfo *var); + + #endif diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c index ecdd054d8951..20aff9005978 100644 --- a/drivers/video/fbdev/sis/sis_main.c +++ b/drivers/video/fbdev/sis/sis_main.c @@ -56,15 +56,66 @@ #include "sis.h" #include "sis_main.h" +#include "init301.h" #if !defined(CONFIG_FB_SIS_300) && !defined(CONFIG_FB_SIS_315) #warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set #warning sisfb will not work! #endif +/* ---------------------- Prototypes ------------------------- */ + +/* Interface used by the world */ +#ifndef MODULE +static int sisfb_setup(char *options); +#endif + +/* Interface to the low level console driver */ +static int sisfb_init(void); + +/* fbdev routines */ +static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, + struct fb_info *info); + +static int sisfb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg); +static int sisfb_set_par(struct fb_info *info); +static int sisfb_blank(int blank, + struct fb_info *info); + static void sisfb_handle_command(struct sis_video_info *ivideo, struct sisfb_cmd *sisfb_command); +static void sisfb_search_mode(char *name, bool quiet); +static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); +static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, + int index); +static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *fb_info); +static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, + struct fb_info *info); +static void sisfb_pre_setmode(struct sis_video_info *ivideo); +static void sisfb_post_setmode(struct sis_video_info *ivideo); +static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo); +static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo); +static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo); +static bool sisfb_bridgeisslave(struct sis_video_info *ivideo); +static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); +static void sisfb_get_VB_type(struct sis_video_info *ivideo); +static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); +static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val); + +/* Internal heap routines */ +static int sisfb_heap_init(struct sis_video_info *ivideo); +static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap); +static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size); +static void sisfb_delete_node(struct SIS_OH *poh); +static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh); +static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base); +static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh); + + /* ------------------ Internal helper routines ----------------- */ static void __init diff --git a/drivers/video/fbdev/sis/sis_main.h b/drivers/video/fbdev/sis/sis_main.h index 32e23c209430..d8ba07061f1e 100644 --- a/drivers/video/fbdev/sis/sis_main.h +++ b/drivers/video/fbdev/sis/sis_main.h @@ -661,121 +661,4 @@ static struct _customttable { } }; -/* ---------------------- Prototypes ------------------------- */ - -/* Interface used by the world */ -#ifndef MODULE -static int sisfb_setup(char *options); #endif - -/* Interface to the low level console driver */ -static int sisfb_init(void); - -/* fbdev routines */ -static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); - -static int sisfb_ioctl(struct fb_info *info, unsigned int cmd, - unsigned long arg); -static int sisfb_set_par(struct fb_info *info); -static int sisfb_blank(int blank, - struct fb_info *info); -extern void fbcon_sis_fillrect(struct fb_info *info, - const struct fb_fillrect *rect); -extern void fbcon_sis_copyarea(struct fb_info *info, - const struct fb_copyarea *area); -extern int fbcon_sis_sync(struct fb_info *info); - -/* Internal 2D accelerator functions */ -extern int sisfb_initaccel(struct sis_video_info *ivideo); -extern void sisfb_syncaccel(struct sis_video_info *ivideo); - -/* Internal general routines */ -static void sisfb_search_mode(char *name, bool quiet); -static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); -static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, - int index); -static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *fb_info); -static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, - struct fb_info *info); -static void sisfb_pre_setmode(struct sis_video_info *ivideo); -static void sisfb_post_setmode(struct sis_video_info *ivideo); -static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo); -static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo); -static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo); -static bool sisfb_bridgeisslave(struct sis_video_info *ivideo); -static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); -static void sisfb_get_VB_type(struct sis_video_info *ivideo); -static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); -static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val); -#ifdef CONFIG_FB_SIS_300 -unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg); -void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val); -unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg); -#endif -#ifdef CONFIG_FB_SIS_315 -void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val); -unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg); -#endif - -/* SiS-specific exported functions */ -void sis_malloc(struct sis_memreq *req); -void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req); -void sis_free(u32 base); -void sis_free_new(struct pci_dev *pdev, u32 base); - -/* Internal heap routines */ -static int sisfb_heap_init(struct sis_video_info *ivideo); -static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap); -static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size); -static void sisfb_delete_node(struct SIS_OH *poh); -static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh); -static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base); -static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh); - -/* Routines from init.c/init301.c */ -extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, bool FSTN, unsigned short CustomT, - int LCDwith, int LCDheight, unsigned int VBFlags2); -extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, unsigned int VBFlags2); -extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, unsigned int VBFlags2); -extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); -extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); -extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); -extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); - -extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); - -extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, - int *htotal, int *vtotal, unsigned char rateindex); -extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, - unsigned char modeno, unsigned char rateindex); -extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, - unsigned char rateindex, struct fb_var_screeninfo *var); - -/* Chrontel TV, DDC and DPMS functions */ -extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg); -extern void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); -extern unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg); -extern void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val); -extern void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg, - unsigned char myor, unsigned char myand); -extern void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime); -extern void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); -extern unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, - unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer, - unsigned int VBFlags2); -extern unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr); -#ifdef CONFIG_FB_SIS_315 -extern void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr); -extern void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); -#endif -extern void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); -extern void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); -#endif - - -- 2.9.0

2 1

[PATCH] video: remove unused kconfig SH_LCD_MIPI_DSI
by Corentin Labbe 12 Mar '18

12 Mar '18

SH_LCD_MIPI_DSI is unused since commit 18b6562c243f ("fbdev: sh_mipi_dsi: remove driver") So no need to keep it. Fixes: 18b6562c243f ("fbdev: sh_mipi_dsi: remove driver") Signed-off-by: Corentin Labbe <clabbe.montjoie(a)gmail.com> --- drivers/video/Kconfig | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 3c20af999893..429f15b2b51a 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -8,9 +8,6 @@ menu "Graphics support" config HAVE_FB_ATMEL bool -config SH_LCD_MIPI_DSI - bool - source "drivers/char/agp/Kconfig" source "drivers/gpu/vga/Kconfig" -- 2.13.6

2 1

[PATCH v6 0/9] Aspect ratio support in DRM layer
by Nautiyal, Ankit K 12 Mar '18

12 Mar '18

From: Ankit Nautiyal <ankit.k.nautiyal(a)intel.com> This patch series is a re-attempt to enable aspect ratio support in DRM layer. Currently the aspect ratio information gets lost in translation during a user->kernel mode or vice versa. The old patch series (https://pw-emeril.freedesktop.org/series/10850/) had 4 patches, out of which 2 patches were reverted due to lack of drm client protection while loading the aspect information. This patch series also includes 3 patches from Ville Syrjälä's series for 'Info-frame cleanup and fixes' https://patchwork.freedesktop.org/series/33730/ which fixes the mode matching mechanism via flags. This patch series, adds a DRM client option for aspect ratio, and loads aspect ratio flags, only when the client sets this cap. To test this patch, the testdiplay IGT test is modified to have an option to do a modeset with only aspect ratio modes. Also, there is a userspace implementation in Wayland/weston layer: https://patchwork.freedesktop.org/patch/188125/ (Which is already ACK'ed by wayland community.) This, helps us in passing HDMI compliance test cases like 7-27, where the test equipment applies a CEA mode, and expects the exact VIC in the AVI infoframes. Ankit Nautiyal (4): drm: Add DRM client cap for aspect-ratio drm: Handle aspect-ratio info in getblob drm: Handle aspect ratio info in legacy and atomic modeset paths drm: Expose modes with aspect ratio, only if requested Sharma, Shashank (2): drm: Add aspect ratio parsing in DRM layer drm: Add and handle new aspect ratios in DRM layer Ville Syrjälä (3): drm/modes: Introduce drm_mode_match() drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy drm/edid: Fix cea mode aspect ratio handling drivers/gpu/drm/drm_atomic.c | 36 ++++-- drivers/gpu/drm/drm_atomic_helper.c | 6 +- drivers/gpu/drm/drm_connector.c | 40 ++++++- drivers/gpu/drm/drm_crtc.c | 8 ++ drivers/gpu/drm/drm_crtc_internal.h | 3 +- drivers/gpu/drm/drm_edid.c | 18 ++- drivers/gpu/drm/drm_fb_helper.c | 12 +- drivers/gpu/drm/drm_ioctl.c | 5 + drivers/gpu/drm/drm_mode_object.c | 9 +- drivers/gpu/drm/drm_modes.c | 223 +++++++++++++++++++++++++++++++----- drivers/gpu/drm/drm_property.c | 5 + include/drm/drm_atomic.h | 5 +- include/drm/drm_file.h | 8 ++ include/drm/drm_modes.h | 13 +++ include/drm/drm_property.h | 2 + include/uapi/drm/drm.h | 7 ++ include/uapi/drm/drm_mode.h | 6 + 17 files changed, 346 insertions(+), 60 deletions(-) -- 2.7.4

3 15

[PATCH v2 00/42] drm/i915: Implement HDCP2.2
by Ramalingam C 12 Mar '18

12 Mar '18

Based on HDCP1.4 framework introduced by Sean Paul, this series implements the HDCP2.2 in I915. The sequence for HDCP2.2 authentication and encryption is implemented in I915. Encoder specific implementations are moved into hdcp_shim. Intel HWs supports HDCP2.2 through ME FW. Hence this series introduces a client driver for mei bus, so that for HDCP2.2 authentication, HDCP2.2 stack in I915 can avail the services from ME FW. Userspace interface remains unchanged as version agnostic. When userspace request for HDCP enable, Kernel will detect the HDCP source and sink's HDCP version(1.4/2.2)capability and enable the best capable version for that combination. This series enables the HDCP2.2 for Type0 content streams. Yes its bit lengthy series. Please tolerate. Thanks Major Changes in v2: - Synchronous implementation of HDCP authentication [SeanPaul] - Removal of bit-fields usage.[Tomas and Jani] - Protecting the mei_interface handle with mutex [Chris] - Droped, added and squashed few patches - Extended hdcp_shim to support hdcp2.2 operations too. [SeanPaul] - Used Intel_wait_for_registers(), Where ever it is applicable.[Chris] - mei_hdcp driver is moved into drivers/misc/mei/hdcp/ [Tomas] - Adapted the static declaration for struct intel_hdcp and mei_hdcp_data. [SeanPaul] Sincere thanks for Sean Paul, Jani Nikula, Chris Wilson and Tomas Winkler for the review comments on v1 series. Ramalingam C (41): drm: hdcp2.2 authentication msg definitions drm: HDMI and DP specific HDCP2.2 defines misc/mei/hdcp: Client driver for HDCP application misc/mei/hdcp: Add KBuild for mei hdcp driver misc/mei/hdcp: Verify mei client device status misc/mei/hdcp: Get & Put for mei cl_device misc/mei/hdcp: Define ME FW interface for HDCP2.2 linux/mei: Header for mei_hdcp driver interface misc/mei/hdcp: Initiate Wired HDCP2.2 Tx Session misc/mei/hdcp: Verify Receiver Cert and prepare km misc/mei/hdcp: Verify H_prime misc/mei/hdcp: Store the HDCP Pairing info misc/mei/hdcp: Initiate Locality check misc/mei/hdcp: Verify L_prime misc/mei/hdcp: Prepare Session Key misc/mei/hdcp: Repeater topology verifcation and ack misc/mei/hdcp: Verify M_prime misc/mei/hdcp: Enabling the HDCP authentication misc/mei/hdcp: Closing wired HDCP2.2 Tx Session drm/i915: wrapping all hdcp var into intel_hdcp drm/i915: Define HDCP2.2 related variables drm/i915: Define Intel HDCP2.2 registers drm/i915: Wrappers for mei HDCP2.2 services drm/i915: Implement HDCP2.2 receiver authentication drm/i915: Implement HDCP2.2 repeater authentication drm/i915: Enable and Disable HDCP2.2 port encryption drm/i915: Implement HDCP2.2 En/Dis-able drm/i915: Implement HDCP2.2 link integrity check drm/i915: Handle HDCP2.2 downstream topology change drm/i915: Pullout the bksv read and validation drm/i915: Initialize HDCP2.2 and its MEI interface drm/i915: Schedule hdcp_check_link in _intel_hdcp_enable drm/i915: Enable superior HDCP ver that is capable drm/i915: Enable HDCP1.4 incase of HDCP2.2 failure drm/i915: hdcp_check_link only on CP_IRQ drm/i915: Check HDCP 1.4 and 2.2 link on CP_IRQ drm/i915: Implement gmbus burst read drm/i915: Implement the HDCP2.2 support for DP drm/i915: Implement the HDCP2.2 support for HDMI drm/i915: Add HDCP2.2 support for DP connectors drm/i915: Add HDCP2.2 support for HDMI connectors Tomas Winkler (1): mei: bus: whitelist hdcp client drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 9 + drivers/gpu/drm/i915/i915_reg.h | 35 ++ drivers/gpu/drm/i915/intel_display.c | 7 +- drivers/gpu/drm/i915/intel_dp.c | 362 ++++++++++- drivers/gpu/drm/i915/intel_drv.h | 81 ++- drivers/gpu/drm/i915/intel_hdcp.c | 1107 ++++++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_hdmi.c | 206 ++++++- drivers/gpu/drm/i915/intel_i2c.c | 124 +++- drivers/misc/mei/Kconfig | 6 + drivers/misc/mei/Makefile | 2 + drivers/misc/mei/bus-fixup.c | 16 + drivers/misc/mei/hdcp/Makefile | 6 + drivers/misc/mei/hdcp/mei_hdcp.c | 927 ++++++++++++++++++++++++++++ drivers/misc/mei/hdcp/mei_hdcp.h | 566 +++++++++++++++++ include/drm/drm_dp_helper.h | 54 ++ include/drm/drm_hdcp.h | 220 +++++++ include/linux/mei_hdcp.h | 215 +++++++ 18 files changed, 3846 insertions(+), 98 deletions(-) create mode 100644 drivers/misc/mei/hdcp/Makefile create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.c create mode 100644 drivers/misc/mei/hdcp/mei_hdcp.h create mode 100644 include/linux/mei_hdcp.h -- 2.7.4

3 60

[PATCH v3] drm/panel: simple: Add TVC S9700RTWV43TR-01B 800x480 panel support
by Jyri Sarha 12 Mar '18

12 Mar '18

Add support for TVC S9700RTWV43TR-01B 800x480 panel found on TI's AM335X-EVM. Signed-off-by: Jyri Sarha <jsarha(a)ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen(a)ti.com> cc: Thierry Reding <thierry.reding(a)gmail.com> --- drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 5591984..63ccf3d 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1962,6 +1962,29 @@ static const struct panel_desc tpk_f10a_0102 = { }, }; +static const struct drm_display_mode tvc_s9700rtwv43tr_01b_mode = { + .clock = 30000, + .hdisplay = 800, + .hsync_start = 800 + 39, + .hsync_end = 800 + 39 + 47, + .htotal = 800 + 39 + 47 + 39, + .vdisplay = 480, + .vsync_start = 480 + 13, + .vsync_end = 480 + 13 + 2, + .vtotal = 480 + 13 + 2 + 29, + .vrefresh = 62, +}; + +static const struct panel_desc tvc_s9700rtwv43tr_01b = { + .modes = &tvc_s9700rtwv43tr_01b_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 155, + .height = 90, + }, +}; + static const struct display_timing urt_umsh_8596md_timing = { .pixelclock = { 33260000, 33260000, 33260000 }, .hactive = { 800, 800, 800 }, @@ -2214,6 +2237,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "tpk,f10a-0102", .data = &tpk_f10a_0102, }, { + .compatible = "tvc,s9700rtwv43tr-01b", + .data = &tvc_s9700rtwv43tr_01b, + }, { .compatible = "urt,umsh-8596md-t", .data = &urt_umsh_8596md_parallel, }, { -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

2 3

[PATCH] drm/sun4i: Fix exclusivity of the TCON clocks
by megous＠megous.com 12 Mar '18

12 Mar '18

From: Ondrej Jirman <megous(a)megous.com> Currently the exclusivity is enabled when the rate is set by the mode setting functions. These functions are called by mode_set_nofb callback of drm_crc_helper. Then exclusivity is disabled when tcon is disabled by atomic_disable callback. What happens is that mode_set_nofb can be called once when mode chnages, and afterwards the system can call atomic_enable and atomic_disable multiple times without further calls to mode_set_nofb. This happens: mode_set_nofb - clk exclusivity is enabled atomic_enable atomic_disable - clk exclusivity is disabled atomic_enable atomic_disable - clk exclusivity is already disabled, leading to WARN in clk_rate_exclusive_put Solution is to enable exclusivity in sun4i_tcon_channel_set_status. Signed-off-by: Ondrej Jirman <megous(a)megous.com> Cc: Jernej Skrabec <jernej.skrabec(a)siol.net> --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index d4a29847dadd..cc29daa062f7 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -104,6 +104,7 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, if (enabled) { clk_prepare_enable(clk); + clk_rate_exclusive_get(clk); } else { clk_rate_exclusive_put(clk); clk_disable_unprepare(clk); @@ -263,7 +264,7 @@ static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { /* Configure the dot clock */ - clk_set_rate_exclusive(tcon->dclk, mode->crtc_clock * 1000); + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); /* Set the resolution */ regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG, @@ -428,7 +429,7 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, WARN_ON(!tcon->quirks->has_channel_1); /* Configure the dot clock */ - clk_set_rate_exclusive(tcon->sclk1, mode->crtc_clock * 1000); + clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 1); -- 2.16.2

2 1

[PATCH] drm/sun4i: Fix an error handling path in 'sun4i_drv_bind()'
by Christophe JAILLET 12 Mar '18

12 Mar '18

Commit 070badfab767 ("drm/sun4i: call drm_vblank_init with correct number of crtcs") has moved some code without updating the error handling gotos accordingly. Branch to the correct label and remove a now unused lablel. Fixes: 070badfab767 ("drm/sun4i: call drm_vblank_init with correct number of crtcs") Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> --- drivers/gpu/drm/sun4i/sun4i_drv.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 4570da0227b4..d9a71f361b14 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -111,7 +111,7 @@ static int sun4i_drv_bind(struct device *dev) /* drm_vblank_init calls kcalloc, which can fail */ ret = drm_vblank_init(drm, drm->mode_config.num_crtc); if (ret) - goto free_mem_region; + goto cleanup_mode_config; drm->irq_enabled = true; @@ -139,7 +139,6 @@ static int sun4i_drv_bind(struct device *dev) sun4i_framebuffer_free(drm); cleanup_mode_config: drm_mode_config_cleanup(drm); -free_mem_region: of_reserved_mem_device_release(dev); free_drm: drm_dev_unref(drm); -- 2.14.1 --- L'absence de virus dans ce courrier électronique a été vérifiée par le logiciel antivirus Avast. https://www.avast.com/antivirus

2 1

[DPU PATCH] drm/msm: fix compilation warnings in display driver
by Sravanthi Kollukuduru 12 Mar '18

12 Mar '18

Fix the compilation warnings flagged in display driver. Signed-off-by: Sravanthi Kollukuduru <skolluku(a)codeaurora.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c | 4 ++-- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 36a4795..ccf25a3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -592,15 +592,12 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc, DPU_EVT32(kms->dev, stop_req, clk_rate); - /* Temp change to avoid crash in clk_set_rate API. */ -#ifdef QCOM_DPU_SET_CLK if (dpu_power_clk_set_rate(&priv->phandle, kms->perf.clk_name, clk_rate)) { DPU_ERROR("failed to set %s clock rate %llu\n", kms->perf.clk_name, clk_rate); return; } -#endif kms->perf.core_clk_rate = clk_rate; DPU_DEBUG("update clk rate = %lld HZ\n", clk_rate); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c index bb45477..e0d46c5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_reg_dma_v1.c @@ -374,7 +374,7 @@ static int validate_dma_cfg(struct dpu_reg_dma_setup_ops_cfg *cfg) } if (cfg->dma_buf->iova & GUARD_BYTES || !cfg->dma_buf->vaddr) { - DRM_ERROR("iova not aligned to %zx iova %x kva %pK", + DRM_ERROR("iova not aligned to %zx iova %llx kva %pK", ADDR_ALIGN, cfg->dma_buf->iova, cfg->dma_buf->vaddr); return -EINVAL; @@ -433,7 +433,7 @@ static int validate_kick_off_v1(struct dpu_reg_dma_kickoff_cfg *cfg) (WRITE_TRIGGER); if (cfg->dma_buf->iova & GUARD_BYTES) { - DRM_ERROR("Address is not aligned to %zx iova %x", ADDR_ALIGN, + DRM_ERROR("Address is not aligned to %zx iova %llx", ADDR_ALIGN, cfg->dma_buf->iova); return -EINVAL; } -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

1 0

[PATCH] drm/panel: Add support for AUO G104SN02 V2 panel
by Christoph Fritz 12 Mar '18

12 Mar '18

This patch adds support for AUO G104SN02 V2 800x600 10.4" panel to DRM simple panel driver. Signed-off-by: Christoph Fritz <chf.fritz(a)googlemail.com> Signed-off-by: Stefan Riedmueller <s.riedmueller(a)phytec.de> --- .../bindings/display/panel/auo,g104sn02.txt | 7 ++++++ drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt diff --git a/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt new file mode 100644 index 0000000..050ac90 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt @@ -0,0 +1,7 @@ +AU Optronics Corporation 10.4" (800x600) color TFT LCD panel + +Required properties: +- compatible: should be "auo,g104sn02" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 234af81..f4cc876 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -582,6 +582,29 @@ static const struct panel_desc auo_b133htn01 = { }, }; +static const struct drm_display_mode auo_g104sn02_mode = { + .clock = 40000, + .hdisplay = 800, + .hsync_start = 800 + 40, + .hsync_end = 800 + 40 + 216, + .htotal = 800 + 40 + 216 + 128, + .vdisplay = 600, + .vsync_start = 600 + 10, + .vsync_end = 600 + 10 + 35, + .vtotal = 600 + 10 + 35 + 2, + .vrefresh = 60, +}; + +static const struct panel_desc auo_g104sn02 = { + .modes = &auo_g104sn02_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 211, + .height = 158, + }, +}; + static const struct display_timing auo_g133han01_timings = { .pixelclock = { 134000000, 141200000, 149000000 }, .hactive = { 1920, 1920, 1920 }, @@ -1965,6 +1988,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "auo,b133xtn01", .data = &auo_b133xtn01, }, { + .compatible = "auo,g104sn02", + .data = &auo_g104sn02, + }, { .compatible = "auo,g133han01", .data = &auo_g133han01, }, { -- 2.1.4

3 4

[PATCH -next] drm/panel: ili9322：Make local symbols static
by Wei Yongjun 12 Mar '18

12 Mar '18

Fixes the following sparse warnings: drivers/gpu/drm/panel/panel-ilitek-ili9322.c:182:12: warning: symbol 'ili9322_inputs' was not declared. Should it be static? drivers/gpu/drm/panel/panel-ilitek-ili9322.c:343:28: warning: symbol 'ili9322_regmap_config' was not declared. Should it be static? Also change ili9322_inputs to 'const char * const' to avoid chackpatch warning. Signed-off-by: Wei Yongjun <weiyongjun1(a)huawei.com> --- drivers/gpu/drm/panel/panel-ilitek-ili9322.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c index b4ec0ec..bd38bf4 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c @@ -179,7 +179,7 @@ enum ili9322_input { ILI9322_INPUT_UNKNOWN = 0xc, }; -const char *ili9322_inputs[] = { +static const char * const ili9322_inputs[] = { "8 bit serial RGB through", "8 bit serial RGB aligned", "8 bit serial RGB dummy 320x240", @@ -340,7 +340,7 @@ static bool ili9322_writeable_reg(struct device *dev, unsigned int reg) return true; } -const struct regmap_config ili9322_regmap_config = { +static const struct regmap_config ili9322_regmap_config = { .reg_bits = 8, .val_bits = 8, .max_register = 0x44,

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dri-devel March 2018