dri-devel August 2019

dri-devel@lists.freedesktop.org

318 participants
2338 discussions

[GIT PULL] mediatek drm fixes for 5.3
by CK Hu 20 Aug '19

20 Aug '19

Hi Dave, Daniel: This include PRIME buffer and of_node fixes. Regards, CK The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b: Linus 5.3-rc1 (2019-07-21 14:05:38 -0700) are available in the Git repository at: https://github.com/ckhu-mediatek/linux.git-tags tags/mediatek-drm-fixes-5.3 for you to fetch changes up to 165d42c012be69900f0e2f8545626cb9e7d4a832: drm/mediatek: mtk_drm_drv.c: Add of_node_put() before goto (2019-08-19 07:09:29 +0800) ---------------------------------------------------------------- Mediatek drm fixes for Linux 5.3 ---------------------------------------------------------------- Alexandre Courbot (2): drm/mediatek: use correct device to import PRIME buffers drm/mediatek: set DMA max segment size Nishka Dasgupta (1): drm/mediatek: mtk_drm_drv.c: Add of_node_put() before goto drivers/gpu/drm/mediatek/mtk_drm_drv.c | 54 +++++++++++++++++++++++++++++++--- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++ 2 files changed, 52 insertions(+), 4 deletions(-)

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Re: [RFC PATCH 09/11] devfreq: exynos-bus: Add interconnect functionality to exynos-bus
by Chanwoo Choi 19 Aug '19

19 Aug '19

Hi, On 19. 7. 23. 오후 9:20, Artur Świgoń wrote: > This patch adds interconnect functionality to the exynos-bus devfreq > driver. > > The SoC topology is a graph (or, more specifically, a tree) and most of its > edges are taken from the devfreq parent-child hierarchy (cf. > Documentation/devicetree/bindings/devfreq/exynos-bus.txt). The previous > patch adds missing edges to the DT (under the name 'parent'). Due to > unspecified relative probing order, -EPROBE_DEFER may be propagated to > guarantee that a child is probed before its parent. > > Each bus is now an interconnect provider and an interconnect node as well > (cf. Documentation/interconnect/interconnect.rst), i.e. every bus registers > itself as a node. Node IDs are not hardcoded but rather assigned at > runtime, in probing order (subject to the above-mentioned exception > regarding relative order). This approach allows for using this driver with > various Exynos SoCs. > > The devfreq target() callback provided by exynos-bus now selects either the > frequency calculated by the devfreq governor or the frequency requested via > the interconnect API for the given node, whichever is higher. Basically, I agree to support the QoS requirement between devices. But, I think that need to consider the multiple cases. 1. When changing the devfreq governor by user, For example of the connection between bus_dmc/leftbus/display on patch8, there are possible multiple cases with various devfreq governor which is changed on the runtime by user through sysfs interface. If users changes the devfreq governor as following: Before, - bus_dmc (simple_ondemand, available frequency 100/200/300/400 MHz) --> bus_leftbus(simple_ondemand, available frequency 100/200/300/400 MHz) ----> bus_display(passive) After changed governor of bus_dmc, if the min_freq by interconnect requirement is 400Mhz, - bus_dmc (powersave) : min_freq and max_freq and cur_freq is 100MHz --> bus_leftbus(simple_ondemand) : cur_freq is 400Mhz ----> bus_display(passive) The final frequency is 400MHz of bus_dmc even if the min_freq/max_freq/cur_freq is 100MHz. It cannot show the correct min_freq/max_freq through devfreq sysfs interface. 2. When disabling the some frequency by devfreq-thermal throttling, This patch checks the min_freq of interconnect requirement in the exynos_bus_target() and exynos_bus_passive_target(). Also, it cannot show the correct min_freq/max_freq through devfreq sysfs interface. For example of bus_dmc bus, - The available frequencies are 100MHz, 200MHz, 300MHz, 400MHz - Disable 400MHz by devfreq-thermal throttling - min_freq is 100MHz - max_freq is 300MHz - min_freq of interconnect is 400MHz In result, the final frequency is 400MHz by exynos_bus_target() There are no problem for working. But, the user cannot know reason why cur_freq is 400MHz even if max_freq is 300MHz. Basically, update_devfreq() considers the all constraints of min_freq/max_freq to decide the proper target frequency. 3. I think that the exynos_bus_passive_target() is used for devfreq device using 'passive' governor. The frequency already depends on the parent device. If already the parent devfreq device like bus_leftbus consider the minimum frequency of QoS requirement like interconnect, it is not necessary. The next frequency of devfreq device with 'passive' governor, it will apply the QoS requirement without any additional code. > > Please note that it is not an error when CONFIG_INTERCONNECT is 'n', in > which case all interconnect API functions are no-op. > > Signed-off-by: Artur Świgoń <a.swigon(a)partner.samsung.com> > --- > drivers/devfreq/exynos-bus.c | 145 +++++++++++++++++++++++++++++++++++ > 1 file changed, 145 insertions(+) > > diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c > index 412511ca7703..12fb7c84ae50 100644 > --- a/drivers/devfreq/exynos-bus.c > +++ b/drivers/devfreq/exynos-bus.c > @@ -14,6 +14,7 @@ > #include <linux/devfreq-event.h> > #include <linux/device.h> > #include <linux/export.h> > +#include <linux/interconnect-provider.h> > #include <linux/module.h> > #include <linux/of.h> > #include <linux/pm_opp.h> > @@ -23,6 +24,8 @@ > #define DEFAULT_SATURATION_RATIO 40 > #define DEFAULT_VOLTAGE_TOLERANCE 2 > > +#define icc_units_to_hz(x) ((x) * 1000UL / 8) > + > struct exynos_bus { > struct device *dev; > > @@ -31,12 +34,17 @@ struct exynos_bus { > unsigned int edev_count; > struct mutex lock; > > + unsigned long min_freq; > unsigned long curr_freq; > > struct regulator *regulator; > struct clk *clk; > unsigned int voltage_tolerance; > unsigned int ratio; > + > + /* One provider per bus, one node per provider */ > + struct icc_provider provider; > + struct icc_node *node; > }; > > /* > @@ -61,6 +69,13 @@ exynos_bus_ops_edev(enable_edev); > exynos_bus_ops_edev(disable_edev); > exynos_bus_ops_edev(set_event); > > +static int exynos_bus_next_id(void) > +{ > + static int exynos_bus_node_id; > + > + return exynos_bus_node_id++; > +} > + > static int exynos_bus_get_event(struct exynos_bus *bus, > struct devfreq_event_data *edata) > { > @@ -98,6 +113,8 @@ static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) > unsigned long old_freq, new_freq, new_volt, tol; > int ret = 0; > > + *freq = max(*freq, bus->min_freq); > + > /* Get new opp-bus instance according to new bus clock */ > new_opp = devfreq_recommended_opp(dev, freq, flags); > if (IS_ERR(new_opp)) { > @@ -208,6 +225,8 @@ static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, > unsigned long old_freq, new_freq; > int ret = 0; > > + *freq = max(*freq, bus->min_freq); > + > /* Get new opp-bus instance according to new bus clock */ > new_opp = devfreq_recommended_opp(dev, freq, flags); > if (IS_ERR(new_opp)) { > @@ -251,6 +270,35 @@ static void exynos_bus_passive_exit(struct device *dev) > clk_disable_unprepare(bus->clk); > } > > +static int exynos_bus_icc_set(struct icc_node *src, struct icc_node *dst) > +{ > + struct exynos_bus *src_bus = src->data, *dst_bus = dst->data; > + > + src_bus->min_freq = icc_units_to_hz(src->peak_bw); > + dst_bus->min_freq = icc_units_to_hz(dst->peak_bw); > + > + return 0; > +} > + > +static int exynos_bus_icc_aggregate(struct icc_node *node, u32 avg_bw, > + u32 peak_bw, u32 *agg_avg, u32 *agg_peak) > +{ > + *agg_peak = *agg_avg = peak_bw; > + > + return 0; > +} > + > +static struct icc_node *exynos_bus_icc_xlate(struct of_phandle_args *spec, > + void *data) > +{ > + struct exynos_bus *bus = data; > + > + if (spec->np != bus->dev->of_node) > + return ERR_PTR(-EINVAL); > + > + return bus->node; > +} > + > static int exynos_bus_parent_parse_of(struct device_node *np, > struct exynos_bus *bus) > { > @@ -469,6 +517,95 @@ static int exynos_bus_profile_init_passive(struct exynos_bus *bus, > return ret; > } > > +static int exynos_bus_icc_connect(struct exynos_bus *bus) > +{ > + struct device_node *np = bus->dev->of_node; > + struct devfreq *parent_devfreq; > + struct icc_node *parent_node = NULL; > + struct of_phandle_args args; > + int ret = 0; > + > + parent_devfreq = devfreq_get_devfreq_by_phandle(bus->dev, 0); > + if (!IS_ERR(parent_devfreq)) { > + struct exynos_bus *parent_bus; > + > + parent_bus = dev_get_drvdata(parent_devfreq->dev.parent); > + parent_node = parent_bus->node; > + } else { > + /* Look for parent in DT */ > + int num = of_count_phandle_with_args(np, "parent", > + "#interconnect-cells"); > + if (num != 1) > + goto out; > + > + ret = of_parse_phandle_with_args(np, "parent", > + "#interconnect-cells", > + 0, &args); > + if (ret < 0) > + goto out; > + > + of_node_put(args.np); > + > + parent_node = of_icc_get_from_provider(&args); > + if (IS_ERR(parent_node)) { > + /* May be -EPROBE_DEFER */ > + ret = PTR_ERR(parent_node); > + goto out; > + } > + } > + > + ret = icc_link_create(bus->node, parent_node->id); > + > +out: > + return ret; > +} > + > +static int exynos_bus_icc_init(struct exynos_bus *bus) > +{ > + struct device *dev = bus->dev; > + struct icc_provider *provider = &bus->provider; > + struct icc_node *node; > + int id, ret; > + > + /* Initialize the interconnect provider */ > + provider->set = exynos_bus_icc_set; > + provider->aggregate = exynos_bus_icc_aggregate; > + provider->xlate = exynos_bus_icc_xlate; > + provider->dev = dev; > + provider->data = bus; > + > + ret = icc_provider_add(provider); > + if (ret < 0) > + goto out; > + > + id = exynos_bus_next_id(); > + node = icc_node_create(id); > + if (IS_ERR(node)) { > + ret = PTR_ERR(node); > + goto err_node; > + } > + > + bus->node = node; > + node->name = dev->of_node->name; > + node->data = bus; > + icc_node_add(node, provider); > + > + ret = exynos_bus_icc_connect(bus); > + if (ret < 0) > + goto err_connect; > + > +out: > + return ret; > + > +err_connect: > + icc_node_del(node); > + icc_node_destroy(id); > +err_node: > + icc_provider_del(provider); > + > + return ret; > +} > + > static int exynos_bus_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -517,6 +654,14 @@ static int exynos_bus_probe(struct platform_device *pdev) > goto err; > } > > + /* > + * Initialize interconnect provider. A return value of -ENOTSUPP means > + * that CONFIG_INTERCONNECT is disabled. > + */ > + ret = exynos_bus_icc_init(bus); > + if (ret < 0 && ret != -ENOTSUPP) > + goto err; > + > max_state = bus->devfreq->profile->max_state; > min_freq = (bus->devfreq->profile->freq_table[0] / 1000); > max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000); > -- Best Regards, Chanwoo Choi Samsung Electronics

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[RESEND][PATCH v3 00/26] drm: Kirin driver cleanups to prep for Kirin960 support
by John Stultz 19 Aug '19

19 Aug '19

Just wanted to resend this patch set so I didn't have to continue carrying it forever to keep the HiKey960 board running. This patchset contains one fix (in the front, so its easier to eventually backport), and a series of changes from YiPing to refactor the kirin drm driver so that it can be used on both kirin620 based devices (like the original HiKey board) as well as kirin960 based devices (like the HiKey960 board). The full kirin960 drm support is still being refactored, but as this base kirin rework was getting to be substantial, I wanted to send out the first chunk, so that the review burden wasn't overwhelming. The full HiKey960 patch stack can be found here: https://git.linaro.org/people/john.stultz/android-dev.git/log/?h=dev/hikey9… thanks -john Cc: Rongrong Zou <zourongrong(a)gmail.com> Cc: Xinliang Liu <z.liuxinliang(a)hisilicon.com> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: dri-devel <dri-devel(a)lists.freedesktop.org> Cc: Sam Ravnborg <sam(a)ravnborg.org> Da Lv (1): drm: kirin: Fix for hikey620 display offset problem John Stultz (4): drm: kirin: Get rid of drmP.h includes drm: kirin: Remove HISI_KIRIN_DW_DSI config option drm: kirin: Remove unreachable return drm: kirin: Move workqueue to ade_hw_ctx structure Xu YiPing (21): drm: kirin: Remove uncessary parameter indirection drm: kirin: Remove out_format from ade_crtc drm: kirin: Rename ade_plane to kirin_plane drm: kirin: Rename ade_crtc to kirin_crtc drm: kirin: Dynamically allocate the hw_ctx drm: kirin: Move request irq handle in ade hw ctx alloc drm: kirin: Move kirin_crtc, kirin_plane, kirin_format to kirin_drm_drv.h drm: kirin: Reanme dc_ops to kirin_drm_data drm: kirin: Move ade crtc/plane help functions to driver_data drm: kirin: Move channel formats to driver data drm: kirin: Move mode config function to driver_data drm: kirin: Move plane number and primay plane in driver data drm: kirin: Move config max_width and max_height to driver data drm: kirin: Move drm driver to driver data drm: kirin: Add register connect helper functions in drm init drm: kirin: Rename plane_init and crtc_init drm: kirin: Fix dev->driver_data setting drm: kirin: Make driver_data variable non-global drm: kirin: Add alloc_hw_ctx/clean_hw_ctx ops in driver data drm: kirin: Pass driver data to crtc init and plane init drm: kirin: Move ade drm init to kirin drm drv drivers/gpu/drm/hisilicon/kirin/Kconfig | 10 +- drivers/gpu/drm/hisilicon/kirin/Makefile | 4 +- .../gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 1 + .../gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 360 +++++++----------- .../gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 257 +++++++++---- .../gpu/drm/hisilicon/kirin/kirin_drm_drv.h | 48 ++- 6 files changed, 379 insertions(+), 301 deletions(-) -- 2.17.1

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Re: linux-next: Tree for Aug 19 (gpu/drm/amd/display/)
by Randy Dunlap 19 Aug '19

19 Aug '19

On 8/19/19 2:18 AM, Stephen Rothwell wrote: > Hi all, > > Changes since 20190816: > on i386: ld: drivers/gpu/drm/amd/display/dc/core/dc_link.o: in function `wait_for_alt_mode': dc_link.c:(.text+0x1f38): undefined reference to `__udivdi3' ld: dc_link.c:(.text+0x1f71): undefined reference to `__udivdi3' -- ~Randy

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[PATCH] drm: Fix memory leaks
by Wenwen Wang 19 Aug '19

19 Aug '19

In drm_universal_plane_init(), if 'format_count' is larger than 64, no cleanup is executed, leading to memory/resource leaks. To fix this issue, perform cleanup work before returning -EINVAL. Signed-off-by: Wenwen Wang <wenwen(a)cs.uga.edu> --- drivers/gpu/drm/drm_plane.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index d6ad60a..2c0d0044 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -211,8 +211,11 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane, * First driver to need more than 64 formats needs to fix this. Each * format is encoded as a bit and the current code only supports a u64. */ - if (WARN_ON(format_count > 64)) + if (WARN_ON(format_count > 64)) { + kfree(plane->format_types); + drm_mode_object_unregister(dev, &plane->base); return -EINVAL; + } if (format_modifiers) { const uint64_t *temp_modifiers = format_modifiers; -- 2.7.4

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[PATCH 00/14] Display Stream Compression (DSC) for AMD Navi
by David Francis 19 Aug '19

19 Aug '19

This patchset enables Display Stream Compression (DSC) on DP connectors on Navi ASICs, both SST and DSC. 8k60 and 4k144 support requires ODM combine, an AMD internal feature that may be a bit buggy right now. Patches 1 through 5 enable DSC for SST. Most of the work was already done in the Navi promotion patches; this just hooks it up to the atomic interface. The first two reverts are of temporary changes to block off DSC. The third is of a commit that was accidentally promoted twice. The fourth and last revert fixes a potential issue with ODM combine. Patches 6 and 7 are fixes for bugs that would be exposed by MST DSC. One fix is with the MST code and the other in the DSC code. Patches 8, 9, and 10 are small DRM changes required for DSC MST: FEC, a new bit in the standard; some export definitions; and a previously uninitialized variable. Patches 11 through 14 are the DSC MST policy itself. This includes the code for detecting and validating DSC capabilities, enabling DSC over a link, computing the fair DSC configurations for multiple DSC displays, and adding to atomic state crtcs that might need reprogramming due to DSC. David Francis (14): Revert "drm/amd/display: skip dsc config for navi10 bring up" Revert "drm/amd/display: navi10 bring up skip dsc encoder config" Revert "drm/amd/display: add global master update lock for DCN2" Revert "drm/amd/display: Fix underscan not using proper scaling" drm/amd/display: Enable SST DSC in DM drm/amd/display: Use dc helpers to compute timeslot distribution drm/amd/display: Initialize DSC PPS variables to 0 drm/dp-mst: Parse FEC capability on MST ports drm/dp-mst: Export symbols for dpcd read/write drm/dp-mst: Fill branch->num_ports drm/amd/display: Validate DSC caps on MST endpoints drm/amd/display: Write DSC enable to MST DPCD drm/amd/display: MST DSC compute fair share drm/amd/display: Trigger modesets on MST DSC connectors .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 116 +++- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 71 +-- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 498 +++++++++++++++++- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 5 + drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +- .../drm/amd/display/dc/core/dc_link_hwss.c | 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 + .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 - .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 72 +-- .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.h | 3 - .../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 + .../display/dc/dcn20/dcn20_stream_encoder.c | 8 - .../amd/display/dc/inc/hw/timing_generator.h | 2 - drivers/gpu/drm/drm_dp_mst_topology.c | 6 + include/drm/drm_dp_mst_helper.h | 3 + 16 files changed, 668 insertions(+), 146 deletions(-) -- 2.17.1

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[PATCH] drm/i915: Select DMABUF_SELFTESTS for the default i915.ko debug build
by Chris Wilson 19 Aug '19

19 Aug '19

Include the DMABUF_SELFTESTS as part of the standard build for IGT, so that they can be run by igt/dmabuf Testcase: igt/dmabuf Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Tomi Sarvela <tomi.p.sarvela(a)intel.com> --- drivers/gpu/drm/i915/Kconfig.debug | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug index 87a38c6aaa41..00786a142ff0 100644 --- a/drivers/gpu/drm/i915/Kconfig.debug +++ b/drivers/gpu/drm/i915/Kconfig.debug @@ -30,6 +30,7 @@ config DRM_I915_DEBUG select DRM_VGEM # used by igt/prime_vgem (dmabuf interop checks) select DRM_DEBUG_MM if DRM=y select DRM_DEBUG_SELFTEST + select DMABUF_SELFTESTS select SW_SYNC # signaling validation framework (igt/syncobj*) select DRM_I915_SW_FENCE_DEBUG_OBJECTS select DRM_I915_SELFTEST -- 2.23.0.rc1

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[PATCH 1/3] dma-buf: Introduce selftesting framework
by Chris Wilson 19 Aug '19

19 Aug '19

In light of recent review slip ups, the absence of a suite of tests for dma-buf became apparent. Given the current plethora of testing frameworks, opt for one already in use by Intel's CI and so allow easy hook up into igt. We introduce a new module that when loaded will execute the list of selftests and their subtest. The names of the selftests are put into the modinfo as parameters so that igt can identify each, and run them independently, principally for ease of error reporting. Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Tomi Sarvela <tomi.p.sarvela(a)intel.com> --- drivers/dma-buf/Kconfig | 5 ++ drivers/dma-buf/Makefile | 3 + drivers/dma-buf/selftest.c | 167 ++++++++++++++++++++++++++++++++++++ drivers/dma-buf/selftest.h | 30 +++++++ drivers/dma-buf/selftests.h | 12 +++ 5 files changed, 217 insertions(+) create mode 100644 drivers/dma-buf/selftest.c create mode 100644 drivers/dma-buf/selftest.h create mode 100644 drivers/dma-buf/selftests.h diff --git a/drivers/dma-buf/Kconfig b/drivers/dma-buf/Kconfig index b6a9c2f1bc41..a23b6752d11a 100644 --- a/drivers/dma-buf/Kconfig +++ b/drivers/dma-buf/Kconfig @@ -39,4 +39,9 @@ config UDMABUF A driver to let userspace turn memfd regions into dma-bufs. Qemu can use this to create host dmabufs for guest framebuffers. +config DMABUF_SELFTESTS + tristate "Selftests for the dma-buf interfaces" + default n + depends on DMA_SHARED_BUFFER + endmenu diff --git a/drivers/dma-buf/Makefile b/drivers/dma-buf/Makefile index dcfb01e7c6f4..b5ae122a9349 100644 --- a/drivers/dma-buf/Makefile +++ b/drivers/dma-buf/Makefile @@ -4,3 +4,6 @@ obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \ obj-$(CONFIG_SYNC_FILE) += sync_file.o obj-$(CONFIG_SW_SYNC) += sw_sync.o sync_debug.o obj-$(CONFIG_UDMABUF) += udmabuf.o + +dmabuf_selftests-y := selftest.o +obj-$(CONFIG_DMABUF_SELFTESTS) += dmabuf_selftests.o diff --git a/drivers/dma-buf/selftest.c b/drivers/dma-buf/selftest.c new file mode 100644 index 000000000000..c60b6944b4bd --- /dev/null +++ b/drivers/dma-buf/selftest.c @@ -0,0 +1,167 @@ +/* SPDX-License-Identifier: MIT */ + +/* + * Copyright © 2019 Intel Corporation + */ + +#include <linux/compiler.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/sched/signal.h> +#include <linux/slab.h> + +#include "selftest.h" + +enum { +#define selftest(n, func) __idx_##n, +#include "selftests.h" +#undef selftest +}; + +#define selftest(n, f) [__idx_##n] = { .name = #n, .func = f }, +static struct selftest { + bool enabled; + const char *name; + int (*func)(void); +} selftests[] = { +#include "selftests.h" +}; +#undef selftest + +/* Embed the line number into the parameter name so that we can order tests */ +#define param(n) __PASTE(igt__, __PASTE(__PASTE(__LINE__, __), n)) +#define selftest_0(n, func, id) \ +module_param_named(id, selftests[__idx_##n].enabled, bool, 0400); +#define selftest(n, func) selftest_0(n, func, param(n)) +#include "selftests.h" +#undef selftest + +int __sanitycheck__(void) +{ + pr_debug("Hello World!\n"); + return 0; +} + +static char *__st_filter; + +static bool apply_subtest_filter(const char *caller, const char *name) +{ + char *filter, *sep, *tok; + bool result = true; + + filter = kstrdup(__st_filter, GFP_KERNEL); + for (sep = filter; (tok = strsep(&sep, ","));) { + bool allow = true; + char *sl; + + if (*tok == '!') { + allow = false; + tok++; + } + + if (*tok == '\0') + continue; + + sl = strchr(tok, '/'); + if (sl) { + *sl++ = '\0'; + if (strcmp(tok, caller)) { + if (allow) + result = false; + continue; + } + tok = sl; + } + + if (strcmp(tok, name)) { + if (allow) + result = false; + continue; + } + + result = allow; + break; + } + kfree(filter); + + return result; +} + +int +__subtests(const char *caller, const struct subtest *st, int count, void *data) +{ + int err; + + for (; count--; st++) { + cond_resched(); + if (signal_pending(current)) + return -EINTR; + + if (!apply_subtest_filter(caller, st->name)) + continue; + + pr_info("dma-buf: Running %s/%s\n", caller, st->name); + + err = st->func(data); + if (err && err != -EINTR) { + pr_err("dma-buf/%s: %s failed with error %d\n", + caller, st->name, err); + return err; + } + } + + return 0; +} + +static void set_default_test_all(struct selftest *st, unsigned long count) +{ + unsigned long i; + + for (i = 0; i < count; i++) + if (st[i].enabled) + return; + + for (i = 0; i < count; i++) + st[i].enabled = true; +} + +static int run_selftests(struct selftest *st, unsigned long count) +{ + int err = 0; + + set_default_test_all(st, count); + + /* Tests are listed in natural order in selftests.h */ + for (; count--; st++) { + if (!st->enabled) + continue; + + pr_info("dma-buf: Running %s\n", st->name); + err = st->func(); + if (err) + break; + } + + if (WARN(err > 0 || err == -ENOTTY, + "%s returned %d, conflicting with selftest's magic values!\n", + st->name, err)) + err = -1; + + return err; +} + +static int __init st_init(void) +{ + return run_selftests(selftests, ARRAY_SIZE(selftests)); +} + +static void __exit st_exit(void) +{ +} + +module_param_named(st_filter, __st_filter, charp, 0400); +module_init(st_init); +module_exit(st_exit); + +MODULE_DESCRIPTION("Self-test harness for dma-buf"); +MODULE_LICENSE("GPL and additional rights"); diff --git a/drivers/dma-buf/selftest.h b/drivers/dma-buf/selftest.h new file mode 100644 index 000000000000..45793aff6142 --- /dev/null +++ b/drivers/dma-buf/selftest.h @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: MIT + +/* + * Copyright © 2019 Intel Corporation + */ + +#ifndef __SELFTEST_H__ +#define __SELFTEST_H__ + +#include <linux/compiler.h> + +#define selftest(name, func) int func(void); +#include "selftests.h" +#undef selftest + +struct subtest { + int (*func)(void *data); + const char *name; +}; + +int __subtests(const char *caller, + const struct subtest *st, + int count, + void *data); +#define subtests(T, data) \ + __subtests(__func__, T, ARRAY_SIZE(T), data) + +#define SUBTEST(x) { x, #x } + +#endif /* __SELFTEST_H__ */ diff --git a/drivers/dma-buf/selftests.h b/drivers/dma-buf/selftests.h new file mode 100644 index 000000000000..44b44390d23a --- /dev/null +++ b/drivers/dma-buf/selftests.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: MIT */ +/* List each unit test as selftest(name, function) + * + * The name is used as both an enum and expanded as subtest__name to create + * a module parameter. It must be unique and legal for a C identifier. + * + * The function should be of type int function(void). It may be conditionally + * compiled using #if IS_ENABLED(DRM_I915_SELFTEST). + * + * Tests are executed in order by igt/dmabuf_selftest + */ +selftest(sanitycheck, __sanitycheck__) /* keep first (igt selfcheck) */ -- 2.23.0.rc1

1 3

[PATCH] drm/drv: Use // for comments in example code
by Jonathan Neuschäfer 19 Aug '19

19 Aug '19

This improves Sphinx output in two ways: - It avoids an unmatched single-quote ('), about which Sphinx complained: /.../Documentation/gpu/drm-internals.rst:298: WARNING: Could not lex literal_block as "c". Highlighting skipped. An alternative approach would be to replace "can't" with a word that doesn't have a single-quote. - It lets Sphinx format the comments in italics and grey, making the code slightly easier to read. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- drivers/gpu/drm/drm_drv.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index 9d00947ca447..769feefeeeef 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c @@ -328,11 +328,9 @@ void drm_minor_release(struct drm_minor *minor) * struct drm_device *drm; * int ret; * - * [ - * devm_kzalloc() can't be used here because the drm_device - * lifetime can exceed the device lifetime if driver unbind - * happens when userspace still has open file descriptors. - * ] + * // devm_kzalloc() can't be used here because the drm_device ' + * // lifetime can exceed the device lifetime if driver unbind + * // happens when userspace still has open file descriptors. * priv = kzalloc(sizeof(*priv), GFP_KERNEL); * if (!priv) * return -ENOMEM; @@ -355,7 +353,7 @@ void drm_minor_release(struct drm_minor *minor) * if (IS_ERR(priv->pclk)) * return PTR_ERR(priv->pclk); * - * [ Further setup, display pipeline etc ] + * // Further setup, display pipeline etc * * platform_set_drvdata(pdev, drm); * @@ -370,7 +368,7 @@ void drm_minor_release(struct drm_minor *minor) * return 0; * } * - * [ This function is called before the devm_ resources are released ] + * // This function is called before the devm_ resources are released * static int driver_remove(struct platform_device *pdev) * { * struct drm_device *drm = platform_get_drvdata(pdev); @@ -381,7 +379,7 @@ void drm_minor_release(struct drm_minor *minor) * return 0; * } * - * [ This function is called on kernel restart and shutdown ] + * // This function is called on kernel restart and shutdown * static void driver_shutdown(struct platform_device *pdev) * { * drm_atomic_helper_shutdown(platform_get_drvdata(pdev)); -- 2.20.1

4 4

[PATCH] drm/panfrost: Remove opp table when unloading
by Steven Price 19 Aug '19

19 Aug '19

The devfreq opp table needs to be removed when unloading the driver to free the memory associated with it. Signed-off-by: Steven Price <steven.price(a)arm.com> --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 6 ++++++ drivers/gpu/drm/panfrost/panfrost_devfreq.h | 1 + drivers/gpu/drm/panfrost/panfrost_drv.c | 5 ++++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 77e1ad24de53..710d903f8e0d 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -160,12 +160,18 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) DRM_DEV_ERROR(&pfdev->pdev->dev, "Couldn't initialize GPU devfreq\n"); ret = PTR_ERR(pfdev->devfreq.devfreq); pfdev->devfreq.devfreq = NULL; + dev_pm_opp_of_remove_table(&pfdev->pdev->dev); return ret; } return 0; } +void panfrost_devfreq_fini(struct panfrost_device *pfdev) +{ + dev_pm_opp_of_remove_table(&pfdev->pdev->dev); +} + void panfrost_devfreq_resume(struct panfrost_device *pfdev) { int i; diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.h b/drivers/gpu/drm/panfrost/panfrost_devfreq.h index eb999531ed90..e3bc63e82843 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.h +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.h @@ -5,6 +5,7 @@ #define __PANFROST_DEVFREQ_H__ int panfrost_devfreq_init(struct panfrost_device *pfdev); +void panfrost_devfreq_fini(struct panfrost_device *pfdev); void panfrost_devfreq_resume(struct panfrost_device *pfdev); void panfrost_devfreq_suspend(struct panfrost_device *pfdev); diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index ae70200be44a..44a558c6e17e 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -547,12 +547,14 @@ static int panfrost_probe(struct platform_device *pdev) */ err = drm_dev_register(ddev, 0); if (err < 0) - goto err_out1; + goto err_out2; panfrost_gem_shrinker_init(ddev); return 0; +err_out2: + panfrost_devfreq_fini(pfdev); err_out1: panfrost_device_fini(pfdev); err_out0: @@ -571,6 +573,7 @@ static int panfrost_remove(struct platform_device *pdev) pm_runtime_get_sync(pfdev->dev); pm_runtime_put_sync_autosuspend(pfdev->dev); pm_runtime_disable(pfdev->dev); + panfrost_devfreq_fini(pfdev); panfrost_device_fini(pfdev); drm_dev_put(ddev); return 0; -- 2.20.1

2 1

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dri-devel August 2019