dri-devel November 2020

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811 discussions

[Bug 208947] New: amdgpu DisplayPort won't recognize all display modes after 5.9 merges
by bugzilla-daemon＠bugzilla.kernel.org 10 Jan '21

10 Jan '21

https://bugzilla.kernel.org/show_bug.cgi?id=208947 Bug ID: 208947 Summary: amdgpu DisplayPort won't recognize all display modes after 5.9 merges Product: Drivers Version: 2.5 Kernel Version: 5.9 staging-testing, rc1, and latest linux.git Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: ckane(a)colemankane.org Regression: No I've got an AMD Ryzen 7 1700 and a POLARIS10 Radeon RX 580M GPU in an ASUS ROG GL702ZC laptop. I'm using the regular 5.8.1 kernel on Arch linux, and also have been tracking in-development kernel changes via the "staging-testing" branch on the gregkh/staging.git Linux tree as well as the torvalds/linux.git tree. Sometime during the course of the 5.9 updates getting merged into those trees, the 5.9 kernels I build no longer recognize all of the graphics modes for my 4K (3840x2160) monitor when it is plugged into the DisplayPort. Instead, the highest mode reported available is 1024x768, and Xorg also gets limited to these choices. This behavior appears limited to the monitor being plugged in via its DisplayPort input. When I use an HDMI input, all of the supported graphics modes are reported properly. I am using /sys/class/drm/card0-DP-1/modes to display the available modes, and also starting Xorg to test it as well. Would be happy to test patches if this is a known regression, or would appreciate some help/direction in tracking down potential likely culprits of the problem so I can try to diagnose it myself. I am somewhat familiar with kernel development, so I'm capable of hacking on it a bit if anyone can point me in a good direction. I'm just not too familiar with the inner workings of the AMDGPU, KMS, or DRM code. Not even certain if this is an issue specific to AMDGPU or something agnostic to the specific video hw. I also tried dumping the /sys/class/drm/card0-DP-1/edid after booting into 5.8.1 and then 5.9-latest and I get exactly the same data for both, so it seems like the EDID data is at least being fetched properly. I also tried saving that EDID data to a *.bin file and manually loading that via kernel arguments (drm.edid_firmware): verified it was loading properly for DP-1, but I still got the same results (no high-resolution video modes). Let me know what data would be helpful to attach to this issue, as well. Thanks, Coleman Kane -- You are receiving this mail because: You are watching the assignee of the bug.

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[Bug 209987] New: Memory leak in amdgpu_dm_update_connector_after_detect
by bugzilla-daemon＠bugzilla.kernel.org 10 Jan '21

10 Jan '21

https://bugzilla.kernel.org/show_bug.cgi?id=209987 Bug ID: 209987 Summary: Memory leak in amdgpu_dm_update_connector_after_detect Product: Drivers Version: 2.5 Kernel Version: 5.9.1 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: lstarnes1024(a)gmail.com Regression: No Created attachment 293341 --> https://bugzilla.kernel.org/attachment.cgi?id=293341&action=edit /sys/kernel/debug/kmemleak It looks like there's a memory leak in drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:amdgpu_dm_update_connector_after_detect. It appears to be calling drm_add_edid_modes, which indirectly calling ito either do_detailed_mode or drm_mode_duplicate. This has caused me to run out of memory a handful of times, which could only be resolved by rebooting. I only experienced this after upgrading to 5.9.1, and it looks like commit b24bdc37d03a0478189e20a50286092840f414fa added the call to drm_add_edid_modes in amdgpu_dm_update_connector_after_detect. -- You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH 1/3] drm: uapi: Use SPDX in DRM core uAPI headers
by Laurent Pinchart 09 Jan '21

09 Jan '21

The DRM core uAPI headers are licensed under the MIT license, and carry copies of the license with slight variations. Replace them with SPDX headers. Following a discussion with Daniel Vetter on this topic, add a clarification in the drm-uapi.rst file that independent closed-source userspace implementations of software using the DRM uAPI are accepted, as allowed by the MIT license. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com> Reviewed-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Reviewed-by: Thomas Gleixner <tglx(a)linutronix.de> --- Documentation/gpu/drm-uapi.rst | 4 ++++ include/uapi/drm/drm.h | 20 +------------------- include/uapi/drm/drm_fourcc.h | 20 +------------------- include/uapi/drm/drm_mode.h | 19 +------------------ include/uapi/drm/drm_sarea.h | 20 +------------------- 5 files changed, 8 insertions(+), 75 deletions(-) diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst index 56fec6ed1ad8..de2ecc76dd6c 100644 --- a/Documentation/gpu/drm-uapi.rst +++ b/Documentation/gpu/drm-uapi.rst @@ -107,6 +107,10 @@ is already rather painful for the DRM subsystem, with multiple different uAPIs for the same thing co-existing. If we add a few more complete mistakes into the mix every year it would be entirely unmanageable. +The DRM subsystem has however no concern with independent closed-source +userspace implementations. To officialize that position, the DRM uAPI headers +are covered by the MIT license. + .. _drm_render_node: Render nodes diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 808b48a93330..14d57361e580 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /** * \file drm.h * Header for the Direct Rendering Manager @@ -12,25 +13,6 @@ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _DRM_H_ diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 490143500a50..d2c4a597620f 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -1,24 +1,6 @@ +/* SPDX-License-Identifier: MIT */ /* * Copyright 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef DRM_FOURCC_H diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index 735c8cfdaaa1..c34a544fdf29 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -1,27 +1,10 @@ +/* SPDX-License-Identifier: MIT */ /* * Copyright (c) 2007 Dave Airlie <airlied(a)linux.ie> * Copyright (c) 2007 Jakob Bornecrantz <wallbraker(a)gmail.com> * Copyright (c) 2008 Red Hat Inc. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA * Copyright (c) 2007-2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. */ #ifndef _DRM_MODE_H diff --git a/include/uapi/drm/drm_sarea.h b/include/uapi/drm/drm_sarea.h index a951ced60ebe..1e38d028332d 100644 --- a/include/uapi/drm/drm_sarea.h +++ b/include/uapi/drm/drm_sarea.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /** * \file drm_sarea.h * \brief SAREA definitions @@ -8,25 +9,6 @@ /* * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef _DRM_SAREA_H_ -- Regards, Laurent Pinchart

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[PATCH] drm/i915/dsi: Use unconditional msleep for the panel_on_delay when there is no reset-deassert MIPI-sequence
by Hans de Goede 07 Jan '21

07 Jan '21

Commit 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") added an intel_dsi_msleep() helper which skips sleeping if the MIPI-sequences have a version of 3 or newer and the panel is in vid-mode; and it moved a bunch of msleep-s over to this new helper. This was based on my reading of the big comment around line 730 which starts with "Panel enable/disable sequences from the VBT spec.", where the "v3 video mode seq" column does not have any wait t# entries. Given that this code has been used on a lot of different devices without issues until now, it seems that my interpretation of the spec here is mostly correct. But now I have encountered one device, an Acer Aspire Switch 10 E SW3-016, where the panel will not light up unless we do actually honor the panel_on_delay after exexuting the MIPI_SEQ_PANEL_ON sequence. What seems to set this model apart is that it is lacking a MIPI_SEQ_DEASSERT_RESET sequence, which is where the power-on delay usually happens. Fix the panel not lighting up on this model by using an unconditional msleep(panel_on_delay) instead of intel_dsi_msleep() when there is no MIPI_SEQ_DEASSERT_RESET sequence. Fixes: 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/gpu/drm/i915/display/vlv_dsi.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index 194c239ab6b1..ef673277b36d 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -816,10 +816,14 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, intel_dsi_prepare(encoder, pipe_config); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); - intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); - /* Deassert reset */ - intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); + if (dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) { + intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); + /* Deassert reset */ + intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); + } else { + msleep(intel_dsi->panel_on_delay); + } if (IS_GEMINILAKE(dev_priv)) { glk_cold_boot = glk_dsi_enable_io(encoder); -- 2.28.0

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[PATCH] drm/panel: feiyang-fy07024di26a30d: cleanup if panel attaching failed
by Icenowy Zheng 07 Jan '21

07 Jan '21

Attaching the panel can fail, so cleanup work is necessary, otherwise a pointer to freed struct drm_panel* will remain in drm_panel code. Do the cleanup if panel attaching failed. Fixes: 69dc678abc2b ("drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel") Signed-off-by: Icenowy Zheng <icenowy(a)aosc.io> --- drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c index 581661b506f8..f9c1f7bc8218 100644 --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c @@ -227,7 +227,13 @@ static int feiyang_dsi_probe(struct mipi_dsi_device *dsi) dsi->format = MIPI_DSI_FMT_RGB888; dsi->lanes = 4; - return mipi_dsi_attach(dsi); + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return ret; + } + + return 0; } static int feiyang_dsi_remove(struct mipi_dsi_device *dsi) -- 2.28.0

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[Bug 210201] New: [amdpgu] crash when playing after suspend/resume
by bugzilla-daemon＠bugzilla.kernel.org 06 Jan '21

06 Jan '21

https://bugzilla.kernel.org/show_bug.cgi?id=210201 Bug ID: 210201 Summary: [amdpgu] crash when playing after suspend/resume Product: Drivers Version: 2.5 Kernel Version: 5.9.8, 5.6.19, 5.8.18 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: arturbac.ab(a)gmail.com Regression: No Created attachment 293669 --> https://bugzilla.kernel.org/attachment.cgi?id=293669&action=edit Full dmesg after video crash When i play vulkan games, like Kerbal Space Program, ReadDeadRedemption2(via Proton) after i return from suspend, after runing them after 30min - 1h graphics driver crashes. OS: Gentoo Kernel: x86_64 Linux 5.9.8 Resolution: 7680x2160 (2 monitors attached 4K free sync) DE: KDE 5.75.0 / Plasma 5.20.3 WM: KWin GTK Theme: Adwaita [GTK2/3] CPU: AMD Ryzen 9 3900X 12-Core @ 24x 3.8GHz GPU: AMD Radeon RX 5700 XT (NAVI10, DRM 3.39.0, 5.9.8, LLVM 10.0.1) Mesa 20.2.2 RAM: 32038MiB Full dmesg attached. [104307.850190] amdgpu 0000:0f:00.0: amdgpu: ring gfx_0.0.0 uses VM inv eng 0 on hub 0 [104307.850192] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.0.0 uses VM inv eng 1 on hub 0 [104307.850194] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.1.0 uses VM inv eng 4 on hub 0 [104307.850195] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.2.0 uses VM inv eng 5 on hub 0 [104307.850196] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.3.0 uses VM inv eng 6 on hub 0 [104307.850198] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.0.1 uses VM inv eng 7 on hub 0 [104307.850199] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.1.1 uses VM inv eng 8 on hub 0 [104307.850201] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.2.1 uses VM inv eng 9 on hub 0 [104307.850202] amdgpu 0000:0f:00.0: amdgpu: ring comp_1.3.1 uses VM inv eng 10 on hub 0 [104307.850203] amdgpu 0000:0f:00.0: amdgpu: ring kiq_2.1.0 uses VM inv eng 11 on hub 0 [104307.850205] amdgpu 0000:0f:00.0: amdgpu: ring sdma0 uses VM inv eng 12 on hub 0 [104307.850206] amdgpu 0000:0f:00.0: amdgpu: ring sdma1 uses VM inv eng 13 on hub 0 [104307.850208] amdgpu 0000:0f:00.0: amdgpu: ring vcn_dec uses VM inv eng 0 on hub 1 [104307.850209] amdgpu 0000:0f:00.0: amdgpu: ring vcn_enc0 uses VM inv eng 1 on hub 1 [104307.850210] amdgpu 0000:0f:00.0: amdgpu: ring vcn_enc1 uses VM inv eng 4 on hub 1 [104307.850212] amdgpu 0000:0f:00.0: amdgpu: ring jpeg_dec uses VM inv eng 5 on hub 1 [104307.852128] [drm] recover vram bo from shadow start [104307.872340] [drm] recover vram bo from shadow done [104307.872342] [drm] Skip scheduling IBs! [104307.872343] [drm] Skip scheduling IBs! [104307.872357] [drm] Skip scheduling IBs! [104307.872362] amdgpu 0000:0f:00.0: amdgpu: GPU reset(2) succeeded! [104307.872373] [drm] Skip scheduling IBs! [repeated many times...] [104307.872440] [drm] Skip scheduling IBs! [104314.769174] [drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16) [104314.795600] [drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16) [104314.847946] amdgpu 0000:0f:00.0: amdgpu: failed to clear page tables on GEM object close (-16) [repeated many times...] [104315.300254] amdgpu 0000:0f:00.0: amdgpu: failed to clear page tables on GEM object close (-16) [104325.487235] GpuWatchdog[731778]: segfault at 0 ip 00007f9be2bf92dd sp 00007f9bd77ed670 error 6 in libcef.so[7f9bdee73000+69a4000] [104325.488266] Code: 00 79 09 48 8b 7d a0 e8 21 80 c1 02 41 8b 85 00 01 00 00 85 c0 0f 84 ab 00 00 00 49 8b 45 00 4c 89 ef be 01 00 00 00 ff 50 58 <c7> 04 25 00 00 00 00 37 13 00 00 c6 05 c1 a5 37 03 01 80 bd 7f ff [104335.590624] GpuWatchdog[731809]: segfault at 0 ip 00007f494f6142dd sp 00007f4944208670 error 6 in libcef.so[7f494b88e000+69a4000] [104335.590631] Code: 00 79 09 48 8b 7d a0 e8 21 80 c1 02 41 8b 85 00 01 00 00 85 c0 0f 84 ab 00 00 00 49 8b 45 00 4c 89 ef be 01 00 00 00 ff 50 58 <c7> 04 25 00 00 00 00 37 13 00 00 c6 05 c1 a5 37 03 01 80 bd 7f ff [104345.690401] GpuWatchdog[731833]: segfault at 0 ip 00007fcbb4c722dd sp 00007fcba9866670 error 6 in libcef.so[7fcbb0eec000+69a4000] [104345.692176] Code: 00 79 09 48 8b 7d a0 e8 21 80 c1 02 41 8b 85 00 01 00 00 85 c0 0f 84 ab 00 00 00 49 8b 45 00 4c 89 ef be 01 00 00 00 ff 50 58 <c7> 04 25 00 00 00 00 37 13 00 00 c6 05 c1 a5 37 03 01 80 bd 7f ff -- You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH RFC v6 0/6] Add Unisoc's drm kms module
by Kevin Tang 05 Jan '21

05 Jan '21

From: Kevin Tang <kevin.tang(a)unisoc.com> ChangeList: v1: 1. only upstream modeset and atomic at first commit. 2. remove some unused code; 3. use alpha and blend_mode properties; 3. add yaml support; 4. remove auto-adaptive panel driver; 5. bugfix v2: 1. add sprd crtc and plane module for KMS, preparing for multi crtc&encoder 2. remove gem drivers, use generic CMA handlers 3. remove redundant "module_init", all the sub modules loading by KMS v3: 1. multi crtc&encoder design have problem, so rollback to v1 v4: 1. update to gcc-linaro-7.5.0 2. update to Linux 5.6-rc3 3. remove pm_runtime support 4. add COMPILE_TEST, remove unused kconfig 5. "drm_dev_put" on drm_unbind 6. fix some naming convention issue 7. remove semaphore lock for crtc flip 8. remove static variables v5: 1. optimize encoder and connector code implementation 2. use "platform_get_irq" and "platform_get_resource" 3. drop useless function return type, drop unless debug log 4. custom properties should be separate, so drop it 5. use DRM_XXX replase pr_xxx 6. drop dsi&dphy hal callback ops 7. drop unless callback ops checking 8. add comments for sprd dpu structure v6: 1. Access registers via readl/writel 2. Checking for unsupported KMS properties (format, rotation, blend_mode, etc) on plane_check ops 3. Remove always true checks for dpu core ops Kevin Tang (6): dt-bindings: display: add Unisoc's drm master bindings drm/sprd: add Unisoc's drm kms master dt-bindings: display: add Unisoc's dpu bindings drm/sprd: add Unisoc's drm display controller driver dt-bindings: display: add Unisoc's mipi dsi&dphy bindings drm/sprd: add Unisoc's drm mipi dsi&dphy driver .../devicetree/bindings/display/sprd/dphy.yaml | 75 + .../devicetree/bindings/display/sprd/dpu.yaml | 82 ++ .../devicetree/bindings/display/sprd/drm.yaml | 36 + .../devicetree/bindings/display/sprd/dsi.yaml | 98 ++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sprd/Kconfig | 12 + drivers/gpu/drm/sprd/Makefile | 13 + drivers/gpu/drm/sprd/disp_lib.c | 57 + drivers/gpu/drm/sprd/disp_lib.h | 16 + drivers/gpu/drm/sprd/dphy/Makefile | 7 + drivers/gpu/drm/sprd/dphy/pll/Makefile | 3 + drivers/gpu/drm/sprd/dphy/pll/megacores_sharkle.c | 473 +++++++ drivers/gpu/drm/sprd/dphy/sprd_dphy_api.c | 201 +++ drivers/gpu/drm/sprd/dphy/sprd_dphy_api.h | 22 + drivers/gpu/drm/sprd/dpu/Makefile | 3 + drivers/gpu/drm/sprd/dpu/dpu_r2p0.c | 503 +++++++ drivers/gpu/drm/sprd/dsi/Makefile | 8 + drivers/gpu/drm/sprd/dsi/core/Makefile | 4 + drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0.c | 964 +++++++++++++ drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0.h | 1477 ++++++++++++++++++++ drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0_ppi.c | 328 +++++ drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0_ppi.h | 32 + drivers/gpu/drm/sprd/dsi/sprd_dsi_api.c | 590 ++++++++ drivers/gpu/drm/sprd/dsi/sprd_dsi_api.h | 26 + drivers/gpu/drm/sprd/sprd_dphy.c | 209 +++ drivers/gpu/drm/sprd/sprd_dphy.h | 50 + drivers/gpu/drm/sprd/sprd_dpu.c | 668 +++++++++ drivers/gpu/drm/sprd/sprd_dpu.h | 190 +++ drivers/gpu/drm/sprd/sprd_drm.c | 227 +++ drivers/gpu/drm/sprd/sprd_drm.h | 18 + drivers/gpu/drm/sprd/sprd_dsi.c | 571 ++++++++ drivers/gpu/drm/sprd/sprd_dsi.h | 108 ++ 33 files changed, 7074 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/dphy.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/drm.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/dsi.yaml create mode 100644 drivers/gpu/drm/sprd/Kconfig create mode 100644 drivers/gpu/drm/sprd/Makefile create mode 100644 drivers/gpu/drm/sprd/disp_lib.c create mode 100644 drivers/gpu/drm/sprd/disp_lib.h create mode 100644 drivers/gpu/drm/sprd/dphy/Makefile create mode 100644 drivers/gpu/drm/sprd/dphy/pll/Makefile create mode 100644 drivers/gpu/drm/sprd/dphy/pll/megacores_sharkle.c create mode 100644 drivers/gpu/drm/sprd/dphy/sprd_dphy_api.c create mode 100644 drivers/gpu/drm/sprd/dphy/sprd_dphy_api.h create mode 100644 drivers/gpu/drm/sprd/dpu/Makefile create mode 100644 drivers/gpu/drm/sprd/dpu/dpu_r2p0.c create mode 100644 drivers/gpu/drm/sprd/dsi/Makefile create mode 100644 drivers/gpu/drm/sprd/dsi/core/Makefile create mode 100644 drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0.c create mode 100644 drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0.h create mode 100644 drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0_ppi.c create mode 100644 drivers/gpu/drm/sprd/dsi/core/dsi_ctrl_r1p0_ppi.h create mode 100644 drivers/gpu/drm/sprd/dsi/sprd_dsi_api.c create mode 100644 drivers/gpu/drm/sprd/dsi/sprd_dsi_api.h create mode 100644 drivers/gpu/drm/sprd/sprd_dphy.c create mode 100644 drivers/gpu/drm/sprd/sprd_dphy.h create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.c create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.h create mode 100644 drivers/gpu/drm/sprd/sprd_drm.c create mode 100644 drivers/gpu/drm/sprd/sprd_drm.h create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.c create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.h -- 2.7.4

5 24

[Bug 205675] New: Display locks up. AMDGPU timeout
by bugzilla-daemon＠bugzilla.kernel.org 03 Jan '21

03 Jan '21

https://bugzilla.kernel.org/show_bug.cgi?id=205675 Bug ID: 205675 Summary: Display locks up. AMDGPU timeout Product: Drivers Version: 2.5 Kernel Version: 5.4.0 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: high Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: freddyreimer(a)comcast.net Regression: No Created attachment 286079 --> https://bugzilla.kernel.org/attachment.cgi?id=286079&action=edit dmesg tail from immediately after a lockup I have been encountering issues the AMDGPU driver completely failing when loading games. When loading into a game and after making one click or moving the mouse, the display will completely freeze. Can't tab out or go to a TTY at all. I can SSH into the box and do stuff, such as getting the attached dmesg tail, but even killing the process doesn't unfreeze the display, which has the still image of the game. Only rebooting unlocks it. Basically it just seems to timeout and then can't recover, and this happens all the time on certain games, but inconsistent as to what environment it happens. Some lock it up on Xorg but work fine on Wayland. Some work fine on Wayland but break on Xorg. Some never work at all. My Graphics card is a Navi10, RX5700. I'm on the 5.4 kernel, but this was happening on 5.3 as well. -- You are receiving this mail because: You are watching the assignee of the bug.

1 45

[Bug 210095] New: amdgpu : hibernate failed on A12-9700P (R7 bristol ridge) - ASUS X555 Q
by bugzilla-daemon＠bugzilla.kernel.org 02 Jan '21

02 Jan '21

https://bugzilla.kernel.org/show_bug.cgi?id=210095 Bug ID: 210095 Summary: amdgpu : hibernate failed on A12-9700P (R7 bristol ridge) - ASUS X555 Q Product: Drivers Version: 2.5 Kernel Version: 5.4.0-52-generic #57-Ubuntu SMP Thu Oct 15 10:57:00 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: alvin(a)ximple.ga Regression: No Created attachment 293529 --> https://bugzilla.kernel.org/attachment.cgi?id=293529&action=edit dmesg Hi! Dear maintainer, I have a problem getting hibernate from this machine. After issuing hibernate command via kernel 'echo disk > /sys/power/state' or systemd 'systemctl hibernate', the screen is black but still powered on. After like 20secs, fan speed ramp up to max. If I disconnect the power (mind that my laptop battery is detected bad) it's instantly turned off (like if I disconnect power on bios menu) -- my guesses is the blank state is likely stuck on the bios mode/side(?) I've tried to located the problem by blocking amdgpu modules from booting and I found out that amdgpu likely the problem. I tried upgrade kernel on ubuntu to 5.8 but no amdgpu loaded but using LLVMpipe mode, the hibernate can happen normally There is no/I don't know where the - serial port on this device as this is a laptop and I have limited knowledge/resources to find that out. I guess that's useless to attach dmesg, as system is not recording any logs occur after hibernate issued. Another thing I get is from the Magic number (PM_TRACE), they said some error on random 'memory48' or sometimes 'memoryXXX'. I think this may be just false positive [ 0.984201] kernel: PM: Magic number: 11:0:0 [ 0.984292] kernel: memory memory48: hash matches Here's some device details. Thank you. *-cpu description: CPU product: AMD A12-9700P RADEON R7, 10 COMPUTE CORES 4C+6G vendor: Advanced Micro Devices [AMD] physical id: 1b bus info: cpu@0 version: AMD A12-9700P RADEON R7, 10 COMPUTE CORES 4C+6G slot: P0 size: 1306MHz capacity: 2500MHz width: 64 bits clock: 100MHz *-display description: VGA compatible controller product: Wani [Radeon R5/R6/R7 Graphics] vendor: Advanced Micro Devices, Inc. [AMD/ATI] physical id: 1 bus info: pci@0000:00:01.0 version: c9 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller bus_master cap_list rom configuration: driver=amdgpu latency=0 resources: irq:44 memory:d0000000-dfffffff memory:f0000000-f07fffff ioport:f000(size=256) memory:feb00000-feb3ffff memory:c0000-dffff *-pci:2 description: PCI bridge product: Family 15h (Models 60h-6fh) Processor Root Port vendor: Advanced Micro Devices, Inc. [AMD] physical id: 3.1 bus info: pci@0000:00:03.1 version: 00 width: 32 bits clock: 33MHz capabilities: pci pm pciexpress msi ht normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:29 ioport:d000(size=4096) memory:fe800000-fe8fffff ioport:e0000000(size=268435456) *-display description: Display controller product: Sun XT [Radeon HD 8670A/8670M/8690M / R5 M330 / M430 / Radeon 520 Mobile] vendor: Advanced Micro Devices, Inc. [AMD/ATI] physical id: 0 bus info: pci@0000:03:00.0 version: 83 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list rom configuration: driver=radeon latency=0 resources: irq:43 memory:e0000000-efffffff memory:fe800000-fe83ffff ioport:d000(size=256) memory:fe840000-fe85ffff -- You are receiving this mail because: You are watching the assignee of the bug.

1 4

[PATCH] drm/ast: Fixed CVE for DP501
by KuoHsiang Chou 28 Dec '20

28 Dec '20

[Bug][DP501] 1. For security concerning, P2A have to be disabled by CVE regulation. 2. FrameBuffer reverses last 2MB used for the image of DP501. 3. If P2A is disallowed, the default "ioremap()" behavior is non-cached and could be an alternative accessing on the image of DP501. --- drivers/gpu/drm/ast/ast_dp501.c | 131 +++++++++++++++++++++++--------- drivers/gpu/drm/ast/ast_drv.h | 2 + drivers/gpu/drm/ast/ast_main.c | 12 +++ drivers/gpu/drm/ast/ast_mm.c | 1 + 4 files changed, 110 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c index 88121c0e0d05..7640364ef2bc 100644 --- a/drivers/gpu/drm/ast/ast_dp501.c +++ b/drivers/gpu/drm/ast/ast_dp501.c @@ -189,6 +189,8 @@ bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size) u32 i, data; u32 boot_address; + if (ast->config_mode != ast_use_p2a) return false; + data = ast_mindwm(ast, 0x1e6e2100) & 0x01; if (data) { boot_address = get_fw_base(ast); @@ -207,6 +209,8 @@ static bool ast_launch_m68k(struct drm_device *dev) u8 *fw_addr = NULL; u8 jreg; + if (ast->config_mode != ast_use_p2a) return false; + data = ast_mindwm(ast, 0x1e6e2100) & 0x01; if (!data) { @@ -272,24 +276,51 @@ u8 ast_get_dp501_max_clk(struct drm_device *dev) u32 boot_address, offset, data; u8 linkcap[4], linkrate, linklanes, maxclk = 0xff; - boot_address = get_fw_base(ast); - - /* validate FW version */ - offset = 0xf000; - data = ast_mindwm(ast, boot_address + offset); - if ((data & 0xf0) != 0x10) /* version: 1x */ - return maxclk; - - /* Read Link Capability */ - offset = 0xf014; - *(u32 *)linkcap = ast_mindwm(ast, boot_address + offset); - if (linkcap[2] == 0) { - linkrate = linkcap[0]; - linklanes = linkcap[1]; - data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); - if (data > 0xff) - data = 0xff; - maxclk = (u8)data; + if (ast->config_mode == ast_use_p2a) { + boot_address = get_fw_base(ast); + + /* validate FW version */ + offset = 0xf000; + data = ast_mindwm(ast, boot_address + offset); + if ((data & 0xf0) != 0x10) /* version: 1x */ + return maxclk; + + /* Read Link Capability */ + offset = 0xf014; + *(u32 *)linkcap = ast_mindwm(ast, boot_address + offset); + if (linkcap[2] == 0) { + linkrate = linkcap[0]; + linklanes = linkcap[1]; + data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); + if (data > 0xff) + data = 0xff; + maxclk = (u8)data; + } + } + else { + if (!ast->reservedbuffer) return 65; /* 1024x768 as default */ + + /* dummy read */ + offset = 0x0000; + data = *(u32 *) (ast->reservedbuffer + offset); + + /* validate FW version */ + offset = 0xf000; + data = *(u32 *) (ast->reservedbuffer + offset); + if ((data & 0xf0) != 0x10) /* version: 1x */ + return maxclk; + + /* Read Link Capability */ + offset = 0xf014; + *(u32 *)linkcap = *(u32 *) (ast->reservedbuffer + offset); + if (linkcap[2] == 0) { + linkrate = linkcap[0]; + linklanes = linkcap[1]; + data = (linkrate == 0x0a) ? (90 * linklanes) : (54 * linklanes); + if (data > 0xff) + data = 0xff; + maxclk = (u8)data; + } } return maxclk; } @@ -299,25 +330,53 @@ bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata) struct ast_private *ast = to_ast_private(dev); u32 i, boot_address, offset, data; - boot_address = get_fw_base(ast); - - /* validate FW version */ - offset = 0xf000; - data = ast_mindwm(ast, boot_address + offset); - if ((data & 0xf0) != 0x10) - return false; - - /* validate PnP Monitor */ - offset = 0xf010; - data = ast_mindwm(ast, boot_address + offset); - if (!(data & 0x01)) - return false; + if (ast->config_mode == ast_use_p2a) { + boot_address = get_fw_base(ast); - /* Read EDID */ - offset = 0xf020; - for (i = 0; i < 128; i += 4) { - data = ast_mindwm(ast, boot_address + offset + i); - *(u32 *)(ediddata + i) = data; + /* validate FW version */ + offset = 0xf000; + data = ast_mindwm(ast, boot_address + offset); + if ((data & 0xf0) != 0x10) + return false; + + /* validate PnP Monitor */ + offset = 0xf010; + data = ast_mindwm(ast, boot_address + offset); + if (!(data & 0x01)) + return false; + + /* Read EDID */ + offset = 0xf020; + for (i = 0; i < 128; i += 4) { + data = ast_mindwm(ast, boot_address + offset + i); + *(u32 *)(ediddata + i) = data; + } + } + else { + if (!ast->reservedbuffer) return false; + + /* dummy read */ + offset = 0x0000; + data = *(u32 *) (ast->reservedbuffer + offset); + + /* validate FW version */ + offset = 0xf000; + data = *(u32 *) (ast->reservedbuffer + offset); + if ((data & 0xf0) != 0x10) + return false; + + /* validate PnP Monitor */ + offset = 0xf010; + data = *(u32 *) (ast->reservedbuffer + offset); + if (!(data & 0x01)) + return false; + + /* Read EDID */ + offset = 0xf020; + for (i = 0; i < 128; i+=4) { + data = *(u32 *) (ast->reservedbuffer + offset + i); + *(u32 *)(ediddata + i) = data; + } } return true; diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index 6b9e3b94a712..cd17e0683fd7 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -121,12 +121,14 @@ struct ast_private { void __iomem *regs; void __iomem *ioregs; + void __iomem *reservedbuffer; enum ast_chip chip; bool vga2_clone; uint32_t dram_bus_width; uint32_t dram_type; uint32_t mclk; + uint32_t vram_size; int fb_mtrr; diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 4ec6884f6c65..4477b4cf1b06 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -393,6 +393,7 @@ static void ast_device_release(void *data) /* enable standard VGA decode */ ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); + pci_iounmap(ast->base.pdev, ast->reservedbuffer); } struct ast_private *ast_device_create(struct drm_driver *drv, @@ -449,6 +450,17 @@ struct ast_private *ast_device_create(struct drm_driver *drv, if (ret) return ERR_PTR(ret); + /* map reserved buffer */ + ast->reservedbuffer = NULL; + if (ast->vram_size < pci_resource_len(dev->pdev, 0)) { + ast->reservedbuffer = ioremap( \ + pci_resource_start(ast->base.pdev, 0) + (unsigned long)ast->vram_size, \ + pci_resource_len(dev->pdev, 0) - ast->vram_size); + if (!ast->reservedbuffer) { + DRM_INFO("failed to map reserved buffer! \n"); + } + } + ret = ast_mode_config_init(ast); if (ret) return ERR_PTR(ret); diff --git a/drivers/gpu/drm/ast/ast_mm.c b/drivers/gpu/drm/ast/ast_mm.c index 8392ebde504b..c6fd24493fb3 100644 --- a/drivers/gpu/drm/ast/ast_mm.c +++ b/drivers/gpu/drm/ast/ast_mm.c @@ -90,6 +90,7 @@ int ast_mm_init(struct ast_private *ast) int ret; vram_size = ast_get_vram_size(ast); + ast->vram_size = (uint32_t) vram_size; ret = drmm_vram_helper_init(dev, pci_resource_start(dev->pdev, 0), vram_size); -- 2.18.4

4 6

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dri-devel November 2020