dri-devel July 2020

dri-devel@lists.freedesktop.org

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772 discussions

[git pull] drm fixes for 5.8-rc6
by Dave Airlie 17 Jul '20

17 Jul '20

Hi Linus, Weekly fixes pull, big bigger than I'd normally like, but they are fairly scattered and small individually. The vmwgfx one is a black screen regression, otherwise the largest is an MST encoder fix for amdgpu which results in a WARN in some cases, and a scattering of i915 fixes. I'm tracking two regressions at the moment that hopefully we get nailed down this week for rc7. Dave. drm-fixes-2020-07-17-1: drm fixes for 5.8-rc6 dma-buf: - sleeping atomic fix amdgpu: - Fix a race condition with KIQ - Preemption fix - Fix handling of fake MST encoders - OLED panel fix - Handle allocation failure in stream construction - Renoir SMC fix - SDMA 5.x fix i915: - FBC w/a stride fix - Fix use-after-free fix on module reload - Ignore irq enabling on the virtual engines to fix device sleep - Use GTT when saving/restoring engine GPR - Fix selftest sort function vmwgfx: - black screen fix aspeed: - fbcon init warn fix The following changes since commit 11ba468877bb23f28956a35e896356252d63c983: Linux 5.8-rc5 (2020-07-12 16:34:50 -0700) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2020-07-17-1 for you to fetch changes up to adbe8a3cae94a63e9f416795c750237a9b789124: Merge tag 'amd-drm-fixes-5.8-2020-07-15' of git://people.freedesktop.org/~agd5f/linux into drm-fixes (2020-07-17 13:29:00 +1000) ---------------------------------------------------------------- drm fixes for 5.8-rc6 dma-buf: - sleeping atomic fix amdgpu: - Fix a race condition with KIQ - Preemption fix - Fix handling of fake MST encoders - OLED panel fix - Handle allocation failure in stream construction - Renoir SMC fix - SDMA 5.x fix i915: - FBC w/a stride fix - Fix use-after-free fix on module reload - Ignore irq enabling on the virtual engines to fix device sleep - Use GTT when saving/restoring engine GPR - Fix selftest sort function vmwgfx: - black screen fix aspeed: - fbcon init warn fix ---------------------------------------------------------------- Alex Deucher (1): drm/amdgpu/display: create fake mst encoders ahead of time (v4) Charan Teja Kalla (1): dmabuf: use spinlock to access dmabuf->name Chris Wilson (2): drm/i915/gt: Ignore irq enabling on the virtual engines drm/i915/gt: Only swap to a random sibling once upon creation Dave Airlie (4): Merge branch 'vmwgfx-fixes-5.8' of git://people.freedesktop.org/~sroland/linux into drm-fixes Merge tag 'drm-misc-fixes-2020-07-15' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Merge tag 'drm-intel-fixes-2020-07-15' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes Merge tag 'amd-drm-fixes-5.8-2020-07-15' of git://people.freedesktop.org/~agd5f/linux into drm-fixes Guenter Roeck (1): drm/aspeed: Call drm_fbdev_generic_setup after drm_dev_register Jack Xiao (2): drm/amdgpu/gfx10: fix race condition for kiq drm/amdgpu: fix preemption unit test Josip Pavic (1): drm/amd/display: handle failed allocation during stream construction Maarten Lankhorst (1): drm/i915: Move cec_notifier to intel_hdmi_connector_unregister, v2. Roland Scheidegger (1): drm/vmwgfx: fix update of display surface when resolution changes Sudeep Holla (1): drm/i915/selftests: Fix compare functions provided for sorting Umesh Nerlige Ramappa (1): drm/i915/perf: Use GTT when saving/restoring engine GPR Ville Syrjälä (1): drm/i915: Recalculate FBC w/a stride when needed Xiaojie Yuan (1): drm/amdgpu/sdma5: fix wptr overwritten in ->get_wptr() chen gong (1): drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode hersen wu (1): drm/amd/display: OLED panel backlight adjust not work with external display connected drivers/dma-buf/dma-buf.c | 11 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 20 ++++++-- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 +++- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 26 ++++------- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 11 ++++- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 53 +++++++++++----------- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.h | 3 ++ drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 19 ++++++-- drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 2 +- drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 3 +- drivers/gpu/drm/i915/display/intel_fbc.c | 33 +++++++++++--- drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +--- drivers/gpu/drm/i915/gt/intel_lrc.c | 19 ++------ drivers/gpu/drm/i915/gt/selftest_rps.c | 8 ++-- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_perf.c | 1 + drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 8 ++-- include/linux/dma-buf.h | 1 + 19 files changed, 153 insertions(+), 99 deletions(-)

2 1

[radeon-alex:amd-staging-drm-next 1066/1110] drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:1233:3: warning: variable 'direct_poll' set but not used
by kernel test robot 17 Jul '20

17 Jul '20

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next head: cefd5db37208da458fa10f83f866f2f37eef70e9 commit: 4a33206e976be79b832d5a826565b5cb430de877 [1066/1110] drm/amd/sriov porting sriov cap to vcn3.0 config: parisc-randconfig-r015-20200717 (attached as .config) compiler: hppa-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 4a33206e976be79b832d5a826565b5cb430de877 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=parisc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> All warnings (new ones prefixed by >>): In file included from include/linux/mm.h:94, from include/drm/drm_vma_manager.h:27, from include/drm/drm_gem.h:40, from include/drm/ttm/ttm_bo_api.h:34, from drivers/gpu/drm/amd/amdgpu/amdgpu.h:53, from drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:25: include/asm-generic/pgtable.h: In function 'pte_clear_not_present_full': arch/parisc/include/asm/pgtable.h:96:9: warning: variable 'old_pte' set but not used [-Wunused-but-set-variable] 96 | pte_t old_pte; \ | ^~~~~~~ arch/parisc/include/asm/pgtable.h:322:34: note: in expansion of macro 'set_pte_at' 322 | #define pte_clear(mm, addr, xp) set_pte_at(mm, addr, xp, __pte(0)) | ^~~~~~~~~~ include/asm-generic/pgtable.h:201:2: note: in expansion of macro 'pte_clear' 201 | pte_clear(mm, address, ptep); | ^~~~~~~~~ include/asm-generic/pgtable.h: In function '__ptep_modify_prot_commit': arch/parisc/include/asm/pgtable.h:96:9: warning: variable 'old_pte' set but not used [-Wunused-but-set-variable] 96 | pte_t old_pte; \ | ^~~~~~~ include/asm-generic/pgtable.h:640:2: note: in expansion of macro 'set_pte_at' 640 | set_pte_at(vma->vm_mm, addr, ptep, pte); | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c: In function 'vcn_v3_0_start_sriov': >> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:1233:3: warning: variable 'direct_poll' set but not used [-Wunused-but-set-variable] 1233 | direct_poll = { {0} }; | ^~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:25: At top level: drivers/gpu/drm/amd/amdgpu/amdgpu.h:192:19: warning: 'debug_evictions' defined but not used [-Wunused-const-variable=] 192 | static const bool debug_evictions; /* = false */ | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu.h:191:18: warning: 'sched_policy' defined but not used [-Wunused-const-variable=] 191 | static const int sched_policy = KFD_SCHED_POLICY_HWS; | ^~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30, from drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26, from drivers/gpu/drm/amd/amdgpu/amdgpu.h:65, from drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:25: drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=] 76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL }; | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=] 75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL }; | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=] 74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL }; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=] 73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL }; | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=] 72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL }; | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=] 67 | static const struct fixed31_32 dc_fixpt_zero = { 0 }; | ^~~~~~~~~~~~~ vim +/direct_poll +1233 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c 1210 1211 static int vcn_v3_0_start_sriov(struct amdgpu_device *adev) 1212 { 1213 int i, j; 1214 struct amdgpu_ring *ring; 1215 uint64_t cache_addr; 1216 uint64_t rb_addr; 1217 uint64_t ctx_addr; 1218 uint32_t param, resp, expected; 1219 uint32_t offset, cache_size; 1220 uint32_t tmp, timeout; 1221 uint32_t id; 1222 1223 struct amdgpu_mm_table *table = &adev->virt.mm_table; 1224 uint32_t *table_loc; 1225 uint32_t table_size; 1226 uint32_t size, size_dw; 1227 1228 struct mmsch_v3_0_cmd_direct_write 1229 direct_wt = { {0} }; 1230 struct mmsch_v3_0_cmd_direct_read_modify_write 1231 direct_rd_mod_wt = { {0} }; 1232 struct mmsch_v3_0_cmd_direct_polling > 1233 direct_poll = { {0} }; 1234 struct mmsch_v3_0_cmd_end end = { {0} }; 1235 struct mmsch_v3_0_init_header header; 1236 1237 direct_wt.cmd_header.command_type = 1238 MMSCH_COMMAND__DIRECT_REG_WRITE; 1239 direct_rd_mod_wt.cmd_header.command_type = 1240 MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE; 1241 direct_poll.cmd_header.command_type = 1242 MMSCH_COMMAND__DIRECT_REG_POLLING; 1243 end.cmd_header.command_type = 1244 MMSCH_COMMAND__END; 1245 1246 header.version = MMSCH_VERSION; 1247 header.total_size = sizeof(struct mmsch_v3_0_init_header) >> 2; 1248 for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) { 1249 header.inst[i].init_status = 0; 1250 header.inst[i].table_offset = 0; 1251 header.inst[i].table_size = 0; 1252 } 1253 1254 table_loc = (uint32_t *)table->cpu_addr; 1255 table_loc += header.total_size; 1256 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { 1257 if (adev->vcn.harvest_config & (1 << i)) 1258 continue; 1259 1260 table_size = 0; 1261 1262 MMSCH_V3_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCN, i, 1263 mmUVD_STATUS), 1264 ~UVD_STATUS__UVD_BUSY, UVD_STATUS__UVD_BUSY); 1265 1266 cache_size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); 1267 1268 if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { 1269 id = amdgpu_ucode_id_vcns[i]; 1270 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1271 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 1272 adev->firmware.ucode[id].tmr_mc_addr_lo); 1273 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1274 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 1275 adev->firmware.ucode[id].tmr_mc_addr_hi); 1276 offset = 0; 1277 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1278 mmUVD_VCPU_CACHE_OFFSET0), 1279 0); 1280 } else { 1281 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1282 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 1283 lower_32_bits(adev->vcn.inst[i].gpu_addr)); 1284 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1285 mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 1286 upper_32_bits(adev->vcn.inst[i].gpu_addr)); 1287 offset = cache_size; 1288 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1289 mmUVD_VCPU_CACHE_OFFSET0), 1290 AMDGPU_UVD_FIRMWARE_OFFSET >> 3); 1291 } 1292 1293 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1294 mmUVD_VCPU_CACHE_SIZE0), 1295 cache_size); 1296 1297 cache_addr = adev->vcn.inst[i].gpu_addr + offset; 1298 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1299 mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW), 1300 lower_32_bits(cache_addr)); 1301 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1302 mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), 1303 upper_32_bits(cache_addr)); 1304 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1305 mmUVD_VCPU_CACHE_OFFSET1), 1306 0); 1307 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1308 mmUVD_VCPU_CACHE_SIZE1), 1309 AMDGPU_VCN_STACK_SIZE); 1310 1311 cache_addr = adev->vcn.inst[i].gpu_addr + offset + 1312 AMDGPU_VCN_STACK_SIZE; 1313 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1314 mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW), 1315 lower_32_bits(cache_addr)); 1316 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1317 mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), 1318 upper_32_bits(cache_addr)); 1319 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1320 mmUVD_VCPU_CACHE_OFFSET2), 1321 0); 1322 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1323 mmUVD_VCPU_CACHE_SIZE2), 1324 AMDGPU_VCN_CONTEXT_SIZE); 1325 1326 for (j = 0; j < adev->vcn.num_enc_rings; ++j) { 1327 ring = &adev->vcn.inst[i].ring_enc[j]; 1328 ring->wptr = 0; 1329 rb_addr = ring->gpu_addr; 1330 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1331 mmUVD_RB_BASE_LO), 1332 lower_32_bits(rb_addr)); 1333 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1334 mmUVD_RB_BASE_HI), 1335 upper_32_bits(rb_addr)); 1336 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1337 mmUVD_RB_SIZE), 1338 ring->ring_size / 4); 1339 } 1340 1341 ring = &adev->vcn.inst[i].ring_dec; 1342 ring->wptr = 0; 1343 rb_addr = ring->gpu_addr; 1344 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1345 mmUVD_LMI_RBC_RB_64BIT_BAR_LOW), 1346 lower_32_bits(rb_addr)); 1347 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1348 mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH), 1349 upper_32_bits(rb_addr)); 1350 /* force RBC into idle state */ 1351 tmp = order_base_2(ring->ring_size); 1352 tmp = REG_SET_FIELD(0, UVD_RBC_RB_CNTL, RB_BUFSZ, tmp); 1353 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1); 1354 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_FETCH, 1); 1355 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); 1356 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_RPTR_WR_EN, 1); 1357 MMSCH_V3_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, 1358 mmUVD_RBC_RB_CNTL), 1359 tmp); 1360 1361 /* add end packet */ 1362 MMSCH_V3_0_INSERT_END(); 1363 1364 /* refine header */ 1365 header.inst[i].init_status = 1; 1366 header.inst[i].table_offset = header.total_size; 1367 header.inst[i].table_size = table_size; 1368 header.total_size += table_size; 1369 } 1370 1371 /* Update init table header in memory */ 1372 size = sizeof(struct mmsch_v3_0_init_header); 1373 table_loc = (uint32_t *)table->cpu_addr; 1374 memcpy((void *)table_loc, &header, size); 1375 1376 /* message MMSCH (in VCN[0]) to initialize this client 1377 * 1, write to mmsch_vf_ctx_addr_lo/hi register with GPU mc addr 1378 * of memory descriptor location 1379 */ 1380 ctx_addr = table->gpu_addr; 1381 WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr)); 1382 WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr)); 1383 1384 /* 2, update vmid of descriptor */ 1385 tmp = RREG32_SOC15(VCN, 0, mmMMSCH_VF_VMID); 1386 tmp &= ~MMSCH_VF_VMID__VF_CTX_VMID_MASK; 1387 /* use domain0 for MM scheduler */ 1388 tmp |= (0 << MMSCH_VF_VMID__VF_CTX_VMID__SHIFT); 1389 WREG32_SOC15(VCN, 0, mmMMSCH_VF_VMID, tmp); 1390 1391 /* 3, notify mmsch about the size of this descriptor */ 1392 size = header.total_size; 1393 WREG32_SOC15(VCN, 0, mmMMSCH_VF_CTX_SIZE, size); 1394 1395 /* 4, set resp to zero */ 1396 WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_RESP, 0); 1397 1398 /* 5, kick off the initialization and wait until 1399 * MMSCH_VF_MAILBOX_RESP becomes non-zero 1400 */ 1401 param = 0x10000001; 1402 WREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_HOST, param); 1403 tmp = 0; 1404 timeout = 1000; 1405 resp = 0; 1406 expected = param + 1; 1407 while (resp != expected) { 1408 resp = RREG32_SOC15(VCN, 0, mmMMSCH_VF_MAILBOX_RESP); 1409 if (resp == expected) 1410 break; 1411 1412 udelay(10); 1413 tmp = tmp + 10; 1414 if (tmp >= timeout) { 1415 DRM_ERROR("failed to init MMSCH. TIME-OUT after %d usec"\ 1416 " waiting for mmMMSCH_VF_MAILBOX_RESP "\ 1417 "(expected=0x%08x, readback=0x%08x)\n", 1418 tmp, expected, resp); 1419 return -EBUSY; 1420 } 1421 } 1422 1423 return 0; 1424 } 1425 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

1 0

sw_sync deadlock avoidance, take 3
by Chris Wilson 17 Jul '20

17 Jul '20

dma_fence_release() objects to a fence being freed before it is signaled, so instead of playing fancy tricks to avoid handling dying requests, let's keep the syncpt alive until signaled. This neatly removes the issue with having to decouple the syncpt from the timeline upon fence release. -Chris

4 10

[GIT PULL] mediatek drm next for 5.9
by Chun-Kuang Hu 16 Jul '20

16 Jul '20

Hi, Dave & Daniel: This include converting mtk_dsi to drm_bridge API. Regards, Chun-Kuang. The following changes since commit 5ab546f5e6309373aef01a8d398e163ab7a78431: drm/mediatek: mtk_hdmi: Remove debug messages for function calls (2020-07-05 06:39:21 +0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git tags/mediatek-drm-next-5.9 for you to fetch changes up to a9d9fea74be285a2885d8f3395042cc4dde27e6a: drm/mediatek: mtk_dsi: Create connector for bridges (2020-07-05 08:06:28 +0800) ---------------------------------------------------------------- Mediatek DRM Next for Linux 5.9 ---------------------------------------------------------------- Enric Balletbo i Serra (5): drm/mediatek: mtk_dsi: Rename bridge to next_bridge drm/mediatek: mtk_dsi: Convert to bridge driver drm/mediatek: mtk_dsi: Use simple encoder drm/mediatek: mtk_dsi: Use the drm_panel_bridge API drm/mediatek: mtk_dsi: Create connector for bridges drivers/gpu/drm/mediatek/mtk_dsi.c | 269 ++++++++++++++++++++++++----------------------------------------------------- 1 file changed, 84 insertions(+), 185 deletions(-)

1 0

[PATCH v3 01/12] drm/ingenic: Fix incorrect assumption about plane->index
by Paul Cercueil 16 Jul '20

16 Jul '20

plane->index is NOT the index of the color plane in a YUV frame. Actually, a YUV frame is represented by a single drm_plane, even though it contains three Y, U, V planes. v2-v3: No change Cc: stable(a)vger.kernel.org # v5.3 Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs") Signed-off-by: Paul Cercueil <paul(a)crapouillou.net> Acked-by: Sam Ravnborg <sam(a)ravnborg.org> --- drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c b/drivers/gpu/drm/ingenic/ingenic-drm.c index deb37b4a8e91..606d8acb0954 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c @@ -386,7 +386,7 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, addr = drm_fb_cma_get_gem_addr(state->fb, state, 0); width = state->src_w >> 16; height = state->src_h >> 16; - cpp = state->fb->format->cpp[plane->index]; + cpp = state->fb->format->cpp[0]; priv->dma_hwdesc->addr = addr; priv->dma_hwdesc->cmd = width * height * cpp / 4; -- 2.27.0

2 15

[PATCH 0/4] drm: core: Convert logging to drm_* functions.
by Suraj Upadhyay 16 Jul '20

16 Jul '20

This patchset converts logging to drm_* functions in drm core. The following functions have been converted to their respective DRM alternatives : dev_info() --> drm_info() dev_err() --> drm_err() dev_warn() --> drm_warn() dev_err_once() --> drm_err_once(). Suraj Upadhyay (4): drm: mipi-dsi: Convert logging to drm_* functions. drm: mipi-dbi: Convert logging to drm_* functions. drm: edid: Convert logging to drm_* functions. drm: fb-helper: Convert logging to drm_* functions. drivers/gpu/drm/drm_edid.c | 7 +++---- drivers/gpu/drm/drm_fb_helper.c | 2 +- drivers/gpu/drm/drm_mipi_dbi.c | 4 ++-- drivers/gpu/drm/drm_mipi_dsi.c | 15 +++++++-------- 4 files changed, 13 insertions(+), 15 deletions(-) -- 2.17.1

4 15

[PATCH] drm/tidss: Replace HTTP links with HTTPS ones
by Alexander A. Klimov 16 Jul '20

16 Jul '20

Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster(a)al2klimov.de> --- Continuing my work started at 93431e0607e5. See also: git log --oneline '--author=Alexander A. Klimov <grandmaster(a)al2klimov.de>' v5.7..master (Actually letting a shell for loop submit all this stuff for me.) If there are any URLs to be removed completely or at least not just HTTPSified: Just clearly say so and I'll *undo my change*. See also: https://lkml.org/lkml/2020/6/27/64 If there are any valid, but yet not changed URLs: See: https://lkml.org/lkml/2020/6/26/837 If you apply the patch, please let me know. Sorry again to all maintainers who complained about subject lines. Now I realized that you want an actually perfect prefixes, not just subsystem ones. I tried my best... And yes, *I could* (at least half-)automate it. Impossible is nothing! :) drivers/gpu/drm/tidss/tidss_crtc.c | 2 +- drivers/gpu/drm/tidss/tidss_crtc.h | 2 +- drivers/gpu/drm/tidss/tidss_dispc.c | 2 +- drivers/gpu/drm/tidss/tidss_dispc.h | 2 +- drivers/gpu/drm/tidss/tidss_dispc_regs.h | 2 +- drivers/gpu/drm/tidss/tidss_drv.c | 2 +- drivers/gpu/drm/tidss/tidss_drv.h | 2 +- drivers/gpu/drm/tidss/tidss_encoder.c | 2 +- drivers/gpu/drm/tidss/tidss_encoder.h | 2 +- drivers/gpu/drm/tidss/tidss_irq.c | 2 +- drivers/gpu/drm/tidss/tidss_irq.h | 2 +- drivers/gpu/drm/tidss/tidss_kms.c | 2 +- drivers/gpu/drm/tidss/tidss_kms.h | 2 +- drivers/gpu/drm/tidss/tidss_plane.c | 2 +- drivers/gpu/drm/tidss/tidss_plane.h | 2 +- drivers/gpu/drm/tidss/tidss_scale_coefs.c | 2 +- drivers/gpu/drm/tidss/tidss_scale_coefs.h | 2 +- 17 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tidss_crtc.c index 89a226912de8..a591c70b8386 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.c +++ b/drivers/gpu/drm/tidss/tidss_crtc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_crtc.h b/drivers/gpu/drm/tidss/tidss_crtc.h index 09e773666228..040d1205496b 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.h +++ b/drivers/gpu/drm/tidss/tidss_crtc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 629dd06393f6..e7d28ec8f7f3 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Jyri Sarha <jsarha(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index 902e612ff7ac..5984e0de2cd9 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h b/drivers/gpu/drm/tidss/tidss_dispc_regs.h index 88a83a41b6e3..13feedfe5d6d 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Jyri Sarha <jsarha(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c index 99edc66ebdef..f00fadbead3e 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_drv.h b/drivers/gpu/drm/tidss/tidss_drv.h index 3b0a3d87b7c4..7de4bba52e6f 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.h +++ b/drivers/gpu/drm/tidss/tidss_drv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_encoder.c b/drivers/gpu/drm/tidss/tidss_encoder.c index 30bf2a65949c..e278a9c89476 100644 --- a/drivers/gpu/drm/tidss/tidss_encoder.c +++ b/drivers/gpu/drm/tidss/tidss_encoder.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_encoder.h b/drivers/gpu/drm/tidss/tidss_encoder.h index 06854d66e7e6..ace877c0e0fd 100644 --- a/drivers/gpu/drm/tidss/tidss_encoder.h +++ b/drivers/gpu/drm/tidss/tidss_encoder.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_irq.c b/drivers/gpu/drm/tidss/tidss_irq.c index 1b80f2d62e0a..a5ec7931ef6b 100644 --- a/drivers/gpu/drm/tidss/tidss_irq.c +++ b/drivers/gpu/drm/tidss/tidss_irq.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_irq.h b/drivers/gpu/drm/tidss/tidss_irq.h index aa92db403cca..4aaad5dfd7c2 100644 --- a/drivers/gpu/drm/tidss/tidss_irq.h +++ b/drivers/gpu/drm/tidss/tidss_irq.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_kms.c b/drivers/gpu/drm/tidss/tidss_kms.c index 4b99e9fa84a5..71dbd331640f 100644 --- a/drivers/gpu/drm/tidss/tidss_kms.c +++ b/drivers/gpu/drm/tidss/tidss_kms.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_kms.h b/drivers/gpu/drm/tidss/tidss_kms.h index 99aaff099f22..632d79f5983f 100644 --- a/drivers/gpu/drm/tidss/tidss_kms.h +++ b/drivers/gpu/drm/tidss/tidss_kms.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_plane.c b/drivers/gpu/drm/tidss/tidss_plane.c index 0a563eabcbb9..43e72d0b2d84 100644 --- a/drivers/gpu/drm/tidss/tidss_plane.c +++ b/drivers/gpu/drm/tidss/tidss_plane.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_plane.h b/drivers/gpu/drm/tidss/tidss_plane.h index 80ff1c5a2535..e933e158b617 100644 --- a/drivers/gpu/drm/tidss/tidss_plane.h +++ b/drivers/gpu/drm/tidss/tidss_plane.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Tomi Valkeinen <tomi.valkeinen(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_scale_coefs.c b/drivers/gpu/drm/tidss/tidss_scale_coefs.c index 5ec68389cc68..c2b84fea89a5 100644 --- a/drivers/gpu/drm/tidss/tidss_scale_coefs.c +++ b/drivers/gpu/drm/tidss/tidss_scale_coefs.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Jyri Sarha <jsarha(a)ti.com> */ diff --git a/drivers/gpu/drm/tidss/tidss_scale_coefs.h b/drivers/gpu/drm/tidss/tidss_scale_coefs.h index 64b5af5b5361..9c560d0fdac0 100644 --- a/drivers/gpu/drm/tidss/tidss_scale_coefs.h +++ b/drivers/gpu/drm/tidss/tidss_scale_coefs.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ * Author: Jyri Sarha <jsarha(a)ti.com> */ -- 2.27.0

3 2

[PATCH] drm/vboxvideo: Replace HTTP links with HTTPS ones
by Alexander A. Klimov 16 Jul '20

16 Jul '20

3 2

[PATCH v2 1/2] drm/panel-simple: Fix inverted V/H SYNC for Frida FRD350H54004 panel
by Paul Cercueil 16 Jul '20

16 Jul '20

The FRD350H54004 panel was marked as having active-high VSYNC and HSYNC signals, which sorts-of worked, but resulted in the picture fading out under certain circumstances. Fix this issue by marking VSYNC and HSYNC signals active-low. v2: Rebase on drm-misc-next Fixes: 7b6bd8433609 ("drm/panel: simple: Add support for the Frida FRD350H54004 panel") Cc: stable(a)vger.kernel.org # v5.5 Signed-off-by: Paul Cercueil <paul(a)crapouillou.net> --- drivers/gpu/drm/panel/panel-simple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f42249b72548..8b0bab9dd075 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1763,7 +1763,7 @@ static const struct drm_display_mode frida_frd350h54004_mode = { .vsync_start = 240 + 2, .vsync_end = 240 + 2 + 6, .vtotal = 240 + 2 + 6 + 2, - .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; static const struct panel_desc frida_frd350h54004 = { -- 2.27.0

2 2

[PATCH v3 0/6] Generic USB Display driver
by Noralf Trønnes 16 Jul '20

16 Jul '20

Hi, A while back I had the idea to turn a Raspberry Pi Zero into a $5 USB to HDMI/SDTV/DSI/DPI display adapter. This series adds a USB host driver and a device/gadget driver to achieve that. The reason for calling it 'Generic' is so anyone can make a USB display/adapter against this driver, all that's needed is to add a USB vid:pid. I have done a microcontroller implementation hack just to see how that would work out[1] (which unconvered a couple of bugs in the host driver). The contents of the previous cover letter has been moved to the wiki[2] since it was getting rather long. I've made an image[3] with the gadget side set up for the Raspberry Pi for easy testing. Patch 4 is the only one needed for the host side. Merge plan I'm hoping to apply the remaining drm_client patches in time for 5.9. With that in place it's much easier to apply the patch for the USB subsystem the following merge window (5.10). Doing both in the same cycle is possible ofc, but due to the high rate of change in DRM this _can_ turn out to be tricky. There's no hurry to get the gadget side merged since I will provide images for the Raspberry Pi. The host driver I hope to apply in time for 5.9. Reviews and testing are very much welcome! Changes since version 2: - Use donated Openmoko USB pid: 1d50:614d - Use direct compression from framebuffer when pitch matches, not only on full frames, so split updates can benefit - Use __le16 in struct gud_drm_req_get_connector_status - Set edid property when the device only provides edid - Clear compression fields in struct gud_drm_req_set_buffer - Fix protocol version negotiation - Remove mode->vrefresh, it's calculated - drm_client_init_from_id(): remove locking - Applied reviewed patches, thanks Sam. Dependency: - backlight: Add backlight_device_get_by_name()[4] Noralf. [1] https://github.com/notro/gud/tree/master/STM32F769I-DISCO [2] https://github.com/notro/gud/wiki [3] https://github.com/notro/gud/wiki/rpi-image [4] https://git.kernel.org/pub/scm/linux/kernel/git/lee/backlight.git/commit/?h… Noralf Trønnes (6): drm/client: Add drm_client_init_from_id() drm/client: Add drm_client_modeset_disable() drm/client: Add a way to set modeset, properties and rotation drm: Add Generic USB Display driver drm/gud: Add functionality for the USB gadget side usb: gadget: function: Add Generic USB Display support .../ABI/testing/configfs-usb-gadget-gud_drm | 10 + MAINTAINERS | 10 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_client.c | 44 +- drivers/gpu/drm/drm_client_modeset.c | 157 +++ drivers/gpu/drm/gud/Kconfig | 20 + drivers/gpu/drm/gud/Makefile | 5 + drivers/gpu/drm/gud/gud_drm_connector.c | 726 ++++++++++ drivers/gpu/drm/gud/gud_drm_drv.c | 648 +++++++++ drivers/gpu/drm/gud/gud_drm_gadget.c | 1167 +++++++++++++++++ drivers/gpu/drm/gud/gud_drm_internal.h | 65 + drivers/gpu/drm/gud/gud_drm_pipe.c | 426 ++++++ drivers/usb/gadget/Kconfig | 12 + drivers/usb/gadget/function/Makefile | 2 + drivers/usb/gadget/function/f_gud_drm.c | 678 ++++++++++ include/drm/drm_client.h | 43 +- include/drm/gud_drm.h | 374 ++++++ 18 files changed, 4387 insertions(+), 3 deletions(-) create mode 100644 Documentation/ABI/testing/configfs-usb-gadget-gud_drm create mode 100644 drivers/gpu/drm/gud/Kconfig create mode 100644 drivers/gpu/drm/gud/Makefile create mode 100644 drivers/gpu/drm/gud/gud_drm_connector.c create mode 100644 drivers/gpu/drm/gud/gud_drm_drv.c create mode 100644 drivers/gpu/drm/gud/gud_drm_gadget.c create mode 100644 drivers/gpu/drm/gud/gud_drm_internal.h create mode 100644 drivers/gpu/drm/gud/gud_drm_pipe.c create mode 100644 drivers/usb/gadget/function/f_gud_drm.c create mode 100644 include/drm/gud_drm.h -- 2.23.0

5 27

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dri-devel July 2020