dri-devel July 2020

dri-devel@lists.freedesktop.org

336 participants
772 discussions

linux-next: manual merge of the tty tree with the drm-misc tree
by Stephen Rothwell 13 Jul '20

13 Jul '20

Hi all, Today's linux-next merge of the tty tree got a conflict in: drivers/video/fbdev/core/fbcon.c between commit: fcf918b96662 ("fbcon: Use array3_size() helper in scr_memcpyw()") from the drm-misc tree and commit: 28bc24fc46f9 ("vc: separate state") from the tty tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts. -- Cheers, Stephen Rothwell diff --cc drivers/video/fbdev/core/fbcon.c index af9f5ab96f74,86fe41b1deb8..000000000000 --- a/drivers/video/fbdev/core/fbcon.c +++ b/drivers/video/fbdev/core/fbcon.c @@@ -676,8 -676,8 +676,8 @@@ static void fbcon_prepare_logo(struct v q = (unsigned short *) (vc->vc_origin + vc->vc_size_row * rows); - scr_memcpyw(q, save, logo_lines * new_cols * 2); + scr_memcpyw(q, save, array3_size(logo_lines, new_cols, 2)); - vc->vc_y += logo_lines; + vc->state.y += logo_lines; vc->vc_pos += logo_lines * vc->vc_size_row; kfree(save); }

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[PATCH] drm/vkms: change the max cursor width/height
by Melissa Wen 12 Jul '20

12 Jul '20

This change expands the coverage for the IGT kms_cursor_crc test, where the size varies between 64 and 512 for a square cursor. With this, in addition to the cursor 64x64, this patch enables the test of cursors with sizes: 128x128, 256x256, and 512x512. Signed-off-by: Melissa Wen <melissa.srw(a)gmail.com> --- drivers/gpu/drm/vkms/vkms_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/drivers/gpu/drm/vkms/vkms_drv.c index 1e8b2169d834..57a8a397d5e8 100644 --- a/drivers/gpu/drm/vkms/vkms_drv.c +++ b/drivers/gpu/drm/vkms/vkms_drv.c @@ -133,6 +133,8 @@ static int vkms_modeset_init(struct vkms_device *vkmsdev) dev->mode_config.min_height = YRES_MIN; dev->mode_config.max_width = XRES_MAX; dev->mode_config.max_height = YRES_MAX; + dev->mode_config.cursor_width = 512; + dev->mode_config.cursor_height = 512; dev->mode_config.preferred_depth = 24; dev->mode_config.helper_private = &vkms_mode_config_helpers; -- 2.27.0

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[PATCH] drm: panel: simple: Fix bpc for LG LB070WV8 panel
by Laurent Pinchart 12 Jul '20

12 Jul '20

The LG LB070WV8 panel incorrectly reports a 16 bits per component value, while the panel uses 8 bits per component. Fix it. Fixes: dd0150026901 ("drm/panel: simple: Add support for LG LB070WV8 800x480 7" panel") Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com> --- drivers/gpu/drm/panel/panel-simple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 3a35f74d6cb7..dfb62821932a 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2365,7 +2365,7 @@ static const struct drm_display_mode lg_lb070wv8_mode = { static const struct panel_desc lg_lb070wv8 = { .modes = &lg_lb070wv8_mode, .num_modes = 1, - .bpc = 16, + .bpc = 8, .size = { .width = 151, .height = 91, -- Regards, Laurent Pinchart

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[radeon-alex:amd-staging-drm-next 677/1015] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1734:5: warning: no previous prototype for function 'sienna_cichlid_set_soft_freq_limited_range'
by kernel test robot 11 Jul '20

11 Jul '20

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next head: 3c831e196bd7543977d4acd506064636809f1dcf commit: ac7413ecad5e406065529cda0adaa29c353cc557 [677/1015] drm/amd/amdgpu: disable gfxoff to retrieve gfxclk config: powerpc64-randconfig-r004-20200710 (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 02946de3802d3bc65bc9f2eb9b8d4969b5a7add8) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc64 cross compiling tool for clang build # apt-get install binutils-powerpc64-linux-gnu git checkout ac7413ecad5e406065529cda0adaa29c353cc557 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> All warnings (new ones prefixed by >>): drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1718:5: warning: no previous prototype for function 'sienna_cichlid_get_dpm_ultimate_freq' [-Wmissing-prototypes] int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu, ^ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1718:1: note: declare 'static' if the function is not intended to be used outside of this translation unit int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu, ^ static >> drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1734:5: warning: no previous prototype for function 'sienna_cichlid_set_soft_freq_limited_range' [-Wmissing-prototypes] int sienna_cichlid_set_soft_freq_limited_range(struct smu_context *smu, ^ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1734:1: note: declare 'static' if the function is not intended to be used outside of this translation unit int sienna_cichlid_set_soft_freq_limited_range(struct smu_context *smu, ^ static 2 warnings generated. vim +/sienna_cichlid_set_soft_freq_limited_range +1734 drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c 1717 > 1718 int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu, 1719 enum smu_clk_type clk_type, 1720 uint32_t *min, uint32_t *max) 1721 { 1722 struct amdgpu_device *adev = smu->adev; 1723 int ret; 1724 1725 if (clk_type == SMU_GFXCLK) 1726 amdgpu_gfx_off_ctrl(adev, false); 1727 ret = smu_v11_0_get_dpm_ultimate_freq(smu, clk_type, min, max); 1728 if (clk_type == SMU_GFXCLK) 1729 amdgpu_gfx_off_ctrl(adev, true); 1730 1731 return ret; 1732 } 1733 > 1734 int sienna_cichlid_set_soft_freq_limited_range(struct smu_context *smu, 1735 enum smu_clk_type clk_type, 1736 uint32_t min, uint32_t max) 1737 { 1738 struct amdgpu_device *adev = smu->adev; 1739 int ret; 1740 1741 if (clk_type == SMU_GFXCLK) 1742 amdgpu_gfx_off_ctrl(adev, false); 1743 ret = smu_v11_0_set_soft_freq_limited_range(smu, clk_type, min, max); 1744 if (clk_type == SMU_GFXCLK) 1745 amdgpu_gfx_off_ctrl(adev, true); 1746 1747 return ret; 1748 } 1749 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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[radeon-alex:amd-staging-drm-next 628/1015] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c:268:17: sparse: sparse: cast removes address space '<asn:1>' of expression
by kernel test robot 11 Jul '20

11 Jul '20

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next head: 3c831e196bd7543977d4acd506064636809f1dcf commit: 10be8791067fc672e44fcaa7afb886390909a0c0 [628/1015] drm/amdkfd: Support Sienna_Cichlid KFD v4 config: x86_64-randconfig-s022-20200710 (attached as .config) compiler: gcc-9 (Debian 9.3.0-14) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.2-37-gc9676a3b-dirty git checkout 10be8791067fc672e44fcaa7afb886390909a0c0 # save the attached .config to linux build tree make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c:268:17: sparse: sparse: cast removes address space '<asn:1>' of expression drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c:270:17: sparse: sparse: cast removes address space '<asn:1>' of expression vim +268 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c 192 193 static int hqd_load_v10_3(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, 194 uint32_t queue_id, uint32_t __user *wptr, 195 uint32_t wptr_shift, uint32_t wptr_mask, 196 struct mm_struct *mm) 197 { 198 struct amdgpu_device *adev = get_amdgpu_device(kgd); 199 struct v10_compute_mqd *m; 200 uint32_t *mqd_hqd; 201 uint32_t reg, hqd_base, data; 202 203 m = get_mqd(mqd); 204 205 pr_debug("Load hqd of pipe %d queue %d\n", pipe_id, queue_id); 206 acquire_queue(kgd, pipe_id, queue_id); 207 208 /* HIQ is set during driver init period with vmid set to 0*/ 209 if (m->cp_hqd_vmid == 0) { 210 uint32_t value, mec, pipe; 211 212 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; 213 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); 214 215 pr_debug("kfd: set HIQ, mec:%d, pipe:%d, queue:%d.\n", 216 mec, pipe, queue_id); 217 value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS)); 218 value = REG_SET_FIELD(value, RLC_CP_SCHEDULERS, scheduler1, 219 ((mec << 5) | (pipe << 3) | queue_id | 0x80)); 220 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value); 221 } 222 223 /* HQD registers extend from CP_MQD_BASE_ADDR to CP_HQD_EOP_WPTR_MEM. */ 224 mqd_hqd = &m->cp_mqd_base_addr_lo; 225 hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR); 226 227 for (reg = hqd_base; 228 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) 229 WREG32(reg, mqd_hqd[reg - hqd_base]); 230 231 232 /* Activate doorbell logic before triggering WPTR poll. */ 233 data = REG_SET_FIELD(m->cp_hqd_pq_doorbell_control, 234 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); 235 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL), data); 236 237 if (wptr) { 238 /* Don't read wptr with get_user because the user 239 * context may not be accessible (if this function 240 * runs in a work queue). Instead trigger a one-shot 241 * polling read from memory in the CP. This assumes 242 * that wptr is GPU-accessible in the queue's VMID via 243 * ATC or SVM. WPTR==RPTR before starting the poll so 244 * the CP starts fetching new commands from the right 245 * place. 246 * 247 * Guessing a 64-bit WPTR from a 32-bit RPTR is a bit 248 * tricky. Assume that the queue didn't overflow. The 249 * number of valid bits in the 32-bit RPTR depends on 250 * the queue size. The remaining bits are taken from 251 * the saved 64-bit WPTR. If the WPTR wrapped, add the 252 * queue size. 253 */ 254 uint32_t queue_size = 255 2 << REG_GET_FIELD(m->cp_hqd_pq_control, 256 CP_HQD_PQ_CONTROL, QUEUE_SIZE); 257 uint64_t guessed_wptr = m->cp_hqd_pq_rptr & (queue_size - 1); 258 259 if ((m->cp_hqd_pq_wptr_lo & (queue_size - 1)) < guessed_wptr) 260 guessed_wptr += queue_size; 261 guessed_wptr += m->cp_hqd_pq_wptr_lo & ~(queue_size - 1); 262 guessed_wptr += (uint64_t)m->cp_hqd_pq_wptr_hi << 32; 263 264 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_LO), 265 lower_32_bits(guessed_wptr)); 266 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI), 267 upper_32_bits(guessed_wptr)); > 268 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), 269 lower_32_bits((uint64_t)wptr)); 270 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI), 271 upper_32_bits((uint64_t)wptr)); 272 pr_debug("%s setting CP_PQ_WPTR_POLL_CNTL1 to %x\n", __func__, 273 (uint32_t)get_queue_mask(adev, pipe_id, queue_id)); 274 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL1), 275 (uint32_t)get_queue_mask(adev, pipe_id, queue_id)); 276 } 277 278 /* Start the EOP fetcher */ 279 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR), 280 REG_SET_FIELD(m->cp_hqd_eop_rptr, 281 CP_HQD_EOP_RPTR, INIT_FETCHER, 1)); 282 283 data = REG_SET_FIELD(m->cp_hqd_active, CP_HQD_ACTIVE, ACTIVE, 1); 284 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); 285 286 release_queue(kgd); 287 288 return 0; 289 } 290 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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[PATCH 0/2] drm/msm/adreno: cleanup some packet building
by Rob Clark 11 Jul '20

11 Jul '20

From: Rob Clark <robdclark(a)chromium.org> Resync generated headers, which we haven't done in a while, and cleanup some open coded packet building. Rob Clark (2): drm/msm: sync generated headers drm/msm/adreno: un-open-code some packets drivers/gpu/drm/msm/adreno/a2xx.xml.h | 1102 +++++++- drivers/gpu/drm/msm/adreno/a3xx.xml.h | 85 +- drivers/gpu/drm/msm/adreno/a4xx.xml.h | 87 +- drivers/gpu/drm/msm/adreno/a5xx.xml.h | 156 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 5 +- drivers/gpu/drm/msm/adreno/a6xx.xml.h | 2305 ++++++++++++++--- drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 28 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +- .../gpu/drm/msm/adreno/adreno_common.xml.h | 29 +- drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 932 ++++++- drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h | 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h | 2 +- drivers/gpu/drm/msm/disp/mdp_common.xml.h | 2 +- drivers/gpu/drm/msm/dsi/dsi.xml.h | 208 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 14 +- drivers/gpu/drm/msm/dsi/mmss_cc.xml.h | 2 +- drivers/gpu/drm/msm/dsi/sfpb.xml.h | 2 +- drivers/gpu/drm/msm/edp/edp.xml.h | 2 +- drivers/gpu/drm/msm/hdmi/hdmi.xml.h | 2 +- drivers/gpu/drm/msm/hdmi/qfprom.xml.h | 2 +- 20 files changed, 4328 insertions(+), 650 deletions(-) -- 2.26.2

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[PATCH v4 00/15] acpi/pwm/i915: Convert pwm-crc and i915 driver's PWM code to use the atomic PWM API
by Hans de Goede 11 Jul '20

11 Jul '20

Hi All, Here is v4 of my patch series converting the i915 driver's code for controlling the panel's backlight with an external PWM controller to use the atomic PWM API. See below for the changelog. Initially the plan was for this series to consist of 2 parts: 1. convert the pwm-crc driver to support the atomic PWM API and 2. convert the i915 driver's PWM code to use the atomic PWM API. But during testing I've found a number of bugs in the pwm-lpss and I found that the acpi_lpss code needs some special handling because of some ugliness found in most Cherry Trail DSDTs. So now this series has grown somewhat large and consists of 4 parts: 1. acpi_lpss fixes workarounds for Cherry Trail DSTD nastiness 2. various fixes to the pwm-lpss driver 3. convert the pwm-crc driver to support the atomic PWM API and 4. convert the i915 driver's PWM code to use the atomic PWM API The involved acpi_lpss and pwm drivers do not see a whole lot of churn, so the plan is to merge this all through drm-intel-next-queued (dinq) once all the patches are reviewed / have acks. In v4 the ACPI patches have been Acked by Rafael and the i915 patches have been acked by Jani. So that just leaves the PWM patches. Uwe can I get your ok / ack for merging this through the dinq branch once you have acked al the PWM patches ? This series has been tested (and re-tested after adding various bug-fixes) extensively. It has been tested on the following devices: -Asus T100TA BYT + CRC-PMIC PWM -Toshiba WT8-A BYT + CRC-PMIC PWM -Thundersoft TS178 BYT + CRC-PMIC PWM, inverse PWM -Asus T100HA CHT + CRC-PMIC PWM -Terra Pad 1061 BYT + LPSS PWM -Trekstor Twin 10.1 BYT + LPSS PWM -Asus T101HA CHT + CRC-PMIC PWM -GPD Pocket CHT + CRC-PMIC PWM Changelog: Changes in v2: - Fix coverletter subject - Drop accidentally included debugging patch - "[PATCH v3 02/15] ACPI / LPSS: Save Cherry Trail PWM ctx registers only once ( - Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX Changes in v3: - "[PATCH v3 04/15] pwm: lpss: Add range limit check for the base_unit register value" - Use base_unit_range - 1 as maximum value for the clamp() - "[PATCH v3 05/15] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume" - This replaces the "pwm: lpss: Set SW_UPDATE bit when enabling the PWM" patch from previous versions of this patch-set, which really was a hack working around the resume issue which this patch fixes properly. - PATCH v3 6 - 11 pwm-crc changes: - Various small changes resulting from the reviews by Andy and Uwe, including some refactoring of the patches to reduce the amount of churn in the patch-set Changes in v4: - "[PATCH v4 06/16] pwm: lpss: Correct get_state result for base_unit == 0" - This is a new patch in v4 of this patchset - "[PATCH v4 12/16] pwm: crc: Implement get_state() method" - Use DIV_ROUND_UP when calculating the period and duty_cycle values - "[PATCH v4 16/16] drm/i915: panel: Use atomic PWM API for devs with an external PWM controller" - Add a note to the commit message about the changes in pwm_disable_backlight() - Use the pwm_set/get_relative_duty_cycle() helpers Regards, Hans

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[radeon-alex:amd-staging-drm-next 468/1015] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:172:15: sparse: sparse: incorrect type in argument 1 (different address spaces)
by kernel test robot 11 Jul '20

11 Jul '20

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next head: 3c831e196bd7543977d4acd506064636809f1dcf commit: 3a2b9affb4c366dac8a088156c644cf329701816 [468/1015] drm/amdkfd: Track SDMA utilization per process config: x86_64-randconfig-s022-20200710 (attached as .config) compiler: gcc-9 (Debian 9.3.0-14) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.2-37-gc9676a3b-dirty git checkout 3a2b9affb4c366dac8a088156c644cf329701816 # save the attached .config to linux build tree make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> sparse warnings: (new ones prefixed by >>) drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:140:6: sparse: sparse: symbol 'increment_queue_count' was not declared. Should it be static? drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:148:6: sparse: sparse: symbol 'decrement_queue_count' was not declared. Should it be static? >> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:172:15: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] <asn:1> * @@ got unsigned long long [usertype] * @@ >> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:172:15: sparse: expected void const volatile [noderef] <asn:1> * drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:172:15: sparse: got unsigned long long [usertype] * vim +172 drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c 139 > 140 void increment_queue_count(struct device_queue_manager *dqm, 141 enum kfd_queue_type type) 142 { 143 dqm->active_queue_count++; 144 if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ) 145 dqm->active_cp_queue_count++; 146 } 147 148 void decrement_queue_count(struct device_queue_manager *dqm, 149 enum kfd_queue_type type) 150 { 151 dqm->active_queue_count--; 152 if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ) 153 dqm->active_cp_queue_count--; 154 } 155 156 int read_sdma_queue_counter(struct queue *q, uint64_t *val) 157 { 158 int ret; 159 uint64_t tmp = 0; 160 161 if (!q || !val) 162 return -EINVAL; 163 /* 164 * SDMA activity counter is stored at queue's RPTR + 0x8 location. 165 */ 166 if (!access_ok((const void __user *)((uint64_t)q->properties.read_ptr + 167 sizeof(uint64_t)), sizeof(uint64_t))) { 168 pr_err("Can't access sdma queue activity counter\n"); 169 return -EFAULT; 170 } 171 > 172 ret = get_user(tmp, (uint64_t *)((uint64_t)(q->properties.read_ptr) + 173 sizeof(uint64_t))); 174 if (!ret) { 175 *val = tmp; 176 } 177 178 return ret; 179 } 180 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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[PATCH v2] drm/atomic_helper: add a flag for duplicating drm_private_obj state
by Shawn Guo 11 Jul '20

11 Jul '20

From: Shawn Guo <shawn.guo(a)linaro.org> The msm/mdp5 driver uses state of drm_private_obj as its global atomic state, which keeps the assignment of hwpipe to plane. With drm_private_obj missing from duplicate state call in context of atomic suspend/resume helpers, mdp5 suspend works with no problem only for the very first time. Any subsequent suspend will hit the following warning, because hwpipe assignment doesn't get duplicated for suspend state. $ echo mem > /sys/power/state [ 38.111144] PM: suspend entry (deep) [ 38.111185] PM: Syncing filesystems ... done. [ 38.114630] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 38.115912] OOM killer disabled. [ 38.115914] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 38.122170] ------------[ cut here ]------------ [ 38.122212] WARNING: CPU: 0 PID: 1747 at drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c:145 mdp5_pipe_release+0x90/0xc0 [ 38.122215] Modules linked in: [ 38.122222] CPU: 0 PID: 1747 Comm: sh Not tainted 4.19.107-00515-g9d5e4d7a33ed-dirty #323 [ 38.122224] Hardware name: Square, Inc. T2 Devkit (DT) [ 38.122228] pstate: 40000005 (nZcv daif -PAN -UAO) [ 38.122230] pc : mdp5_pipe_release+0x90/0xc0 [ 38.122233] lr : mdp5_pipe_release+0x90/0xc0 [ 38.122235] sp : ffff00000d13b7f0 [ 38.122236] x29: ffff00000d13b7f0 x28: 0000000000000000 [ 38.122240] x27: 0000000000000002 x26: ffff800079adce00 [ 38.122243] x25: ffff800079405200 x24: 0000000000000000 [ 38.122246] x23: ffff80007a78cc08 x22: ffff80007b1cc018 [ 38.122249] x21: ffff80007b1cc000 x20: ffff80007b317080 [ 38.122252] x19: ffff80007a78ce80 x18: 0000000000020000 [ 38.122255] x17: 0000000000000000 x16: 0000000000000000 [ 38.122258] x15: 00000000fffffff0 x14: ffff000008c3fb48 [ 38.122261] x13: ffff000008cdac4a x12: ffff000008c3f000 [ 38.122264] x11: 0000000000000000 x10: ffff000008cda000 [ 38.122267] x9 : 0000000000000000 x8 : ffff000008ce4a40 [ 38.122269] x7 : 0000000000000000 x6 : 0000000039ea41a9 [ 38.122272] x5 : 0000000000000000 x4 : 0000000000000000 [ 38.122275] x3 : ffffffffffffffff x2 : c7580c109cae4500 [ 38.122278] x1 : 0000000000000000 x0 : 0000000000000024 [ 38.122281] Call trace: [ 38.122285] mdp5_pipe_release+0x90/0xc0 [ 38.122288] mdp5_plane_atomic_check+0x2c0/0x448 [ 38.122294] drm_atomic_helper_check_planes+0xd0/0x208 [ 38.122298] drm_atomic_helper_check+0x38/0xa8 [ 38.122302] drm_atomic_check_only+0x3e8/0x630 [ 38.122305] drm_atomic_commit+0x18/0x58 [ 38.122309] __drm_atomic_helper_disable_all.isra.12+0x15c/0x1a8 [ 38.122312] drm_atomic_helper_suspend+0x80/0xf0 [ 38.122316] msm_pm_suspend+0x4c/0x70 [ 38.122320] dpm_run_callback.isra.6+0x20/0x68 [ 38.122323] __device_suspend+0x110/0x308 [ 38.122326] dpm_suspend+0x100/0x1f0 [ 38.122329] dpm_suspend_start+0x64/0x70 [ 38.122334] suspend_devices_and_enter+0x110/0x500 [ 38.122336] pm_suspend+0x268/0x2c0 [ 38.122339] state_store+0x88/0x110 [ 38.122345] kobj_attr_store+0x14/0x28 [ 38.122352] sysfs_kf_write+0x3c/0x50 [ 38.122355] kernfs_fop_write+0x118/0x1e0 [ 38.122360] __vfs_write+0x30/0x168 [ 38.122363] vfs_write+0xa4/0x1a8 [ 38.122366] ksys_write+0x64/0xe8 [ 38.122368] __arm64_sys_write+0x18/0x20 [ 38.122374] el0_svc_common+0x6c/0x178 [ 38.122377] el0_svc_compat_handler+0x1c/0x28 [ 38.122381] el0_svc_compat+0x8/0x18 [ 38.122383] ---[ end trace 24145b7d8545345b ]--- [ 38.491552] Disabling non-boot CPUs ... Let's add a flag for duplicating the state of drm_private_obj and set the flag from msm/mdp5 driver, so that the problem can be fixed while other drivers using drm_private_obj stay unaffected. Signed-off-by: Shawn Guo <shawn.guo(a)linaro.org> --- Changes for v2: - Add a flag to duplicate the state of drm_private_obj conditionally, so that other drivers using drm_private_obj stay unaffected. drivers/gpu/drm/drm_atomic_helper.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 7 +++++++ include/drm/drm_atomic.h | 11 +++++++++++ 3 files changed, 40 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 85d163f16801..4bf041730b9e 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -3140,6 +3140,7 @@ drm_atomic_helper_duplicate_state(struct drm_device *dev, struct drm_atomic_state *state; struct drm_connector *conn; struct drm_connector_list_iter conn_iter; + struct drm_private_obj *priv_obj; struct drm_plane *plane; struct drm_crtc *crtc; int err = 0; @@ -3184,6 +3185,19 @@ drm_atomic_helper_duplicate_state(struct drm_device *dev, } drm_connector_list_iter_end(&conn_iter); + drm_for_each_privobj(priv_obj, dev) { + struct drm_private_state *priv_state; + + if (!priv_obj->needs_duplicate_state) + continue; + + priv_state = drm_atomic_get_private_obj_state(state, priv_obj); + if (IS_ERR(priv_state)) { + err = PTR_ERR(priv_state); + goto free; + } + } + /* clear the acquire context so that it isn't accidentally reused */ state->acquire_ctx = NULL; @@ -3278,6 +3292,8 @@ int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state, struct drm_connector_state *new_conn_state; struct drm_crtc *crtc; struct drm_crtc_state *new_crtc_state; + struct drm_private_state *new_priv_state; + struct drm_private_obj *priv_obj; state->acquire_ctx = ctx; @@ -3290,6 +3306,12 @@ int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state, for_each_new_connector_in_state(state, connector, new_conn_state, i) state->connectors[i].old_state = connector->state; + for_each_new_private_obj_in_state(state, priv_obj, new_priv_state, i) { + if (!priv_obj->needs_duplicate_state) + continue; + state->private_objs[i].old_state = priv_obj->state; + } + ret = drm_atomic_commit(state); state->acquire_ctx = NULL; diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index 19ec48695ffb..20971c75f3a2 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -139,6 +139,13 @@ static int mdp5_global_obj_init(struct mdp5_kms *mdp5_kms) drm_atomic_private_obj_init(mdp5_kms->dev, &mdp5_kms->glob_state, &state->base, &mdp5_global_state_funcs); + + /* + * Set needs_duplicate_state flag, as we have assignment of hwpipe in + * global atomic state that needs to be duplicated for suspend state. + */ + mdp5_kms->glob_state.needs_duplicate_state = true; + return 0; } diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h index 7b6cb4774e7d..72d35ca7b59e 100644 --- a/include/drm/drm_atomic.h +++ b/include/drm/drm_atomic.h @@ -273,6 +273,17 @@ struct drm_private_obj { * &drm_private_state_funcs. */ const struct drm_private_state_funcs *funcs; + + /** + * @needs_duplicate_state: + * + * A flag that's set by driver in order to duplicate the state of this + * private object in drm_atomic_helper_duplicate_state(). It's required + * by drivers like msm/mdp5 where the state is used as the driver global + * atomic state, and needs to be duplicated in context of suspend helper + * drm_atomic_helper_suspend(), restored on drm_atomic_helper_resume(). + */ + bool needs_duplicate_state; }; /** -- 2.17.1

2 1

[PATCH RESEND v2 1/2] drm/bridge: dw-hdmi: Don't cleanup i2c adapter and ddc ptr in __dw_hdmi_probe() bailout path
by Liu Ying 11 Jul '20

11 Jul '20

It's unnecessary to cleanup the i2c adapter and the ddc pointer in the bailout path of __dw_hdmi_probe(), since the adapter is not added and the ddc pointer is not set. Fixes: a23d6265f033 (drm: bridge: dw-hdmi: Extract PHY interrupt setup to a function) Cc: Andrzej Hajda <a.hajda(a)samsung.com> Cc: Neil Armstrong <narmstrong(a)baylibre.com> Cc: Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> Cc: Jonas Karlman <jonas(a)kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec(a)siol.net> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Boris Brezillon <boris.brezillon(a)collabora.com> Cc: Jerome Brunet <jbrunet(a)baylibre.com> Cc: Cheng-Yi Chiang <cychiang(a)chromium.org> Cc: Dariusz Marcinkiewicz <darekm(a)google.com> Cc: Archit Taneja <architt(a)codeaurora.org> Cc: Jose Abreu <joabreu(a)synopsys.com> Cc: dri-devel(a)lists.freedesktop.org Cc: NXP Linux Team <linux-imx(a)nxp.com> Signed-off-by: Liu Ying <victor.liu(a)nxp.com> Reviewed-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> --- v1->v2: * Add Laurent's R-b tag. drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index 6148a02..137b6eb 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c @@ -3441,11 +3441,6 @@ __dw_hdmi_probe(struct platform_device *pdev, return hdmi; err_iahb: - if (hdmi->i2c) { - i2c_del_adapter(&hdmi->i2c->adap); - hdmi->ddc = NULL; - } - clk_disable_unprepare(hdmi->iahb_clk); if (hdmi->cec_clk) clk_disable_unprepare(hdmi->cec_clk); -- 2.7.4

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dri-devel July 2020