This patch series cleans up the DDC code a little bit so that
it is more efficient time wise and supports grabbing the EDID
of the eDP panel over the aux channel. I timed this on a board
I have on my desk and it takes about 20ms to grab the EDID out
of the panel and make sure it is valid.
The first two patches seem less controversial so I stuck them at
the beginning. The third patch does the EDID reading and caches
it so we don't have to keep grabbing it over and over again. And
finally the …
[View More]last patch updates the reply field so that short
reads and nacks over the channel are reflected properly instead of
treating them as some sort of error that can't be discerned.
Stephen Boyd (4):
drm/bridge: ti-sn65dsi86: Combine register accesses in
ti_sn_aux_transfer()
drm/bridge: ti-sn65dsi86: Make polling a busy loop
drm/bridge: ti-sn65dsi86: Read EDID blob over DDC
drm/bridge: ti-sn65dsi86: Update reply on aux failures
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 108 ++++++++++++++++++--------
1 file changed, 75 insertions(+), 33 deletions(-)
Cc: Douglas Anderson <dianders(a)chromium.org>
Cc: Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com>
Cc: Jonas Karlman <jonas(a)kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec(a)siol.net>
Cc: Sean Paul <seanpaul(a)chromium.org>
base-commit: 3650b228f83adda7e5ee532e2b90429c03f7b9ec
--
Sent by a computer, using git, on the internet
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s/modueles/modules/ ....two different places
Signed-off-by: Bhaskar Chowdhury <unixbhaskar(a)gmail.com>
---
drivers/gpu/drm/msm/dp/dp_power.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_power.h b/drivers/gpu/drm/msm/dp/dp_power.h
index 7d0327bbc0d5..e3f959ffae12 100644
--- a/drivers/gpu/drm/msm/dp/dp_power.h
+++ b/drivers/gpu/drm/msm/dp/dp_power.h
@@ -88,7 +88,7 @@ int dp_power_client_init(struct dp_power *power);
* return: 0 for …
[View More]success, error for failure.
*
* This API will de-initialize the DisplayPort's clocks and regulator
- * modueles.
+ * modules.
*/
void dp_power_client_deinit(struct dp_power *power);
@@ -100,7 +100,7 @@ void dp_power_client_deinit(struct dp_power *power);
*
* This API will configure the DisplayPort's power module and provides
* methods to be called by the client to configure the power related
- * modueles.
+ * modules.
*/
struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser);
--
2.20.1
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s/struture/structure/
Signed-off-by: Bhaskar Chowdhury <unixbhaskar(a)gmail.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index 09a3fb3e89f5..bb9ceadeb0bb 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -343,7 +343,7 @@ enum dpu_3d_blend_mode {
/** struct …
[View More]dpu_format - defines the format configuration which
* allows DPU HW to correctly fetch and decode the format
- * @base: base msm_format struture containing fourcc code
+ * @base: base msm_format structure containing fourcc code
* @fetch_planes: how the color components are packed in pixel format
* @element: element color ordering
* @bits: element bit widths
--
2.31.0
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On Mon, 22 Mar 2021 16:01:54 +0100
Christoph Hellwig <hch(a)lst.de> wrote:
> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> index 8ce36c1d53ca11..db7e782419d5d9 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -332,19 +332,6 @@ struct vfio_region_info_cap_type {
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
> #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
>
> -/* 10de vendor PCI sub-types */
> …
[View More]-/*
> - * NVIDIA GPU NVlink2 RAM is coherent RAM mapped onto the host address space.
> - */
> -#define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1)
> -
> -/* 1014 vendor PCI sub-types */
> -/*
> - * IBM NPU NVlink2 ATSD (Address Translation Shootdown) register of NPU
> - * to do TLB invalidation on a GPU.
> - */
> -#define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1)
> -
> /* sub-types for VFIO_REGION_TYPE_GFX */
> #define VFIO_REGION_SUBTYPE_GFX_EDID (1)
>
> @@ -637,33 +624,6 @@ struct vfio_device_migration_info {
> */
> #define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE 3
>
> -/*
> - * Capability with compressed real address (aka SSA - small system address)
> - * where GPU RAM is mapped on a system bus. Used by a GPU for DMA routing
> - * and by the userspace to associate a NVLink bridge with a GPU.
> - */
> -#define VFIO_REGION_INFO_CAP_NVLINK2_SSATGT 4
> -
> -struct vfio_region_info_cap_nvlink2_ssatgt {
> - struct vfio_info_cap_header header;
> - __u64 tgt;
> -};
> -
> -/*
> - * Capability with an NVLink link speed. The value is read by
> - * the NVlink2 bridge driver from the bridge's "ibm,nvlink-speed"
> - * property in the device tree. The value is fixed in the hardware
> - * and failing to provide the correct value results in the link
> - * not working with no indication from the driver why.
> - */
> -#define VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD 5
> -
> -struct vfio_region_info_cap_nvlink2_lnkspd {
> - struct vfio_info_cap_header header;
> - __u32 link_speed;
> - __u32 __pad;
> -};
> -
> /**
> * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
> * struct vfio_irq_info)
I'll leave any attempt to defend keeping this code to Alexey, but
minimally these region sub-types and capability IDs should probably be
reserved to avoid breaking whatever userspace might exist to consume
these. Our ID space is sufficiently large that we don't need to
recycle them any time soon. Thanks,
Alex
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