dri-devel March 2021

dri-devel@lists.freedesktop.org

326 participants
867 discussions

[PATCH 1/2] drm/i915: add gem/gt TODO
by Daniel Vetter 24 Mar '21

24 Mar '21

We've discussed a bit how to get the gem/gt team better integrated and collaborate more with the wider community and agreed to the following: - all gem/gt patches are reviewed on dri-devel for now. That's overkill, but in the past there was definitely too little of that. - i915-gem folks are encouraged to cross review core patches from other teams - big features (especially uapi changes) need to be discussed in an rfc patch that documents the interface and big picture design, before we get lost in the details of the code - Also a rough TODO (can be refined as we go ofc) to get gem/gt back on track, like we've e.g. done with DAL/DC to get that in shape. Cc: Jani Nikula <jani.nikula(a)linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Cc: Jason Ekstrand <jason(a)jlekstrand.net> Cc: Dave Airlie <airlied(a)redhat.com> Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> --- drivers/gpu/drm/i915/TODO.txt | 36 +++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 drivers/gpu/drm/i915/TODO.txt diff --git a/drivers/gpu/drm/i915/TODO.txt b/drivers/gpu/drm/i915/TODO.txt new file mode 100644 index 000000000000..d2e5bbb6339d --- /dev/null +++ b/drivers/gpu/drm/i915/TODO.txt @@ -0,0 +1,36 @@ +gem/gt TODO items +----------------- + +- For discrete memory manager, merge enough dg1 to be able to refactor it to + TTM. Then land pci ids (just in case that turns up an uapi problem). TTM has + improved a lot the past 2 years, there's no reason anymore not to use it. + +- Come up with a plan what to do with drm/scheduler and how to get there. + +- There's a lot of complexity added past few years to make relocations faster. + That doesn't make sense given hw and gpu apis moved away from this model years + ago: + 1. Land a modern pre-bound uapi like VM_BIND + 2. Any complexity added in this area past few years which can't be justified + with VM_BIND using userspace should be removed. Looking at amdgpu dma_resv on + the bo and vm, plus some lru locks is all that needed. No complex rcu, + refcounts, caching, ... on everything. + This is the matching task on the vm side compared to ttm/dma_resv on the + backing storage side. + +- i915_sw_fence seems to be the main structure for the i915-gem dma_fence model. + How-to-dma_fence is core and drivers really shouldn't build their own world + here, treating everything else as a fixed platform. i915_sw_fence concepts + should be moved to dma_fence, drm/scheduler or atomic commit helpers. Or + removed if dri-devel consensus is that it's not a good idea. Once that's done + maybe even remove it if there's nothing left. + +Smaller things: +- i915_utils.h needs to be moved to the right places. + +- dma_fence_work should be in drivers/dma-buf + +- i915_mm.c should be moved to the right places. Some of the helpers also look a + bit fishy: + + https://lore.kernel.org/linux-mm/20210301083320.943079-1-hch@lst.de/ -- 2.31.0

7 15

RE: [Intel-gfx] [PATCH 2/2] drm/hdcp: DP HDCP2.2 errata LC_Send_L_Prime=16
by Gupta, Anshuman 24 Mar '21

24 Mar '21

> -----Original Message----- > From: Nautiyal, Ankit K <ankit.k.nautiyal(a)intel.com> > Sent: Wednesday, March 24, 2021 10:16 AM > To: Gupta, Anshuman <anshuman.gupta(a)intel.com>; intel- > gfx(a)lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 2/2] drm/hdcp: DP HDCP2.2 errata > LC_Send_L_Prime=16 > > Change is as per the errata. LGTM. > > Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal(a)intel.com> Hi Maarten , Could you please provide your Ack to merge it via drm-intel-next, since it is a small change. Thanks, Anshuman Gupta. > > On 1/27/2021 1:54 PM, Anshuman Gupta wrote: > > Fix LC_Send_L_Prime message timeout to 16 as documented in DP HDCP 2.2 > > errata page 3. > > > > https://www.digital-cp.com/sites/default/files/HDCP%202_2_DisplayPort_ > > Errata_v3_0.pdf > > > > Cc: Ramalingam C <ramalingam.c(a)intel.com> > > Signed-off-by: Anshuman Gupta <anshuman.gupta(a)intel.com> > > --- > > include/drm/drm_hdcp.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index > > 2b165a0f434f..0b1111e3228e 100644 > > --- a/include/drm/drm_hdcp.h > > +++ b/include/drm/drm_hdcp.h > > @@ -231,7 +231,7 @@ struct hdcp2_rep_stream_ready { > > #define HDCP_2_2_PAIRING_TIMEOUT_MS 200 > > #define HDCP_2_2_DP_PAIRING_READ_TIMEOUT_MS 5 > > #define HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS 20 > > -#define HDCP_2_2_DP_LPRIME_TIMEOUT_MS 7 > > +#define HDCP_2_2_DP_LPRIME_TIMEOUT_MS 16 > > #define HDCP_2_2_RECVID_LIST_TIMEOUT_MS 3000 > > #define HDCP_2_2_STREAM_READY_TIMEOUT_MS 100 > >

1 0

[PATCH] video: mmp: Few typo fixes
by Bhaskar Chowdhury 24 Mar '21

24 Mar '21

s/configed/configured/ s/registed/registered/ s/defintions/definitions/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar(a)gmail.com> --- include/video/mmp_disp.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/video/mmp_disp.h b/include/video/mmp_disp.h index 77252cb46361..ea8b4331b7a1 100644 --- a/include/video/mmp_disp.h +++ b/include/video/mmp_disp.h @@ -172,7 +172,7 @@ struct mmp_panel { /* use node to register to list */ struct list_head node; const char *name; - /* path name used to connect to proper path configed */ + /* path name used to connect to proper path configured */ const char *plat_path_name; struct device *dev; int panel_type; @@ -291,7 +291,7 @@ static inline int mmp_overlay_set_addr(struct mmp_overlay *overlay, * it defined a common interface that plat driver need to implement */ struct mmp_path_info { - /* driver data, set when registed*/ + /* driver data, set when registered*/ const char *name; struct device *dev; int id; @@ -309,7 +309,7 @@ extern void mmp_unregister_path(struct mmp_path *path); extern void mmp_register_panel(struct mmp_panel *panel); extern void mmp_unregister_panel(struct mmp_panel *panel); -/* defintions for platform data */ +/* definitions for platform data */ /* interface for buffer driver */ struct mmp_buffer_driver_mach_info { const char *name; -- 2.31.0

3 2

[pull] amdgpu, amdkfd, radeon drm-next-5.13
by Alex Deucher 24 Mar '21

24 Mar '21

Hi Dave, Daniel, Same as the last one, but with typo in one of the sign offs fixed. The following changes since commit 6e80fb8ab04f6c4f377e2fd422bdd1855beb7371: drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2) (2021-02-18 16:43:09 -0500) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-next-5.13-2021-03-23 for you to fetch changes up to 8c44390d8872ebf3a28558b59a0074df39b3da8f: drm/amdkfd: Bump KFD API version (2021-03-23 23:40:55 -0400) ---------------------------------------------------------------- amd-drm-next-5.13-2021-03-23: amdgpu: - Debugfs cleanup - Various cleanups and spelling fixes - Flexible array cleanups - Initial AMD Freesync HDMI - Display fixes - 10bpc dithering improvements - Display ASSR support - Clean up and unify powerplay and swsmu interfaces - Vangogh fixes - Add SMU gfx busy queues for RV/PCO - PCIE DPM fixes - S0ix fixes - GPU metrics data fixes - DCN secure display support - Backlight type override - Add initial support for Aldebaran - RAS fixes - Prime fixes for A+A systems - Reset fixes - Initial resource cursor support - Drop legacy IO BAR requirements - Various power fixes amdkfd: - MMU notifier fixes - APU fixes radeon: - Debugfs cleanups - Flexible array cleanups UAPI: - amdgpu: Add a new INFO ioctl interface to query video capabilities rather than hardcoding them in userspace. This allows us to provide fine grained asic capabilities (e.g., if a particular part is bandwidth limited, we can limit the capabilities). Proposed userspace: https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps - amdkfd: bump the driver version. There was a problem with reporting some RAS features on older versions of the driver. Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c… ---------------------------------------------------------------- Alex Deucher (21): drm/amdgpu: add asic callback for querying video codec info (v3) drm/amdgpu: add video decode/encode cap tables and asic callbacks (v3) drm/amdgpu: add INFO ioctl support for querying video caps (v4) drm/amdgpu: bump driver version for new video codec INFO ioctl query drm/amdgpu/codec: drop the internal codec index drm/amdgpu/pm: make unsupported power profile messages debug drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable drm/amdgpu: Only check for S0ix if AMD_PMC is configured drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder drm/amdgpu: enable TMZ by default on Raven asics drm/amdgpu/dc: fill in missing call to atom cmd table for pll adjust v2 drm/amdgpu/display: simplify backlight setting drm/amdgpu/display: don't assert in set backlight function drm/amdgpu/display: handle aux backlight in backlight_get_brightness drm/amdgpu: add mmhub client ids for aldebaran drm/amdgpu: fix S0ix handling when the CONFIG_AMD_PMC=m drm/amdgpu/powerplay/smu10: add support for gpu busy query (v2) drm/amdgpu/smu8: return an error rather than 50% if busy query fails drm/amdgpu: drop legacy IO bar support drm/amdgpu: drop extraneous hw_status update drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps Alex Sierra (4): drm/amdgpu: UTLC1 RB SDMA timeout on Aldebaran drm/amdgpu: enable 48-bit IH timestamp counter drm/amdgpu: update mmhub client ids for Aldebaran drm/amdgpu: use pd addr based on gart level page table Amber Lin (1): drm/amdgpu: Aldebaran doesn't use semaphore Anson Jacob (5): Revert "drm/amd/display: reuse current context instead of recreating one" drm/amdkfd: Fix UBSAN shift-out-of-bounds warning Revert "drm/amd/display: remove duplicate include in amdgpu_dm.c" drm/amd/display: remove duplicate include in amdgpu_dm.c drm/amd/display: Fix UBSAN warning for not a valid value for type '_Bool' Anthony Koo (5): drm/amd/display: [FW Promotion] Release 0.0.52 drm/amd/display: [FW Promotion] Release 0.0.53 drm/amd/display: [FW Promotion] Release 0.0.54 drm/amd/display: [FW Promotion] Release 0.0.55 drm/amd/display: [FW Promotion] Release 0.0.56 Anthony Wang (2): drm/amd/display: disable seamless boot for DP MST drm/amd/display: enable audio on DP seamless boot Aric Cyr (10): drm/amd/display: 3.2.123 drm/amd/display: Don't optimize bandwidth before disabling planes drm/amd/display: reduce scope for local var drm/amd/display: 3.2.124 drm/amd/display: 3.2.125 drm/amd/display: 3.2.126 drm/amd/display: 3.2.126.1 drm/amd/display: System black screen hangs on driver load drm/amd/display: DCHUB underflow counter increasing in some scenarios drm/amd/display: 3.2.127 Arnd Bergmann (1): drm/amd/display: Fix an uninitialized index variable Arunpravin (1): drm/amd/pm/swsmu: clean up user profile function Asher.Song (1): drm/amdgpu:disable VCN for Navi12 SKU Atufa Khan (1): drm/amd/display: Separate caps for maximum RGB and YUV plane counts Aurabindo Pillai (5): drm/amd/display: Old sequence for HUBP blank drm/amd/display: Add module parameter for freesync video mode drm/amd/display: Add freesync video modes based on preferred modes drm/amd/display: Skip modeset for front porch change Revert freesync video patches temporarily Bhaskar Chowdhury (1): drm/amd/pm: Mundane typo fixes in the file amdgpu_pm.c Calvin Hou (1): drm/amd/display: Correct algorithm for reversed gamma Changfeng (1): drm/amdgpu: decline max_me for mec2_fw remove in renoir/arcturus Chen Li (4): drm/radeon: Use kvmalloc for CS chunks drm/amdgpu: Use kvmalloc for CS chunks drm/amdgpu: correct DRM_ERROR for kvmalloc_array radeon: use kvcalloc for relocs and chunks Chen Lin (1): drm/radeon: Remove unused function pointer typedef radeon_packet3_check_t Chris Park (1): drm/amd/display: AVMUTE simplification Christian König (14): drm/radeon: also init GEM funcs in radeon_gem_prime_import_sg_table drm/radeon: fix AGP dependency drm/radeon: keep __user during cast drm/amdgpu: new resource cursor (v2) drm/amdgpu: use the new cursor in amdgpu_ttm_copy_mem_to_mem drm/amdgpu: use the new cursor in amdgpu_fill_buffer drm/amdgpu: use new cursor in amdgpu_ttm_io_mem_pfn drm/amdgpu: use the new cursor in amdgpu_ttm_access_memory drm/amdgpu: use new cursor in amdgpu_mem_visible drm/amdgpu: use the new cursor in amdgpu_ttm_bo_eviction_valuable drm/amdgpu: use the new cursor in the VM code drm/amdgpu: nuke the ih reentrant lock drm/amdgpu: revert "use the new cursor in the VM code" drm/amdgpu: revert "reserve backup pages for bad page retirment" Colin Ian King (8): drm/amd/pm: fix spelling mistake in various messages "power_dpm_force_perfomance_level" drm/amd/display: fix the return of the uninitialized value in ret drm/radeon: fix copy of uninitialized variable back to userspace drm/amd/display: remove redundant initialization of variable status drm/amdgpu/display: remove redundant continue statement drm/amdgpu: Fix spelling mistake "disabed" -> "disabled" drm/amd/pm: Fix spelling mistake "disble" -> "disable" drm/amd/display: remove redundant initialization of variable result Dan Carpenter (1): drm/amd/display: Fix off by one in hdmi_14_process_transaction() Darren Powell (8): amdgpu/pm: Powerplay API for smu , added get_performance_level amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use API amdgpu/pm: Powerplay API for smu , changed 6 pm hwmon fan functions to use API amdgpu/pm: Powerplay API for smu , changed 9 pm power functions to use API amdgpu/pm: Powerplay API for smu , changed 5 dpm powergating & sensor functions to use API amdgpu/pm: Powerplay API for smu , changes to clock and profile mode functions amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use API amdgpu/pm: Powerplay API for smu , updates to some pm functions Dennis Li (7): drm/amdgpu: reserve backup pages for bad page retirment drm/amdgpu: remove unnecessary reading for epprom header drm/amdgpu: enable sram initialization for aldebaran drm/amdgpu: add ras support for gfx of aldebaran drm/amdgpu: refine ras codes for GC utc of aldebaran drm/amdgpu: enable watchdog feature for SQ of aldebaran drm/amdgpu: harvest edc status when connected to host via xGMI Dillon Varone (4): drm/amd/display: Fix HSplit causing increase in DSC Slice Count drm/amd/display: Enabled pipe harvesting in dcn30 drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations drm/amd/display: Remove MPC gamut remap logic for DCN30 Dmytro Laktyushkin (3): drm/amd/display: use max lb for latency hiding drm/amd/display: fix dml prefetch validation drm/amd/display: fix dcn3+ bw validation soc param update sequence Emily Deng (2): drm/amdgpu: Fix some unload driver issues drm/amdgpu: Fix some unload driver issues Eric Bernstein (2): drm/amd/display: Implement transmitter control v1.7 drm/amd/display: Remove Assert from dcn10_get_dig_frontend Eric Huang (6): drm/amdgpu: new cache coherence change for Aldebaran drm/amdkfd: add new flag for uncached GPU mapping drm/amdgpu: set CPU mapping of vram as cached for A+A mode drm/amdgpu: set snoop bit in pde/pte entries for A+A drm/amdkfd: apply uncached flag for aldebaran drm/amd/pm: add a new sysfs entry for default power limit Eryk Brol (2): drm/amd/display: Check for DSC support instead of ASIC revision drm/amd/display: Add max bpc debugfs Evan Quan (7): drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register address drm/amd/pm: bump Navi1x driver if version and related data structures V2 drm/amd/pm: optimize the link width/speed retrieving V2 drm/amd/pm: correct gpu metrics related data structures V3 drm/amd/pm: update existing gpu_metrics interfaces V2 drm/amd/pm: correct the watermark settings for Polaris drm/amd/pm: correct the gpu metrics version Feifei Xu (11): drm/amdgpu: simplify the sdma 4_x MGCG/MGLS logic. drm/amdgpu: add sdma 4_x interrupts printing drm/amdgpu: Add DID for aldebaran drm/amdgpu:add smu mode1/2 support for aldebaran drm/amdgpu:return true for mode1_reset_support on aldebaran drm/amdgpu: correct vram_info for HBM2E drm/amd/pm:add aldebaran support for getting bootup values drm/amdgpu: update atom_firmware_info_v3_4 (v2) drm/amdpgu: add ATOM_DGPU_VRAM_TYPE_HBM2E vram type drm/amdgpu:disable XGMI TA unload for A+A aldebaran drm/amdgpu: Use dev_info if VFCT table not valid Felix Kuehling (9): drm/amdkfd: Use mmu_notifier_get drm/amdkfd: Cleanup kfd_process if init_cwsr_apu fails drm/amdkfd: Use a new capability bit for SRAM ECC drm/amdgpu: Let KFD use more VMIDs on Aldebaran drm/amdgpu: Make noretry the default on Aldebaran drm/amdkfd: fix build error with AMD_IOMMU_V2=m drm/amdkfd: Fix recursive lock warnings drm/amdgpu: Mark Aldebaran HW support as experimental drm/amdkfd: Bump KFD API version Gustavo A. R. Silva (4): drm/amd/pm: Replace one-element array with flexible-array in struct SISLANDS_SMC_SWSTATE drm/amd/pm: Replace one-element array with flexible-array in struct _ATOM_Vega10_GFXCLK_Dependency_Table drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE drm/radeon/si_dpm: Replace one-element array with flexible-array in struct SISLANDS_SMC_SWSTATE Harish Kasiviswanathan (2): drm/amdgpu: update default timeout of Aldebaran SQ watchdog Revert "drm/amdgpu: During compute disable GFXOFF for Sienna_Cichlid" Hawking Zhang (54): drm/amdgpu: add gc v9_4_2 ip headers (v3) drm/amdgpu: add mmhub v1_7 ip headers (v3) drm/amdgpu: add mp v13_0_2 ip headers (v3) drm/amdgpu: add smuio v13_0_2 ip headers (v3) drm/amdgpu: add sdma v4_4_0 ip headers (v2) drm/amdgpu: add thm v13_0_2 ip headers (v3) drm/amdgpu: add umc v6_7_0 ip headers (v3) drm/amdgpu: add vcn v2_6_0 ip headers (v3) drm/amd/include: add ip offset header for aldebaran (v5) drm/amdgpu: init sos microcode for psp v13 drm/amdgpu: add kdb loading support for psp v13 drm/amdgpu: add sys_drv loading support for psp v13 drm/amdgpu: add tOS loading support for psp v13 drm/amdgpu: add psp v13 ring support drm/amdgpu: init psp v13 ip function drm/amdgpu: fix incorrect EP_STRAP reg offset for aldebaran drm/amdgpu: load pmfw prior to other non-psp fw for aldebaran drm/amdgpu: detect sriov capability for aldebaran drm/amdgpu: bypass gc_9_x_common golden settings drm/amdgpu: enable psp v13 ip block for aldebaran drm/amdgpu: add new smuio callbacks for aldebaran drm/amdgpu: implement smuio v13_0 callbacks drm/amdgpu: initialize smuio callbacks for aldebaran drm/amdgpu: skip MEC2_JT initialization for aldebaran drm/amdgpu: initialize ta firmware for aldebaran drm/amdgpu: comments out vcn/jpeg ip blocks for aldebaran drm/amdgpu: initialize external rev_id for aldebaran drm/amdgpu: declare smuio v13_0 callbacks as static drm/amdgpu: support get_vram_info atomfirmware i/f for aldebaran drm/amdgpu: init gds for aldebaran drm/amdgpu: skip gds ras workaround for aldebaran drm/amdgpu: use physical_node_id to calculate aper_base drm/amdgpu: apply sdma golden settings for aldebaran drm/amdgpu: add sdma v4_4 ras function drm/amdgpu: add sdma ras error query callback for aldebaran drm/amdgpu: add sdma ras error reset callback for aldebaran drm/amdgpu: add mmhub ras error query callback for aldebaran drm/amdgpu: add mmhub ras error reset callback for aldebaran drm/amdgpu: add mmhub error status query callback for aldebaran drm/amdgpu: correct IH_CHICKEN programming for aldebaran drm/amdgpu: switch to vega20 ih block for aldebaran drm/amdgpu: disallow use semaphore on aldebaran drm/amdgpu: query aldebaran gfx_config through atomfirmware i/f drm/amdgpu: retire aldebaran gpu_info firmware drm/amdgpu: bypass hdp read cache invalidation for aldebaran (v2) drm/amdgpu: switch to cached noretry setting for aldebaran drm/amdgpu: apply new pmfw loading sequence to arcturus and onwards drm/amdgpu: allow use psp to load firmware (v2) drm/amdgpu: apply gc v9_4_2 golden settings for aldebaran drm/amdgpu: add common gc golden settings for aldebaran drm/amdgpu: update TCP_CHAN_STEER_1 golden value for aldebaran drm/amdgpu: update umc_info v3_3 structure for ECC drm/amdgpu: support query ecc cap for SIENNA_CICHLID drm/amdgpu: update ecc query support for arcturus Holger Hoffstätte (2): drm/amd/display: Fix nested FPU context in dcn21_validate_bandwidth() drm/amdgpu/display: use GFP_ATOMIC in dcn21_validate_bandwidth_fp() Horace Chen (1): drm/amdgpu: enable one vf mode on sienna cichlid vf Huang Rui (1): drm/amd/pm: do not issue message while write "r" into pp_od_clk_voltage Hugo Hu (1): drm/amd/display: treat memory as a single-channel for asymmetric memory Jake Wang (3): drm/amd/display: Refactored DC interfaces to support multiple eDP drm/amd/display: Added multi instance support for panel control drm/amd/display: Bypass sink detect when there are no eDPs connected James Zhu (9): drm/amdgpu: add Aldebaran to the VCN family drm/amdgpu/vcn2.6: Add vcn2.6 support drm/amdgpu/jpeg2.6: Add jpeg2.6 support drm/amdgpu/nbio: add aldebaran support drm/amdgpu/vcn: enable VCN on aldebaran drm/amdgpu/jpeg: enable JPEG on aldebaran drm/amdgpu: enable vcn and jpeg on aldebaran drm/amdgpu: enable vcn dpg mode on aldebaran drm/amdgpu: enable dpg indirect sram mode on aldebaran Jay Cornwall (2): drm/amdkfd: Move set_trap_handler out of dqm->ops drm/amdkfd: Add aldebaran trap handler support Jia-Ju Bai (1): drm/amdgpu/swsmu: fix error return code of smu_v11_0_set_allowed_mask() Jiapeng Chong (13): drm/amdgpu/swsmu/navi1x: Remove unnecessary conversion to bool drm/amd/display/dc/core/dc_link_ddc: Remove unnecessary conversion to bool drm/amdgpu/sdma5.2: Remove unnecessary conversion to bool drm/amdgpu: Remove unnecessary conversion to bool drm/amd/display: remove unnecessary conversion to bool drm/amd/pm/swsmu: Remove unnecessary conversion to bool drm/amd/display/dc/dce/dmub_psr: Remove unnecessary conversion to bool drm/amd/display: Remove unnecessary conversion to bool drm/amdgpu: Remove unnecessary conversion to bool drm/amdgpu/display: Remove unnecessary conversion to bool drm/amd/display: Remove unnecessary conversion to bool drm/amd/display: Remove unnecessary conversion to bool drm/amd/display: Remove unnecessary conversion to bool Jimmy Kizito (1): drm/amd/display: Update link encoder object creation Jingwen Chen (2): drm/amd/amdgpu: move inc gpu_reset_counter after drm_sched_stop drm/amd/amdgpu: add fini virt data exchange to ip_suspend Jinzhou Su (1): drm/amdgpu: update secure display TA header John Clements (4): drm/amdgpu: disable mec2 fw bin loading drm/amdgpu: updated host to psp mailbox cmd (v2) drm/amdgpu: added register list driver ctx (v2) drm/amdgpu: added support for register list loading (v2) Jonathan Kim (5): drm/amdgpu: add missing df counter disable write drm/amdgpu: mask the xgmi number of hops reported from psp to kfd drm/amdkfd: add aldebaran kfd2kgd callbacks to kfd device (v2) drm/amdgpu: restore aldebaran save ttmp and trap config on init (v2) drm/amdgpu: add ih waiter on process until checkpoint Joshua Aberback (1): drm/amd/display: Align cursor cache address to 2KB Jun Lei (1): drm/amd/display: Increase precision for bpp in DSC calculations Kenneth Feng (4): drm/amd/pm: add new data in metrics table drm/amd/pm: bug fix for pcie dpm drm/amd/pm: workaround for audio noise issue drm/amd/pm: fix workload mismatch on vega10 Kevin Wang (16): drm/amdgpu: add RAP TA version print in amdgpu_firmware_info drm/amdgpu: correct TA RAP firmware information print error drm/amdgpu: refine PSP TA firmware info print in debugfs drm/amdgpu: add SECURE DISPLAY TA firmware info in debugfs drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie drm/amdgpu: add aldebaran sdma firmware support (v2) drm/amdgpu: switch to use reg distance member for mmhub v1_7 drm/amd/swsmu: add aldebaran smu driver if header (v2) drm/amd/swsmu: add aldebaran smu13 ip support (v3) drm/amdgpu: declare sdma firmware binary file for aldebaran drm/amd/pm: remove aldebaran serial number support drm/amdgpu: add gc powerbrake support (v2) drm/amd/pm: add aldebaran serial number support drm/amdgpu: change psp_rap_invoke() function return value drm/amdgpu: add psp RAP L0 check support Revert "drm/amdgpu: add psp RAP L0 check support" Laurent Morichetti (1): drm/amdkfd: Fix saving the ACC vgprs for Aldebaran Le Ma (11): drm/amdgpu: add aldebaran asic type drm/amdgpu: add register base init for aldebaran (v2) drm/amdgpu: add gpu_info fw parse support for aldebaran drm/amdgpu: add soc15 common ip block support for aldebaran drm/amdgpu: add mmhub support for aldebaran (v3) drm/amdgpu: add gmc v9 block support for Aldebaran drm/amdgpu: set fw load type for aldebaran drm/amdgpu: add gfx v9 block support for aldebaran drm/amdgpu: add sdma block support for aldebaran drm/amdgpu: correct mmBIF_SDMA4_DOORBELL_RANGE address for aldebaran drm/amdgpu: set ip blocks for aldebaran Lee Jones (1): drm/amd/display/dc/dce/dce_aux: Remove duplicate line causing 'field overwritten' issue Leo (Hanghong) Ma (3): drm/amdgpu: add DMUB trace event IRQ source define drm/amd/display: Fix typo for helpers function name drm/amd/display: Add debugfs to control DMUB trace buffer events Lewis Huang (1): drm/amd/display: remove global optimize seamless boot stream count Lijo Lazar (21): drm/amd/pm: Add atom_smc_dpm_info_v4_10 for aldebaran drm/amd/amdgpu: Add smu_pptable module parameter drm/amd/pm: Add support to override pptable id for aldebaran drm/amd/pm: Remove CPU virtual address notification in aldebaran drm/amd/pm: Set no fan control flag as needed. drm/amdgpu: Enable swsmu block on aldebaran drm/amdgpu: Add clock gating support for aldebaran drm/amdgpu/pm: Remove unsupported MP1 messages from aldebaran drm/amdgpu/pm: Fix reset message mapping on aldebaran drm/amdgpu/pm: Remove redundant generic message index drm/amdgpu: Enable CP idle interrupts drm/amdgpu: Fix aldebaran MMHUB CG/LS logic drm/amd/pm: Fix power limit query on aldebaran drm/amd/pm: Add DCBTC support for aldebaran drm/amd/pm: Enable performance determinism on aldebaran drm/amd/pm: Correct msg status check for powerlimit drm/amd/pm: Enable user min/max gfxclk on aldebaran drm/amd/pm: Enable pp_od_clk_voltage node on aldebaran drm/amd/pm: Remove min/max overload of pp_dpm_sclk drm/amdgpu: Check if FB BAR is enabled for ROM read drm/amdgpu: Free PDB0 bo before bo_fini Mario Kleiner (1): drm/amd/display: Allow spatial dither to 10 bpc on all DCE Mark Yacoub (1): drm/amdgpu: Verify bo size can fit framebuffer size on init. Martin Leung (3): drm/amd/display: changing sr exit latency drm/amd/display: Skip powerstate DC hw access if virtual dal drm/amd/display: Fix typo when retrieving dppclk from UEFI config Max.Tseng (1): drm/amd/display: Add flag for building infopacket Meenakshikumar Somasundaram (2): drm/amd/display: Support for DMUB AUX drm/amd/display: Fix for outbox1 ring buffer typecasting issue Nathan Chancellor (1): drm/amd/pm/swsmu: Avoid using structure_size uninitialized in smu_cmn_init_soft_gpu_metrics Nicholas Kazlauskas (2): drm/amd/display: Add dc_dmub_srv helpers for in/out DMCUB commands drm/amd/display: Fix MPC OGAM power on/off sequence Nikola Cornij (2): drm/amd/display: Add debug out when viewport too small drm/amdgpu/display: re-enable freesync video patches Nirmoy Das (11): drm/amdgpu: do not keep debugfs dentry drm/radeon: cleanup debugfs drm/amdgpu: remove CONFIG_DRM_AMDGPU_GART_DEBUGFS drm/amd/display: do not use drm middle layer for debugfs drm/amd/pm: do not use drm middle layer for debugfs drm/amdgpu: do not use drm middle layer for debugfs drm/radeon: add rdev in ring struct drm/radeon: do not use drm middle layer for debugfs (v2) drm/amdgpu: mark local function as static drm/amdgpu: remove unused variable from struct amdgpu_bo drm/amdgpu: fb BO should be ttm_bo_type_device Oak Zeng (22): drm/amdgpu: Fix IH client ID naming table drm/amdgpu: Clean up mmhub functions for aldebaran drm/amdgpu: pre-map device buffer as cached for A+A config drm/amdgpu: Don't do FB resize under A+A config drm/amdgpu: Use free system memory size for kfd memory accounting drm/amdgpu: Don't reserve vram as WC for A+A drm/amdgpu: Use physical translation mode to access page table drm/amdgpu: Moved gart_size calculation to mc_init functions drm/amdgpu: Modify comments of vram_start/end drm/amdgpu: Placement of gart and vram in sysvm aperture drm/amdgpu: Use different gart table parameters for 2-level gart table drm/amdgpu: Add function to allocate and fill PDB0 drm/amdgpu: Set up vmid0 PDB0 drm/amdgpu: HW setup of 2-level vmid0 page table drm/amdgpu: workaround the TMR MC address issue (v2) drm/amdgpu: Fix GART page table s-bit drm/amdgpu: Fix the comment in amdgpu_gmc.h drm/amdkfd: Add kernel parameter to stop queue eviction on vm fault drm/amdkfd: Check HIQ's MQD for queue preemption status drm/amdgpu: Increase PSP runtime TMR region size drm/amdgpu: fix compile error on architecture s390 (v2) drm/amdgpu: fix a few compiler warnings Philip Yang (1): drm/amdgpu: enable retry fault wptr overflow Po-Ting Chen (1): drm/amd/display: Change ABM sample rate Prike Liang (1): drm/amdgpu: fix shutdown and poweroff process failed with s0ix Qingqing Zhuo (5): drm/amd/display: Fix system hang after multiple hotplugs (v3) drm/amd/display: Enable pflip interrupt upon pipe enable drm/amd/display: Fix warning drm/amd/display: Remove unused defines drm/amd/display: Fix potential memory leak Rajneesh Bhardwaj (4): drm/amdgpu: enable xgmi support for Aldebaran drm/amdgpu: define address map for host xgmi link (v3) drm/amdgpu: support get xgmi information for Aldebaran drm/amdkfd: expose host gpu link via sysfs (v2) Ramesh Errabolu (1): drm/amdgpu: Remove amdgpu_device arg from free_sgt api (v2) Rodrigo Siqueira (1): drm/amd/display: Add vupdate_no_lock interrupts for DCN2.1 Sebastian Andrzej Siewior (3): drm/amdgpu: Replace in_interrupt() usage in gmc_v*_process_interrupt() drm/amdgpu: Remove in_interrupt() usage in gfx_v9_0_kiq_read_clock() drm/amdgpu: Replace in_task() in gfx_v8_0_parse_sq_irq() Shashank Sharma (2): drm/amdgpu: clean-up unused variable drm/amdgpu: Set GTT_USWC flag to enable freesync v2 Shirish S (1): amdgpu/pm: read_sensor() report failure apporpriately Sonny Jiang (1): drm/amdgpu/vcn3.0: add wptr/rptr reset/update for share memory Souptick Joarder (1): drm/amdgpu/display: initialize the variable 'i' Stanley.Yang (1): drm/amdgpu: fix send ras disable cmd when asic not support ras Stylon Wang (3): drm/amd/display: Add Freesync HDMI support to DM drm/amd/display: Refactor debugfs entries for all connectors drm/amd/display: Enable ASSR in DM Sung Lee (3): drm/amd/display: Populate dcn2.1 bounding box before state duplication drm/amd/display: Copy over soc values before bounding box creation drm/amd/display: Revert dram_clock_change_latency for DCN2.1 Takashi Iwai (1): drm/amd/display: Add a backlight module option Tao Zhou (1): drm/amdgpu: fix wrong executable setting for dimgrey_cavefish_reg_init.c Tom St Denis (1): drm/amd/amdgpu: Add missing BASE_IDX to dcn register Victor Lu (1): drm/amd/display: Free local data after use Vladimir Stempen (3): drm/amd/display: Synchronize displays with different timings drm/amd/display: Fix 64 bit divisions on 32 bit platforms by using div64 API drm/amd/display: Fix 64 bit modulus operation using div64 API Wayne Lin (9): drm/amd/display: Fix crc_src is not thread safe drm/amd/display: Support crc on specific region drm/amd/display: Process crc window at DMCU drm/amd/display: Change to set crc window by dmcu fw drm/amd/display: Use PSP TA to read out crc drm/amd/display: Fix secure display lock problems drm/amd/display: Fix no previous prototype warning drm/amd/display: Fix vertical interrupt 0 registering issue drm/amd/display: Support vertical interrupt 0 for all dcn ASIC Wesley Chalmers (2): Revert "drm/amd/display: New path for enabling DPG" Revert "drm/amd/display: Unblank hubp based on plane visibility" Wyatt Wood (1): drm/amd/display: Return invalid state if GPINT times out Xiaogang Chen (1): drm/amdgpu/display: buffer INTERRUPT_LOW_IRQ_CONTEXT interrupt work Xiaojian Du (1): drm/amd/pm: correct the name of one function for vangogh Yang Li (2): drm/amd/display: Simplify bool conversion drm/amdgpu: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE Yao Wang1 (1): drm/amd/display: add a func to disable accelerated mode Yong Zhao (3): drm/amdkfd: Add Aldebaran KFD support drm/amdgpu: Print the IH client ID name when vm fault happens drm/amdgpu: Fix an omission when adding Aldebaran support Yongqiang Sun (6): drm/amd/display: move trace buffer to uncached memory. drm/amd/display: Implement dmub trace event drm/amd/display: Move define from internal header to dmub_cmd.h drm/amd/display: Fix dmub trace event not update issue drm/amd/display: Read all the trace entry if it is not empty drm/amd/display: Fixed read/write pointer issue for get dmub trace Zhan Liu (2): drm/amdgpu/display: Use wm_table.entries for dcn301 calculate_wm drm/amdgpu/display: Implement functions to let DC allocate GPU memory Zhang Yunkai (2): drm/amd/display: remove duplicate include in amdgpu_dm.c drm/amd/display: remove duplicate include in dcn21 and gpio charles sun (1): drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now shaoyunl (11): drm/amdgpu: Add kfd init_complete flag to check from amdgpu side drm/amdgpu: Init the cp MQD if it's not be initialized before drm/amdgpu: Add reset_list for device list used for reset drm/amdgpu: Reset the devices in the XGMI hive duirng probe drm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4f drm/amdgpu: skip read eeprom for device that pending on XGMI reset drm/amd/pm: Add LightSBR SMU MSG support drm/amdgpu: Enable light SBR for SMU on passthrough and XGMI configuration drm/amdgpu: Enable light SBR in XGMI+passthrough configuration drm/amdgpu: Keep pending_reset valid during smu reset the ASIC drm/amd/pm: Use BACO reset arg 0 on XGMI configuration xinhui pan (1): drm/amdgpu: Fix memory leak drivers/gpu/drm/Kconfig | 1 + drivers/gpu/drm/amd/amdgpu/Kconfig | 9 - drivers/gpu/drm/amd/amdgpu/Makefile | 14 +- drivers/gpu/drm/amd/amdgpu/aldebaran_reg_init.c | 54 + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 63 +- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 1 + .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 47 + .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 16 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.h | 30 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 37 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 43 - drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 73 +- drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 16 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 +- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 188 +- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h | 14 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 275 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 72 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 29 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 141 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 51 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 26 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 3 - drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 22 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 150 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 31 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 23 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c | 54 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 37 +- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 135 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 8 + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 95 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_rap.c | 7 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 191 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 43 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 105 + drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 5 + drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 458 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 4 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 17 +- drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 6 +- drivers/gpu/drm/amd/amdgpu/atom.c | 4 +- drivers/gpu/drm/amd/amdgpu/atom.h | 2 - drivers/gpu/drm/amd/amdgpu/cik.c | 77 + drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 2 + .../gpu/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c | 0 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 161 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 1286 + drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.h | 40 + drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 75 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c | 54 +- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 7 +- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 152 +- drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 3 + drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 65 +- drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.h | 1 + drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 1329 + drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.h | 28 + drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 48 +- drivers/gpu/drm/amd/amdgpu/nv.c | 227 +- drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 1 + drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 378 + drivers/gpu/drm/amd/amdgpu/psp_v13_0.h | 30 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 181 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c | 232 + drivers/gpu/drm/amd/amdgpu/sdma_v4_4.h | 28 + drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 +- drivers/gpu/drm/amd/amdgpu/si.c | 111 + drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c | 121 + drivers/gpu/drm/amd/amdgpu/smuio_v13_0.h | 30 + drivers/gpu/drm/amd/amdgpu/soc15.c | 360 +- drivers/gpu/drm/amd/amdgpu/soc15.h | 12 + drivers/gpu/drm/amd/amdgpu/soc15_common.h | 48 + drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h | 1 + drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 99 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.h | 1 + drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 24 +- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 32 +- drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 49 +- drivers/gpu/drm/amd/amdgpu/vi.c | 190 + drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c | 5 +- drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 492 + .../gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx8.asm | 1 + .../gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm | 204 +- drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 6 +- drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 17 +- drivers/gpu/drm/amd/amdkfd/kfd_device.c | 25 + .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 57 +- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 5 - drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 5 +- drivers/gpu/drm/amd/amdkfd/kfd_iommu.c | 6 + drivers/gpu/drm/amd/amdkfd/kfd_iommu.h | 9 +- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h | 1 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c | 8 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 8 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 8 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c | 8 + drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 9 + drivers/gpu/drm/amd/amdkfd/kfd_process.c | 66 +- drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 5 +- drivers/gpu/drm/amd/display/Kconfig | 14 + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 870 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 89 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 293 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 37 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 474 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.h | 5 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 46 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 113 +- .../amd/display/amdgpu_dm/amdgpu_dm_irq_params.h | 9 + .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 17 +- drivers/gpu/drm/amd/display/dc/Makefile | 2 +- drivers/gpu/drm/amd/display/dc/basics/dc_common.c | 20 +- drivers/gpu/drm/amd/display/dc/basics/dc_common.h | 4 +- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 5 +- .../drm/amd/display/dc/bios/bios_parser_helper.c | 5 +- .../drm/amd/display/dc/bios/bios_parser_helper.h | 2 +- .../gpu/drm/amd/display/dc/bios/command_table.c | 21 + .../gpu/drm/amd/display/dc/bios/command_table2.c | 93 +- .../gpu/drm/amd/display/dc/bios/command_table2.h | 3 +- drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 17 +- .../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 2 +- .../amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 4 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 333 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 37 +- drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 5 +- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 43 + drivers/gpu/drm/amd/display/dc/core/dc_stat.c | 64 + drivers/gpu/drm/amd/display/dc/dc.h | 28 +- drivers/gpu/drm/amd/display/dc/dc_bios_types.h | 3 +- drivers/gpu/drm/amd/display/dc/dc_ddc_types.h | 10 - drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 34 + drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 8 + drivers/gpu/drm/amd/display/dc/dc_dsc.h | 11 +- drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 + drivers/gpu/drm/amd/display/dc/dc_link.h | 19 +- drivers/gpu/drm/amd/display/dc/dc_stat.h | 42 + drivers/gpu/drm/amd/display/dc/dc_stream.h | 24 +- drivers/gpu/drm/amd/display/dc/dce/Makefile | 2 +- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 40 +- drivers/gpu/drm/amd/display/dc/dce/dce_aux.h | 4 +- .../gpu/drm/amd/display/dc/dce/dce_clock_source.c | 52 +- drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 84 + drivers/gpu/drm/amd/display/dc/dce/dce_opp.c | 4 +- drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 10 +- drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.c | 60 + drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.h | 33 + drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 19 +- .../amd/display/dc/dce110/dce110_hw_sequencer.c | 91 +- .../drm/amd/display/dc/dce110/dce110_resource.c | 2 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 11 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 6 + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 307 +- .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h | 8 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 - .../drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 1 - drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 2 + .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 6 +- .../amd/display/dc/dcn10/dcn10_stream_encoder.c | 1 - drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 1 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 55 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 2 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 124 + .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 16 +- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 1 + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c | 1 - .../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 29 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c | 26 +- .../display/dc/dcn30/dcn30_dio_stream_encoder.c | 1 - drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 4 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 4 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c | 2 +- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c | 1 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 102 +- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 4 - drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 1 - drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 26 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 56 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.h | 1 + .../gpu/drm/amd/display/dc/dcn301/dcn301_init.c | 1 - .../drm/amd/display/dc/dcn301/dcn301_resource.c | 7 +- .../drm/amd/display/dc/dcn302/dcn302_resource.c | 7 +- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 2 + .../amd/display/dc/dml/dcn20/display_mode_vba_20.c | 1 + .../display/dc/dml/dcn20/display_mode_vba_20v2.c | 1 + .../amd/display/dc/dml/dcn30/display_mode_vba_30.c | 2 +- .../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 3 - drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 105 +- .../amd/display/dc/gpio/dce110/hw_factory_dce110.c | 4 - drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 9 +- drivers/gpu/drm/amd/display/dc/inc/clock_source.h | 5 + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 15 + drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 3 +- drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h | 4 +- drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h | 21 + drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 2 + drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 1 + .../drm/amd/display/dc/inc/hw/timing_generator.h | 12 + drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 7 +- drivers/gpu/drm/amd/display/dc/inc/resource.h | 5 + .../amd/display/dc/irq/dcn20/irq_service_dcn20.c | 31 + .../amd/display/dc/irq/dcn21/irq_service_dcn21.c | 60 + .../amd/display/dc/irq/dcn30/irq_service_dcn30.c | 38 + .../amd/display/dc/irq/dcn302/irq_service_dcn302.c | 30 + drivers/gpu/drm/amd/display/dc/irq_types.h | 3 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 55 + drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h | 41 + drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 1495 +- .../drm/amd/display/dmub/inc/dmub_trace_buffer.h | 3 +- drivers/gpu/drm/amd/display/dmub/src/Makefile | 2 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 57 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 35 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 7 + drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 84 +- .../gpu/drm/amd/display/dmub/src/dmub_srv_stat.c | 105 + .../drm/amd/display/modules/freesync/freesync.c | 28 +- .../gpu/drm/amd/display/modules/inc/mod_freesync.h | 3 +- drivers/gpu/drm/amd/include/aldebaran_ip_offset.h | 1738 + .../amd/include/asic_reg/dcn/dcn_3_0_0_offset.h | 2 +- .../drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h | 7683 +++++ .../drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h | 32949 +++++++++++++++++++ .../amd/include/asic_reg/mmhub/mmhub_1_7_offset.h | 5125 +++ .../amd/include/asic_reg/mmhub/mmhub_1_7_sh_mask.h | 32178 ++++++++++++++++++ .../drm/amd/include/asic_reg/mp/mp_13_0_2_offset.h | 361 + .../amd/include/asic_reg/mp/mp_13_0_2_sh_mask.h | 531 + .../amd/include/asic_reg/sdma/sdma_4_4_0_offset.h | 5224 +++ .../amd/include/asic_reg/sdma/sdma_4_4_0_sh_mask.h | 13922 ++++++++ .../include/asic_reg/smuio/smuio_13_0_2_offset.h | 516 + .../include/asic_reg/smuio/smuio_13_0_2_sh_mask.h | 1163 + .../amd/include/asic_reg/thm/thm_13_0_2_offset.h | 346 + .../amd/include/asic_reg/thm/thm_13_0_2_sh_mask.h | 1297 + .../amd/include/asic_reg/umc/umc_6_7_0_offset.h | 2620 ++ .../amd/include/asic_reg/umc/umc_6_7_0_sh_mask.h | 10796 ++++++ .../amd/include/asic_reg/vcn/vcn_2_6_0_offset.h | 1462 + .../amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h | 4535 +++ drivers/gpu/drm/amd/include/atomfirmware.h | 129 +- .../drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 + drivers/gpu/drm/amd/include/kgd_pp_interface.h | 127 +- drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 9 +- drivers/gpu/drm/amd/include/vi_structs.h | 32 +- drivers/gpu/drm/amd/pm/Makefile | 1 + drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 228 +- drivers/gpu/drm/amd/pm/amdgpu_pm.c | 1012 +- drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h | 126 + drivers/gpu/drm/amd/pm/inc/amdgpu_pm.h | 2 +- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 91 +- drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h | 7 + drivers/gpu/drm/amd/pm/inc/rv_ppsmc.h | 1 + .../gpu/drm/amd/pm/inc/smu11_driver_if_navi10.h | 98 +- .../gpu/drm/amd/pm/inc/smu13_driver_if_aldebaran.h | 512 + drivers/gpu/drm/amd/pm/inc/smu_types.h | 28 +- drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 19 +- drivers/gpu/drm/amd/pm/inc/smu_v13_0.h | 272 + drivers/gpu/drm/amd/pm/inc/smu_v13_0_pptable.h | 165 + drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c | 12 +- .../gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 46 +- .../gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 64 +- .../gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 9 +- .../gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 126 +- .../drm/amd/pm/powerplay/hwmgr/vega10_pptable.h | 6 +- .../gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c | 92 +- .../gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c | 75 +- drivers/gpu/drm/amd/pm/powerplay/kv_dpm.c | 2 +- drivers/gpu/drm/amd/pm/powerplay/si_dpm.c | 8 +- drivers/gpu/drm/amd/pm/powerplay/sislands_smc.h | 10 +- drivers/gpu/drm/amd/pm/swsmu/Makefile | 2 +- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 468 +- drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 20 +- drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 621 +- .../drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 44 +- drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 39 +- drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 68 +- drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 32 +- drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile | 30 + drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 1530 + drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.h | 72 + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 1811 + drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 20 +- drivers/gpu/drm/radeon/nislands_smc.h | 10 +- drivers/gpu/drm/radeon/r100.c | 84 +- drivers/gpu/drm/radeon/r300.c | 33 +- drivers/gpu/drm/radeon/r420.c | 28 +- drivers/gpu/drm/radeon/r600.c | 27 +- drivers/gpu/drm/radeon/radeon.h | 27 +- drivers/gpu/drm/radeon/radeon_asic.h | 8 +- drivers/gpu/drm/radeon/radeon_cs.c | 12 +- drivers/gpu/drm/radeon/radeon_device.c | 47 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 20 +- drivers/gpu/drm/radeon/radeon_fence.c | 42 +- drivers/gpu/drm/radeon/radeon_gem.c | 24 +- drivers/gpu/drm/radeon/radeon_ib.c | 26 +- drivers/gpu/drm/radeon/radeon_kms.c | 1 + drivers/gpu/drm/radeon/radeon_mode.h | 2 +- drivers/gpu/drm/radeon/radeon_pm.c | 32 +- drivers/gpu/drm/radeon/radeon_prime.c | 2 + drivers/gpu/drm/radeon/radeon_ring.c | 80 +- drivers/gpu/drm/radeon/radeon_ttm.c | 88 +- drivers/gpu/drm/radeon/rs400.c | 25 +- drivers/gpu/drm/radeon/rs600.c | 8 +- drivers/gpu/drm/radeon/rv515.c | 56 +- drivers/gpu/drm/radeon/si_dpm.c | 5 +- drivers/gpu/drm/radeon/sislands_smc.h | 10 +- include/drm/amd_asic_type.h | 15 +- include/uapi/drm/amdgpu_drm.h | 34 + include/uapi/linux/kfd_ioctl.h | 4 +- 333 files changed, 142761 insertions(+), 4030 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/aldebaran_reg_init.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.h create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h mode change 100755 => 100644 drivers/gpu/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c create mode 100644 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c create mode 100644 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.h create mode 100644 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c create mode 100644 drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.h create mode 100644 drivers/gpu/drm/amd/amdgpu/psp_v13_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/psp_v13_0.h create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v4_4.h create mode 100644 drivers/gpu/drm/amd/amdgpu/smuio_v13_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/smuio_v13_0.h create mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_stat.c create mode 100644 drivers/gpu/drm/amd/display/dc/dc_stat.h create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.c create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.h create mode 100644 drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c create mode 100644 drivers/gpu/drm/amd/include/aldebaran_ip_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_7_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_7_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_2_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_2_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma/sdma_4_4_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/sdma/sdma_4_4_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_13_0_2_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_13_0_2_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/thm/thm_13_0_2_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/thm/thm_13_0_2_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_7_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_7_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h create mode 100644 drivers/gpu/drm/amd/pm/inc/smu13_driver_if_aldebaran.h create mode 100644 drivers/gpu/drm/amd/pm/inc/smu_v13_0.h create mode 100644 drivers/gpu/drm/amd/pm/inc/smu_v13_0_pptable.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1 0

[PATCH] drm/imx: fix out of bounds array access warning
by Arnd Bergmann 24 Mar '21

24 Mar '21

From: Arnd Bergmann <arnd(a)arndb.de> When CONFIG_OF is disabled, building with 'make W=1' produces warnings about out of bounds array access: drivers/gpu/drm/imx/imx-ldb.c: In function 'imx_ldb_set_clock.constprop': drivers/gpu/drm/imx/imx-ldb.c:186:8: error: array subscript -22 is below array bounds of 'struct clk *[4]' [-Werror=array-bounds] Add an error check before the index is used, which helps with the warning, as well as any possible other error condition that may be triggered at runtime. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- drivers/gpu/drm/imx/imx-ldb.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index dbfe39e2f7f6..1210360cec8a 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c @@ -197,6 +197,12 @@ static void imx_ldb_encoder_enable(struct drm_encoder *encoder) int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder); + if (mux < 0) { + dev_warn(ldb->dev, + "%s: invalid mux\n", __func__); + return; + } + drm_panel_prepare(imx_ldb_ch->panel); if (dual) { @@ -255,6 +261,12 @@ imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder, int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder); u32 bus_format = imx_ldb_ch->bus_format; + if (mux < 0) { + dev_warn(ldb->dev, + "%s: invalid mux\n", __func__); + return; + } + if (mode->clock > 170000) { dev_warn(ldb->dev, "%s: mode exceeds 170 MHz pixel clock\n", __func__); -- 2.29.2

4 5

[PATCH v3 0/4] Fixes to bridge/panel and ingenic-drm
by Paul Cercueil 24 Mar '21

24 Mar '21

Hi, Here are three independent fixes. The first one addresses a use-after-free in bridge/panel.c; the second one addresses a use-after-free in the ingenic-drm driver; finally, the third one makes the ingenic-drm driver work again on older Ingenic SoCs. Changes from v2: - patch [1/4] added a FIXME. - patch [2/4] is new. It introduces a drmm_plain_simple_encoder_alloc() macro that will be used in patch [3/4]. - patch [3/4] uses the macro introduced in patch [2/4]. - patch [4/4] is unmodified. Note to linux-stable guys: patch [v2 2/3] will only apply on the current drm-misc-next branch, to fix it for v5.11 and older kernels, use the V1 of that patch. Cheers, -Paul Paul Cercueil (4): drm: bridge/panel: Cleanup connector on bridge detach drm/simple_kms_helper: Add macro drmm_plain_simple_encoder_alloc() drm/ingenic: Register devm action to cleanup encoders drm/ingenic: Fix non-OSD mode drivers/gpu/drm/bridge/panel.c | 12 +++++++++++ drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 26 +++++++++++------------ include/drm/drm_simple_kms_helper.h | 17 +++++++++++++++ 3 files changed, 42 insertions(+), 13 deletions(-) -- 2.29.2

3 15

[PATCH] drm/fourcc: add Vivante TS modifiers
by Lucas Stach 23 Mar '21

23 Mar '21

Vivante TS (tile-status) buffer modifiers. They can be combined with all of the Vivante color buffer tiling modifiers, so they are kind of a modifier modifier. If a TS modifier is present we have a additional plane for the TS buffer and the modifier defines the layout of this TS buffer. Signed-off-by: Lucas Stach <l.stach(a)pengutronix.de> --- include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index f76de49c768f..76df2a932637 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -623,6 +623,22 @@ extern "C" { */ #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4) +/* + * Vivante TS (tile-status) buffer modifiers. They can be combined with all of + * the color buffer tiling modifiers defined above. When TS is present it's a + * separate buffer containing the clear/compression status of each tile. The + * modifiers are defined as VIVANTE_MOD_TS_c_s, where c is the color buffer tile + * size in bytes covered by one entry in the status buffer and s is the number + * of status bits per entry. + * We reserve the top 8bits of the Vivante modifier space for TS modifiers, as + * future cores might add some more TS layout variations. + */ +#define VIVANTE_MOD_TS_64_4 (1ULL << 48) +#define VIVANTE_MOD_TS_64_2 (2ULL << 48) +#define VIVANTE_MOD_TS_128_4 (3ULL << 48) +#define VIVANTE_MOD_TS_256_4 (4ULL << 48) +#define VIVANTE_MOD_TS_MASK (0xffULL << 48) + /* NVIDIA frame buffer modifiers */ /* -- 2.29.2

4 9

[PATCH] RFC: dma-buf: Add an API for importing and exporting sync files
by Jason Ekstrand 23 Mar '21

23 Mar '21

Explicit synchronization is the future. At least, that seems to be what most userspace APIs are agreeing on at this point. However, most of our Linux APIs (both userspace and kernel UAPI) are currently built around implicit synchronization with dma-buf. While work is ongoing to change many of the userspace APIs and protocols to an explicit synchronization model, switching over piecemeal is difficult due to the number of potential components involved. On the kernel side, many drivers use dma-buf including GPU (3D/compute), display, v4l, and others. In userspace, we have X11, several Wayland compositors, 3D drivers, compute drivers (OpenCL etc.), media encode/decode, and the list goes on. This patch provides a path forward by allowing userspace to manually manage the fences attached to a dma-buf. Alternatively, one can think of this as making dma-buf's implicit synchronization simply a carrier for an explicit fence. This is accomplished by adding two IOCTLs to dma-buf for importing and exporting a sync file to/from the dma-buf. This way a userspace component which is uses explicit synchronization, such as a Vulkan driver, can manually set the write fence on a buffer before handing it off to an implicitly synchronized component such as a Wayland compositor or video encoder. In this way, each of the different components can be upgraded to an explicit synchronization model one at a time as long as the userspace pieces connecting them are aware of it and import/export fences at the right times. There is a potential race condition with this API if userspace is not careful. A typical use case for implicit synchronization is to wait for the dma-buf to be ready, use it, and then signal it for some other component. Because a sync_file cannot be created until it is guaranteed to complete in finite time, userspace can only signal the dma-buf after it has already submitted the work which uses it to the kernel and has received a sync_file back. There is no way to atomically submit a wait-use-signal operation. This is not, however, really a problem with this API so much as it is a problem with explicit synchronization itself. The way this is typically handled is to have very explicit ownership transfer points in the API or protocol which ensure that only one component is using it at any given time. Both X11 (via the PRESENT extension) and Wayland provide such ownership transfer points via explicit present and idle messages. The decision was intentionally made in this patch to make the import and export operations IOCTLs on the dma-buf itself rather than as a DRM IOCTL. This makes it the import/export operation universal across all components which use dma-buf including GPU, display, v4l, and others. It also means that a userspace component can do the import/export without access to the DRM fd which may be tricky to get in cases where the client communicates with DRM via a userspace API such as OpenGL or Vulkan. At a future date we may choose to add direct import/export APIs to components such as drm_syncobj to avoid allocating a file descriptor and going through two ioctls. However, that seems to be something of a micro-optimization as import/export operations are likely to happen at a rate of a few per frame of rendered or decoded video. Signed-off-by: Jason Ekstrand <jason(a)jlekstrand.net> --- This is marked as an RFC because I intend it to start a discussion about how to solve a problem. The current patch compiles but that's it for now. I'll be writing IGT tests and Vulkan driver patches which exercise it over the next couple of days. In the mean time, feel free to tell me why you think this is a great and/or terrible idea. :-) --Jason drivers/dma-buf/dma-buf.c | 115 +++++++++++++++++++++++++++++++++++ include/uapi/linux/dma-buf.h | 13 +++- 2 files changed, 126 insertions(+), 2 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index d4097856c86b..3845b87e209e 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -20,6 +20,7 @@ #include <linux/debugfs.h> #include <linux/module.h> #include <linux/seq_file.h> +#include <linux/sync_file.h> #include <linux/poll.h> #include <linux/dma-resv.h> #include <linux/mm.h> @@ -348,6 +349,114 @@ static long dma_buf_set_name(struct dma_buf *dmabuf, const char __user *buf) return ret; } +static long dma_buf_wait_sync_file(struct dma_buf *dmabuf, + const void __user *user_data) +{ + struct dma_buf_sync_file arg; + struct dma_fence *fence; + + if (copy_from_user(&arg, user_data, sizeof(arg))) + return -EFAULT; + + if (arg.flags != 0 && arg.flags != DMA_BUF_SYNC_FILE_SYNC_WRITE) + return -EINVAL; + + fence = sync_file_get_fence(arg.fd); + if (!fence) + return -EINVAL; + + if (arg.flags & DMA_BUF_SYNC_FILE_SYNC_WRITE) { + dma_resv_add_excl_fence(dmabuf->resv, fence); + } else { + dma_resv_add_shared_fence(dmabuf->resv, fence); + } + + return 0; +} + +static long dma_buf_signal_sync_file(struct dma_buf *dmabuf, + void __user *user_data) +{ + struct dma_buf_sync_file arg; + struct dma_fence *fence = NULL; + struct sync_file *sync_file; + int fd, ret; + + if (copy_from_user(&arg, user_data, sizeof(arg))) + return -EFAULT; + + if (arg.flags != 0 && arg.flags != DMA_BUF_SYNC_FILE_SYNC_WRITE) + return -EINVAL; + + fd = get_unused_fd_flags(O_CLOEXEC); + if (fd < 0) + return fd; + + if (arg.flags & DMA_BUF_SYNC_FILE_SYNC_WRITE) { + /* We need to include both the exclusive fence and all of + * the shared fences in our fence. + */ + struct dma_fence **fences = NULL; + unsigned i, num_fences = 0; + + ret = dma_resv_get_fences_rcu(dmabuf->resv, NULL, + &num_fences, &fences); + if (ret) + goto err_put_fd; + + if (num_fences == 0) { + fence = dma_fence_get_stub(); + } else if (num_fences == 1) { + fence = fences[0]; + kfree(fences); + } else { + struct dma_fence_array *fence_arr; + + fence_arr = dma_fence_array_create(num_fences, fences, + dma_fence_context_alloc(1), + 1, false); + if (!fence_arr) { + for (i = 0; i < num_fences; i++) + dma_fence_put(fences[i]); + kfree(fences); + ret = -ENOMEM; + goto err_put_fd; + } + + /* The fence array now owns fences_arr and our + * references to each of the individual fences. We + * only own a reference to the one array fence. + */ + fence = &fence_arr->base; + } + } else { + fence = dma_resv_get_excl_rcu(dmabuf->resv); + if (!fence) + fence = dma_fence_get_stub(); + } + + sync_file = sync_file_create(fence); + + dma_fence_put(fence); + + if (!sync_file) { + ret = -EINVAL; + goto err_put_fd; + } + + fd_install(fd, sync_file->file); + + arg.fd = fd; + if (copy_to_user(user_data, &arg, sizeof(arg))) + return -EFAULT; + + return 0; + +err_put_fd: + put_unused_fd(fd); + return ret; +} + static long dma_buf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -390,6 +499,12 @@ static long dma_buf_ioctl(struct file *file, case DMA_BUF_SET_NAME: return dma_buf_set_name(dmabuf, (const char __user *)arg); + case DMA_BUF_IOCTL_WAIT_SYNC_FILE: + return dma_buf_wait_sync_file(dmabuf, (const void __user *)arg); + + case DMA_BUF_IOCTL_SIGNAL_SYNC_FILE: + return dma_buf_signal_sync_file(dmabuf, (void __user *)arg); + default: return -ENOTTY; } diff --git a/include/uapi/linux/dma-buf.h b/include/uapi/linux/dma-buf.h index dbc7092e04b5..825b9a913c89 100644 --- a/include/uapi/linux/dma-buf.h +++ b/include/uapi/linux/dma-buf.h @@ -37,8 +37,17 @@ struct dma_buf_sync { #define DMA_BUF_NAME_LEN 32 +struct dma_buf_sync_file { + __u32 flags; + __s32 fd; +}; + +#define DMA_BUF_SYNC_FILE_SYNC_WRITE (1 << 0) + #define DMA_BUF_BASE 'b' -#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) -#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) +#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) +#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) +#define DMA_BUF_IOCTL_WAIT_SYNC_FILE _IOW(DMA_BUF_BASE, 2, struct dma_buf_sync) +#define DMA_BUF_IOCTL_SIGNAL_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_sync) #endif -- 2.24.1

9 52

[PATCH] drm/i915/display/vlv_dsi: Do no shut down displays on reboot if a DSI panel is used
by Hans de Goede 23 Mar '21

23 Mar '21

After the recently added commit fe0f1e3bfdfe ("drm/i915: Shut down displays gracefully on reboot"), the DSI panel on a Cherry Trail based Predia Basic tablet would no longer properly light up after reboot. The backlight still turns back on after reboot, but the LCD shows an all black display. The display is also all black during the time that EFI / the GOP is managing it, so e.g. the grub menu also is not visible. In this scenario the panel is initialized so that it appears to be working and the fastboot code skips doing a modeset. Forcing a modeset by doing a chvt to a text-console over ssh followed by echo-ing 1 and then 0 to /sys/class/graphics/fb0/blank causes the panel to work again. Add a QUIRK_SKIP_SHUTDOWN quirk which turns i915_driver_shutdown() into a no-op when set; and set this on vlv/chv devices when a DSI panel is detected, to work around this. Admittedly this is a bit of a big hammer, but these platforms have been around for quite some time now and they have always worked fine without the new behavior to shutdown everything on shutdown/reboot. This approach simply disables the recently introduced new shutdown behavior in this specific case where it is known to cause problems. Which is a nice and simple way to deal with this. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/gpu/drm/i915/display/vlv_dsi.c | 3 +++ drivers/gpu/drm/i915/i915_drv.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 1 + 3 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index f94025ec603a..792ef868b6af 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -1949,6 +1949,9 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) vlv_dsi_add_properties(intel_connector); + /* Some BIOS-es fail to re-init the DSI panel on reboot if we turn it off */ + dev_priv->quirks |= QUIRK_SKIP_SHUTDOWN; + return; err_cleanup_connector: diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 8e9cb44e66e5..92f2af55af6d 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1048,6 +1048,9 @@ static void intel_shutdown_encoders(struct drm_i915_private *dev_priv) void i915_driver_shutdown(struct drm_i915_private *i915) { + if (i915->quirks & QUIRK_SKIP_SHUTDOWN) + return; + disable_rpm_wakeref_asserts(&i915->runtime_pm); i915_gem_suspend(i915); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 26d69d06aa6d..272cd7cb22d4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -517,6 +517,7 @@ struct i915_psr { #define QUIRK_PIN_SWIZZLED_PAGES (1<<5) #define QUIRK_INCREASE_T12_DELAY (1<<6) #define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7) +#define QUIRK_SKIP_SHUTDOWN (1<<8) struct intel_fbdev; struct intel_fbc_work; -- 2.30.1

3 9

[PATCH v8 0/2] Add support of Lontium lt8912 MIPI to HDMI bridge
by Adrien Grassein 23 Mar '21

23 Mar '21

Hi, this patch set adds the support of the Lontium lt8912 MIPI to HDMI bridge in the kernel. It's only support the video part, not the audio part yet since I don't have the datasheet of this component. I get the current i2c configuration from Digi and Boundary drivers. Developed using the DB_DSIHD board from BoundaryDevices. Update in v2 - Use standard data-lanes instead of a custom prop; - Use hdmi-connector node. Update in v3 - Fix indentation; - Implement missing bridge functions; - Add some comments. Update in v4 - Fix bridge ops; - Fix i2c error detection. Update in v5 - Fix lt8912 name (lt8912b instead of lt8912); - Implement HPD via a workaround. In fact I don't have the datasheet of this component yet so I can't say if the configuration of the registers is correct or if I have an HW issue on my board. So, I choose to implement a fake version of HPD using a workqueue and polling the status regularly. Update in v6 - Fix a warning found by "kernel test robot" Update in v7 - Fix HPD logic (via an HW emulation); - HPD from chip is still not working. Update in v8 - Remove HPD logic (will be added later when HW bug qill be fixed). Thanks, Adrien Grassein (2): dt-bindings: display: bridge: Add documentation for LT8912B drm/bridge: Introduce LT8912B DSI to HDMI bridge .../display/bridge/lontium,lt8912b.yaml | 102 +++ MAINTAINERS | 6 + drivers/gpu/drm/bridge/Kconfig | 14 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/lontium-lt8912b.c | 765 ++++++++++++++++++ 5 files changed, 888 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml create mode 100644 drivers/gpu/drm/bridge/lontium-lt8912b.c -- 2.25.1

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dri-devel March 2021