dri-devel March 2021

dri-devel@lists.freedesktop.org

326 participants
867 discussions

[PATCH] drm/tegra: dpaux: move to use request_irq by IRQF_NO_AUTOEN flag
by Tian Tao 17 Mar '21

17 Mar '21

disable_irq() after request_irq() still has a time gap in which interrupts can come. request_irq() with IRQF_NO_AUTOEN flag will disable IRQ auto-enable because of requesting. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- drivers/gpu/drm/tegra/dpaux.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 105fb9c..0acaf66 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm/tegra/dpaux.c @@ -521,7 +521,8 @@ static int tegra_dpaux_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); pm_runtime_get_sync(&pdev->dev); - err = devm_request_irq(dpaux->dev, dpaux->irq, tegra_dpaux_irq, 0, + err = devm_request_irq(dpaux->dev, dpaux->irq, tegra_dpaux_irq, + IRQF_NO_AUTOEN, dev_name(dpaux->dev), dpaux); if (err < 0) { dev_err(dpaux->dev, "failed to request IRQ#%u: %d\n", @@ -529,8 +530,6 @@ static int tegra_dpaux_probe(struct platform_device *pdev) return err; } - disable_irq(dpaux->irq); - dpaux->aux.transfer = tegra_dpaux_transfer; dpaux->aux.dev = &pdev->dev; -- 2.7.4

1 0

[PATCH] drm/i915: Add Wa_14011060649
by Swathi Dhanavanthri 17 Mar '21

17 Mar '21

This is a permanent workaround for TGL,RKL,DG1 and ADLS. Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri(a)intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 27 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ 2 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 3b4a7da60f0b..01f34a6bdf3e 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1117,11 +1117,38 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); } +/* + * Though there are per-engine instances of these registers, + * they retain their value through engine resets and should + * only be provided on the GT workaround list rather than + * the engine-specific workaround list. + * + */ +static void +wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + struct intel_engine_cs *engine; + struct intel_gt *gt = &i915->gt; + int id; + + for_each_engine(engine, gt, id) { + if ((engine->class != VIDEO_DECODE_CLASS) || + (engine->instance % 2)) + continue; + + wa_write_or(wal, VDBOX_CGCTL3F10(engine->mmio_base), + IECPUNIT_CLKGATE_DIS); + } +} + static void gen12_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) { wa_init_mcr(i915, wal); + + /* Wa_14011060649:tgl,rkl,dg1,adls */ + wa_14011060649(i915, wal); } static void diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e5dd0203991b..cc60556306e2 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2715,6 +2715,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define RING_INDIRECT_CTX_OFFSET(base) _MMIO((base) + 0x1c8) /* gen8+ */ #define RING_CTX_TIMESTAMP(base) _MMIO((base) + 0x3a8) /* gen8+ */ +#define VDBOX_CGCTL3F10(base) _MMIO((base) + 0x3f10) +#define IECPUNIT_CLKGATE_DIS REG_BIT(22) + #define ERROR_GEN6 _MMIO(0x40a0) #define GEN7_ERR_INT _MMIO(0x44040) #define ERR_INT_POISON (1 << 31) -- 2.20.1

2 1

[PATCH] drm/msm: Remove need for reiterating the compatibles
by Bjorn Andersson 17 Mar '21

17 Mar '21

After spending a non-negligible time trying to figure out why dpu_kms_init() would dereference a NULL dpu_kms->pdev, it turns out that in addition to adding the new compatible to the msm_drv of_match_table one also need to teach add_display_components() to register the child nodes - which includes the DPU platform_device. Replace the open coded test for compatibles with a check against the match data of the mdss device to save others this trouble in the future. Signed-off-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> --- drivers/gpu/drm/msm/msm_drv.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 94525ac76d4e..0f6e186a609d 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1173,10 +1173,11 @@ static int compare_name_mdp(struct device *dev, void *data) return (strstr(dev_name(dev), "mdp") != NULL); } -static int add_display_components(struct device *dev, +static int add_display_components(struct platform_device *pdev, struct component_match **matchptr) { struct device *mdp_dev; + struct device *dev = &pdev->dev; int ret; /* @@ -1185,9 +1186,9 @@ static int add_display_components(struct device *dev, * Populate the children devices, find the MDP5/DPU node, and then add * the interfaces to our components list. */ - if (of_device_is_compatible(dev->of_node, "qcom,mdss") || - of_device_is_compatible(dev->of_node, "qcom,sdm845-mdss") || - of_device_is_compatible(dev->of_node, "qcom,sc7180-mdss")) { + switch (get_mdp_ver(pdev)) { + case KMS_MDP5: + case KMS_DPU: ret = of_platform_populate(dev->of_node, NULL, NULL, dev); if (ret) { DRM_DEV_ERROR(dev, "failed to populate children devices\n"); @@ -1206,9 +1207,11 @@ static int add_display_components(struct device *dev, /* add the MDP component itself */ drm_of_component_match_add(dev, matchptr, compare_of, mdp_dev->of_node); - } else { + break; + case KMS_MDP4: /* MDP4 */ mdp_dev = dev; + break; } ret = add_components_mdp(mdp_dev, matchptr); @@ -1273,7 +1276,7 @@ static int msm_pdev_probe(struct platform_device *pdev) int ret; if (get_mdp_ver(pdev)) { - ret = add_display_components(&pdev->dev, &match); + ret = add_display_components(pdev, &match); if (ret) return ret; } -- 2.29.2

1 0

linux-next: build warning after merge of the drm tree
by Stephen Rothwell 17 Mar '21

17 Mar '21

Hi all, After merging the drm tree, today's linux-next build (arm multi_v7_defconfig) produced this warning: drivers/gpu/drm/rockchip/rockchip_drm_vop.c: In function 'vop_plane_atomic_update': drivers/gpu/drm/rockchip/rockchip_drm_vop.c:882:26: warning: unused variable 'old_state' [-Wunused-variable] 882 | struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, | ^~~~~~~~~ Introduced by commit 977697e20b3d ("drm/atomic: Pass the full state to planes atomic disable and update") -- Cheers, Stephen Rothwell

1 0

[PATCH v5 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
by Liu Ying 17 Mar '21

17 Mar '21

Hi, This is the v5 series to add some DRM bridge drivers support for i.MX8qm/qxp SoCs. The bridges may chain one by one to form display pipes to support LVDS displays. The relevant display controller is DPU embedded in i.MX8qm/qxp SoCs. The DPU KMS driver can be found at: https://www.spinics.net/lists/arm-kernel/msg878542.html This series supports the following display pipes: 1) i.MX8qxp: prefetch eng -> DPU -> pixel combiner -> pixel link -> pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB) 2) i.MX8qm: prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display bridge(LDB) This series drops the patch 'phy: Add LVDS configuration options', as suggested by Robert Foss, because it has already been sent with the following series to add Mixel combo PHY found in i.MX8qxp: https://www.spinics.net/lists/arm-kernel/msg879957.html So, this version depends on that series. Patch 1/14 and 2/14 add bus formats used by PXL2DPI. Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas. Patch 10/14 adds a helper for LDB bridge drivers. Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and dt-bindings support for the bridges. Patch 14/14 updates MAINTAINERS. I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and a LVDS to HDMI bridge(with a downstream drm bridge driver). Welcome comments, thanks. v4->v5: * Drop the patch 'phy: Add LVDS configuration options'. (Robert) * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14. * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner bridge driver(patch 4/14). (Robert) * Make a comment occupy a line in the pixel link bridge driver(patch 6/14). (Robert) * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status Registers module. (Rob) * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly, rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert) * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'. (Robert) * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'. v3->v4: * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with the PXL2DPI instance instead of using alias ID. (Rob) * Add Rob's R-b tag on patch 11/14. v2->v3: * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and fsl,imx8qxp-pxl2dpi.yaml. (Rob) * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and fsl,imx8qxp-pxl2dpi.yaml. * Call syscon_node_to_regmap() to get regmaps from LDB bridge helper driver and PXL2DPI bridger driver instead of syscon_regmap_lookup_by_phandle(). * Drop two macros from pixel link bridge driver which help define functions and define them directly. * Properly disable all pixel link controls to POR value by calling imx8qxp_pixel_link_disable_all_controls() from imx8qxp_pixel_link_bridge_probe(). * Add Rob's R-b tags on patch 4/14 and 6/14. v1->v2: * Rebase the series upon the latest drm-misc-next branch(5.11-rc2 based). * Use graph schema in the dt-bindings of the bridges. (Laurent) * Require all four pixel link output ports in fsl,imx8qxp-pixel-link.yaml. (Laurent) * Side note i.MX8qm/qxp LDB official name 'pixel mapper' in fsl,imx8qxp-ldb.yaml. (Laurent) * Mention pixel link is accessed via SCU firmware in fsl,imx8qxp-pixel-link.yaml. (Rob) * Use enum instead of oneOf + const for the reg property of pixel combiner channels in fsl,imx8qxp-pixel-combiner.yaml. (Rob) * Rewrite the function to find the next bridge in pixel link bridge driver by properly using OF APIs and dropping unnecessary DT validation. (Rob) * Drop unnecessary port availability check in i.MX8qxp pixel link to DPI bridge driver. * Drop unnecessary DT validation from i.MX8qxp LDB bridge driver. * Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB bridge driver. * Avoid using companion_port OF node after putting it in imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver. * Drop unnecessary check for maximum available LDB channels from i.MX8qm LDB bridge driver. * Mention i.MX8qm/qxp LDB official name 'pixel mapper' in i.MX8qm/qxp LDB bridge drivers and Kconfig help messages. Liu Ying (14): media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner media: docs: Add some RGB bus formats for i.MX8qm/qxp pixel combiner dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding drm/bridge: imx: Add i.MX8qm/qxp display pixel link support dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module binding dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding drm/bridge: imx: Add i.MX8qxp pixel link to DPI support drm/bridge: imx: Add LDB driver helper support dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge binding drm/bridge: imx: Add LDB support for i.MX8qxp drm/bridge: imx: Add LDB support for i.MX8qm MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++ .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 144 +++++ .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++ .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 ++++ .../devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml | 202 ++++++ .../userspace-api/media/v4l/subdev-formats.rst | 156 +++++ MAINTAINERS | 10 + drivers/gpu/drm/bridge/Kconfig | 2 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/imx/Kconfig | 42 ++ drivers/gpu/drm/bridge/imx/Makefile | 9 + drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 232 +++++++ drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 98 +++ drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c | 586 +++++++++++++++++ drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c | 720 +++++++++++++++++++++ .../gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c | 448 +++++++++++++ drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 427 ++++++++++++ drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 485 ++++++++++++++ include/uapi/linux/media-bus-format.h | 6 +- 19 files changed, 3954 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml create mode 100644 drivers/gpu/drm/bridge/imx/Kconfig create mode 100644 drivers/gpu/drm/bridge/imx/Makefile create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.c create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.h create mode 100644 drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c -- 2.7.4

4 23

vmwgfx leaking bo pins?
by Thomas Hellström (Intel) 17 Mar '21

17 Mar '21

Hi, I tried latest drm-fixes today and saw a lot of these: Fallout from ttm rework? /Thomas [ 298.404788] WARNING: CPU: 1 PID: 3839 at drivers/gpu/drm/ttm/ttm_bo.c:512 ttm_bo_release+0x2b5/0x300 [ttm] [ 298.404795] Modules linked in: nls_utf8 isofs rfcomm tun bridge stp llc ip6table_nat ip6table_mangle ip6table_raw ip6table_security iptable_nat nf_nat nf_conntrack nf_defrag_ipv6 libcrc32c nf_defrag_ipv4 iptable_mangle iptable_raw iptable_security ip_set nfnetlink ip6table_filter ip6_tables iptable_filter cmac bnep vsock_loopback vmw_vsock_virtio_transport_common vmw_vsock_vmci_transport vsock snd_seq_midi snd_seq_midi_event intel_rapl_msr snd_ens1371 snd_ac97_codec ac97_bus vmw_balloon intel_rapl_common snd_seq rapl snd_pcm btusb btrtl btbcm btintel bluetooth joydev gameport snd_timer snd_rawmidi snd_seq_device rfkill snd ecdh_generic vmw_vmci ecc soundcore i2c_piix4 auth_rpcgss sunrpc ip_tables vmwgfx drm_kms_helper cec ttm e1000 crct10dif_pclmul crc32_pclmul crc32c_intel ghash_clmulni_intel drm mptspi serio_raw scsi_transport_spi mptscsih mptbase ata_generic pata_acpi uas usb_storage fuse [ 298.404837] CPU: 1 PID: 3839 Comm: thunderbird Tainted: G W 5.12.0-rc2+ #42 [ 298.404839] Hardware name: VMware, Inc. VMware Virtual Platform/440BX Desktop Reference Platform, BIOS 6.00 07/29/2019 [ 298.404840] RIP: 0010:ttm_bo_release+0x2b5/0x300 [ttm] [ 298.404845] Code: e8 a0 f3 35 ce e9 da fd ff ff 49 8b 7e 90 b9 30 75 00 00 31 d2 be 01 00 00 00 e8 c6 17 36 ce 49 8b 46 e0 eb 9e 48 89 e8 eb 99 <0f> 0b 41 c7 86 94 00 00 00 00 00 00 00 49 8d 76 08 31 d2 4c 89 ef [ 298.404847] RSP: 0018:ffffb24a43ef3bd0 EFLAGS: 00010202 [ 298.404848] RAX: 0000000000000001 RBX: 0000000000000000 RCX: 0000000000000001 [ 298.404850] RDX: 0000000000000001 RSI: 0000000000000246 RDI: ffffffffc03c50e8 [ 298.404851] RBP: ffff9ad4429f2620 R08: 0000000000000001 R09: ffff9ad4429f2000 [ 298.404852] R10: ffff9ad48664e090 R11: 0000000000000000 R12: ffff9ad4e71371d0 [ 298.404852] R13: ffff9ad4e7137000 R14: ffff9ad4e7137168 R15: ffff9ad48710f4c0 [ 298.404854] FS: 00007fc6d9ae4780(0000) GS:ffff9ad576e40000(0000) knlGS:0000000000000000 [ 298.404855] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 298.404857] CR2: 00007fc6c6740000 CR3: 00000001a4eac004 CR4: 00000000003706e0 [ 298.404864] Call Trace: [ 298.404866] vmw_resource_release+0x131/0x1f0 [vmwgfx] [ 298.404878] vmw_context_cotables_unref.isra.0+0x6f/0xa0 [vmwgfx] [ 298.404891] vmw_resource_release+0x16a/0x1f0 [vmwgfx] [ 298.404901] vmw_user_context_base_release+0x31/0x50 [vmwgfx] [ 298.404912] ttm_release_base+0x7f/0xc0 [vmwgfx] [ 298.404922] ttm_ref_object_release+0xde/0xf0 [vmwgfx] [ 298.404931] ttm_ref_object_base_unref+0x8e/0xb0 [vmwgfx] [ 298.404940] ? vmw_dx_context_unbind+0x1e0/0x1e0 [vmwgfx] [ 298.404951] drm_ioctl_kernel+0xaa/0xf0 [drm] [ 298.404974] drm_ioctl+0x20f/0x3a0 [drm] [ 298.404991] ? vmw_dx_context_unbind+0x1e0/0x1e0 [vmwgfx] [ 298.405003] ? selinux_file_ioctl+0x135/0x230 [ 298.405006] ? drm_version+0x90/0x90 [drm] [ 298.405023] vmw_generic_ioctl+0xab/0x150 [vmwgfx] [ 298.405033] __x64_sys_ioctl+0x83/0xb0 [ 298.405035] do_syscall_64+0x33/0x40 [ 298.405038] entry_SYSCALL_64_after_hwframe+0x44/0xae [ 298.405041] RIP: 0033:0x7fc6d9be15db [ 298.405042] Code: 89 d8 49 8d 3c 1c 48 f7 d8 49 39 c4 72 b5 e8 1c ff ff ff 85 c0 78 ba 4c 89 e0 5b 5d 41 5c c3 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 6d b8 0c 00 f7 d8 64 89 01 48 [ 298.405044] RSP: 002b:00007ffc8ce6de98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 298.405046] RAX: ffffffffffffffda RBX: 00007ffc8ce6dee0 RCX: 00007fc6d9be15db [ 298.405048] RDX: 00007ffc8ce6dee0 RSI: 0000000040086448 RDI: 0000000000000007 [ 298.405049] RBP: 0000000040086448 R08: 0000000000000000 R09: 0000000000000000 [ 298.405050] R10: 0000000000000000 R11: 0000000000000246 R12: 00007fc6d98e0000 [ 298.405051] R13: 0000000000000007 R14: 00007fc6d98ea3b0 R15: 00007fc6c671f800 [ 298.405053] ---[ end trace c628fb3ea8b5aa96 ]---

5 11

[PATCH AUTOSEL 4.14 18/21] drm/radeon: fix AGP dependency
by Sasha Levin 17 Mar '21

17 Mar '21

From: Christian König <christian.koenig(a)amd.com> [ Upstream commit cba2afb65cb05c3d197d17323fee4e3c9edef9cd ] When AGP is compiled as module radeon must be compiled as module as well. Signed-off-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 83cb2a88c204..595d0c96ba89 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -156,6 +156,7 @@ source "drivers/gpu/drm/arm/Kconfig" config DRM_RADEON tristate "ATI Radeon" depends on DRM && PCI && MMU + depends on AGP || !AGP select FW_LOADER select DRM_KMS_HELPER select DRM_TTM -- 2.30.1

1 0

[PATCH AUTOSEL 4.19 19/23] drm/radeon: fix AGP dependency
by Sasha Levin 17 Mar '21

17 Mar '21

From: Christian König <christian.koenig(a)amd.com> [ Upstream commit cba2afb65cb05c3d197d17323fee4e3c9edef9cd ] When AGP is compiled as module radeon must be compiled as module as well. Signed-off-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index e44e567bd789..a050a9aa9a5e 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -192,6 +192,7 @@ source "drivers/gpu/drm/arm/Kconfig" config DRM_RADEON tristate "ATI Radeon" depends on DRM && PCI && MMU + depends on AGP || !AGP select FW_LOADER select DRM_KMS_HELPER select DRM_TTM -- 2.30.1

1 0

[PATCH AUTOSEL 5.4 30/37] drm/radeon: fix AGP dependency
by Sasha Levin 17 Mar '21

17 Mar '21

From: Christian König <christian.koenig(a)amd.com> [ Upstream commit cba2afb65cb05c3d197d17323fee4e3c9edef9cd ] When AGP is compiled as module radeon must be compiled as module as well. Signed-off-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index e67c194c2aca..649f17dfcf45 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -206,6 +206,7 @@ source "drivers/gpu/drm/arm/Kconfig" config DRM_RADEON tristate "ATI Radeon" depends on DRM && PCI && MMU + depends on AGP || !AGP select FW_LOADER select DRM_KMS_HELPER select DRM_TTM -- 2.30.1

1 0

[PATCH AUTOSEL 5.4 29/37] drm/amdgpu: fb BO should be ttm_bo_type_device
by Sasha Levin 17 Mar '21

17 Mar '21

From: Nirmoy Das <nirmoy.das(a)amd.com> [ Upstream commit 521f04f9e3ffc73ef96c776035f8a0a31b4cdd81 ] FB BO should not be ttm_bo_type_kernel type and amdgpufb_create_pinned_object() pins the FB BO anyway. Signed-off-by: Nirmoy Das <nirmoy.das(a)amd.com> Acked-by: Christian König <christian.koenig(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c index eaa5e7b7c19d..fd94a17fb2c6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c @@ -146,7 +146,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, size = mode_cmd->pitches[0] * height; aligned_size = ALIGN(size, PAGE_SIZE); ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags, - ttm_bo_type_kernel, NULL, &gobj); + ttm_bo_type_device, NULL, &gobj); if (ret) { pr_err("failed to allocate framebuffer (%d)\n", aligned_size); return -ENOMEM; -- 2.30.1

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dri-devel March 2021