dri-devel March 2021

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326 participants
867 discussions

Is LLVM 13 (git) really ready for testing/development? libclc didn't compile
by Dieter Nützel 16 Mar '21

16 Mar '21

Hello Marek, can't compile anything, here. Poor Intel Nehalem X3470. Trying LLVM 12-rc2 later. Greetings, Dieter llvm-project/libclc> cd build && cmake ../ -- The CXX compiler identification is GNU 10.2.1 -- Detecting CXX compiler ABI info -- Detecting CXX compiler ABI info - done -- Check for working CXX compiler: /usr/bin/c++ - skipped -- Detecting CXX compile features -- Detecting CXX compile features - done LLVM version: 13.0.0git LLVM system libs: LLVM libs: -lLLVM-13git LLVM libdir: /usr/local/lib LLVM bindir: /usr/local/bin LLVM ld flags: -L/usr/local/lib LLVM cxx flags: -I/usr/local/include;-std=c++14;;;-fno-exceptions;-D_GNU_SOURCE;-D__STDC_CONSTANT_MACROS;-D__STDC_FORMAT_MACROS;-D__STDC_LIMIT_MACROS;-fno-rtti;-fno-exceptions clang: /usr/local/bin/clang llvm-as: /usr/local/bin/llvm-as llvm-link: /usr/local/bin/llvm-link opt: /usr/local/bin/opt llvm-spirv: /usr/local/bin/llvm-spirv -- Check for working CLC compiler: /usr/local/bin/clang -- Check for working CLC compiler: /usr/local/bin/clang -- works -- Check for working LLAsm compiler: /usr/local/bin/llvm-as -- Check for working LLAsm compiler: /usr/local/bin/llvm-as -- broken CMake Error at cmake/CMakeTestLLAsmCompiler.cmake:40 (message): The LLAsm compiler "/usr/local/bin/llvm-as" is not able to compile a simple test program. It fails with the following output: Change Dir: /opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp Run Build Command(s):/usr/bin/gmake cmTC_87af9/fast && /usr/bin/gmake -f CMakeFiles/cmTC_87af9.dir/build.make CMakeFiles/cmTC_87af9.dir/build gmake[1]: Verzeichnis „/opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp“ wird betreten Building LLAsm object CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc /usr/local/bin/clang -E -P -x cl /opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp/testLLAsmCompiler.ll -o CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp /usr/local/bin/llvm-as -o CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp /usr/local/bin/llvm-as: CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp:1:1: error: expected top-level entity typedef unsigned char uchar; ^ gmake[1]: *** [CMakeFiles/cmTC_87af9.dir/build.make:86: CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc] Fehler 1 gmake[1]: Verzeichnis „/opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp“ wird verlassen gmake: *** [Makefile:140: cmTC_87af9/fast] Fehler 2 CMake will not be able to correctly generate this project. Call Stack (most recent call first): CMakeLists.txt:127 (enable_language) -- Configuring incomplete, errors occurred! See also "/opt/llvm-project/libclc/build/CMakeFiles/CMakeOutput.log". See also "/opt/llvm-project/libclc/build/CMakeFiles/CMakeError.log". CMakeError.log Determining if the LLAsm compiler works failed with the following output: Change Dir: /opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp Run Build Command(s):/usr/bin/gmake cmTC_87af9/fast && /usr/bin/gmake -f CMakeFiles/cmTC_87af9.dir/build.make CMakeFiles/cmTC_87af9.dir/build gmake[1]: Verzeichnis „/opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp“ wird betreten Building LLAsm object CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc /usr/local/bin/clang -E -P -x cl /opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp/testLLAsmCompiler.ll -o CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp /usr/local/bin/llvm-as -o CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp /usr/local/bin/llvm-as: CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc.temp:1:1: error: expected top-level entity typedef unsigned char uchar; ^ gmake[1]: *** [CMakeFiles/cmTC_87af9.dir/build.make:86: CMakeFiles/cmTC_87af9.dir/testLLAsmCompiler.bc] Fehler 1 gmake[1]: Verzeichnis „/opt/llvm-project/libclc/build/CMakeFiles/CMakeTmp“ wird verlassen gmake: *** [Makefile:140: cmTC_87af9/fast] Fehler 2

3 6

[PATCH] drm/i915: Add Wa_14011060649
by Swathi Dhanavanthri 16 Mar '21

16 Mar '21

This is a permanent workaround for TGL,RKL,DG1 and ADLS. Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri(a)intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 23 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 3 +++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 3b4a7da60f0b..683a0446337a 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1117,11 +1117,34 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); } +/* + * This is a common function for WA 14011060649 + */ +static void +wa_14011060649(struct drm_i915_private *i915, struct i915_wa_list *wal) +{ + struct intel_engine_cs *engine; + struct intel_gt *gt = &i915->gt; + int id; + + for_each_engine(engine, gt, id) { + if ((engine->class != VIDEO_DECODE_CLASS) || + (engine->instance % 2)) + continue; + + wa_write_or(wal, VDBOX_CGCTL3F10(engine->mmio_base), + IECPUNIT_CLKGATE_DIS); + } +} + static void gen12_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) { wa_init_mcr(i915, wal); + + /* Wa_14011060649:tgl,rkl,dg1,adls */ + wa_14011060649(i915, wal); } static void diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e5dd0203991b..cc60556306e2 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2715,6 +2715,9 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define RING_INDIRECT_CTX_OFFSET(base) _MMIO((base) + 0x1c8) /* gen8+ */ #define RING_CTX_TIMESTAMP(base) _MMIO((base) + 0x3a8) /* gen8+ */ +#define VDBOX_CGCTL3F10(base) _MMIO((base) + 0x3f10) +#define IECPUNIT_CLKGATE_DIS REG_BIT(22) + #define ERROR_GEN6 _MMIO(0x40a0) #define GEN7_ERR_INT _MMIO(0x44040) #define ERR_INT_POISON (1 << 31) -- 2.20.1

1 0

[PATCHv1 0/6] Support for GE B1x5v2
by Sebastian Reichel 16 Mar '21

16 Mar '21

Hi, This series adds support for another General Electric patient monitor series (similar to existing Bx50v3), which is based on i.MX6DL using Congatec's QMX6 module. The module uses an I2C RTC to provide the i.MX6 32768 Hz clock, so it's important to keep it enabled. Not doing so results in incorrect timings of watchdog and i.MX6 RTC. The bootloader enables the watchdog, so disabling the clock results in system reboot. [0] The second patch is required for B155v2, which uses a 1366x768 G156XTN01 panel. The 1366 width is not supported by the display pipeline and result in boot hanging without the patch. [1] Patches 3+4 are updating DT bindings for the new board compatible values. Patch 5 adds missing sst25vf032b to spi-nor bindings. Checkpatch still complains, since the binding lists all chips without vendor prefix. This probably should be fixed when the files is moved to YAML, but is non-trivial since those chips are manufactured by multiple vendors. E.g. sst25vf032b can be sourced from at least sst and microchip. Finally patch 6 adds the board files. Thanks, [0] There has been a discussion for the problem on the mailinglists last year. The discussion died off, when I told people their ideas don't work. I hope using protected-clocks is fine for this usecase. https://lore.kernel.org/linux-clk/20191108170135.9053-1-sebastian.reichel@c… [1] I've sent this before as a separate patch in September, but nobody seemed to care. This adds full context for the problem. https://lore.kernel.org/dri-devel/20200910162831.321556-1-sebastian.reichel… -- Sebastian Sebastian Reichel (6): rtc: m41t80: add support for protected clock drm/imx: Add 8 pixel alignment fix dt-bindings: vendor-prefixes: add congatec dt-bindings: arm: fsl: add GE B1x5pv2 boards dt-bindings: mtd: jedec,spi-nor: add sst25vf032b ARM: dts: imx6: Add GE B1x5v2 .../devicetree/bindings/arm/fsl.yaml | 11 + .../devicetree/bindings/mtd/jedec,spi-nor.txt | 1 + .../devicetree/bindings/rtc/rtc-m41t80.txt | 1 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm/boot/dts/Makefile | 5 + arch/arm/boot/dts/imx6dl-b105pv2.dts | 35 + arch/arm/boot/dts/imx6dl-b105v2.dts | 35 + arch/arm/boot/dts/imx6dl-b125pv2.dts | 33 + arch/arm/boot/dts/imx6dl-b125v2.dts | 33 + arch/arm/boot/dts/imx6dl-b155v2.dts | 36 + arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi | 434 ++++++++++++ arch/arm/boot/dts/imx6dl-b1x5v2.dtsi | 61 ++ arch/arm/boot/dts/imx6dl-qmx6.dtsi | 623 ++++++++++++++++++ drivers/gpu/drm/imx/imx-drm-core.c | 19 +- drivers/gpu/drm/imx/imx-ldb.c | 5 + drivers/gpu/drm/imx/ipuv3-crtc.c | 11 +- drivers/gpu/drm/imx/ipuv3-plane.c | 19 +- drivers/gpu/ipu-v3/ipu-dc.c | 5 + drivers/gpu/ipu-v3/ipu-di.c | 7 + drivers/rtc/rtc-m41t80.c | 3 + 20 files changed, 1373 insertions(+), 6 deletions(-) create mode 100644 arch/arm/boot/dts/imx6dl-b105pv2.dts create mode 100644 arch/arm/boot/dts/imx6dl-b105v2.dts create mode 100644 arch/arm/boot/dts/imx6dl-b125pv2.dts create mode 100644 arch/arm/boot/dts/imx6dl-b125v2.dts create mode 100644 arch/arm/boot/dts/imx6dl-b155v2.dts create mode 100644 arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi create mode 100644 arch/arm/boot/dts/imx6dl-b1x5v2.dtsi create mode 100644 arch/arm/boot/dts/imx6dl-qmx6.dtsi -- 2.30.0

5 16

[PATCH v8 0/3] GUD USB Display driver
by Noralf Trønnes 16 Mar '21

16 Mar '21

Hi, A while back I had the idea to turn a Raspberry Pi Zero into a $5 USB to HDMI/SDTV/DPI display adapter. The protocol is open so people are free to make displays implementing it and use this driver, all that's needed is to add a USB vid:pid to the driver for the display. See the wiki[1] for more information and images for the Raspberry Pi Zero/4. Changes in this version: - Forgot to filter RGB111 from reaching userspace - Handle a device that only returns unknown device properties (Peter) - s/GUD_PIXEL_FORMAT_RGB111/GUD_PIXEL_FORMAT_XRGB1111/ (Peter) - Fix R1 and XRGB1111 format conversion - Add FIXME about Big Endian being broken (Peter, Ilia) I will apply the patches as soon as the dependency shows up in drm-misc-next. Dependency: drm: Use USB controller's DMA mask when importing dmabufs[2] (currently in drm-misc-fixes but not in drm-misc-next yet, also present in drm-tip and linux-next) Noralf. [1] https://github.com/notro/gud/wiki [2] https://patchwork.freedesktop.org/patch/msgid/20210303133229.3288-1-tzimmer… Noralf Trønnes (3): drm/uapi: Add USB connector type drm/probe-helper: Check epoch counter in output_poll_execute() drm: Add GUD USB Display driver MAINTAINERS | 8 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_connector.c | 1 + drivers/gpu/drm/drm_probe_helper.c | 7 +- drivers/gpu/drm/gud/Kconfig | 14 + drivers/gpu/drm/gud/Makefile | 4 + drivers/gpu/drm/gud/gud_connector.c | 729 ++++++++++++++++++++++++++++ drivers/gpu/drm/gud/gud_drv.c | 661 +++++++++++++++++++++++++ drivers/gpu/drm/gud/gud_internal.h | 154 ++++++ drivers/gpu/drm/gud/gud_pipe.c | 552 +++++++++++++++++++++ include/drm/gud.h | 333 +++++++++++++ include/uapi/drm/drm_mode.h | 1 + 13 files changed, 2466 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/gud/Kconfig create mode 100644 drivers/gpu/drm/gud/Makefile create mode 100644 drivers/gpu/drm/gud/gud_connector.c create mode 100644 drivers/gpu/drm/gud/gud_drv.c create mode 100644 drivers/gpu/drm/gud/gud_internal.h create mode 100644 drivers/gpu/drm/gud/gud_pipe.c create mode 100644 include/drm/gud.h -- 2.23.0

2 6

[PATCH] drm/ttm: make ttm_bo_unpin more defensive
by Christian König 16 Mar '21

16 Mar '21

We seem to have some more driver bugs than thought. Signed-off-by: Christian König <christian.koenig(a)amd.com> --- include/drm/ttm/ttm_bo_api.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h index 4fb523dfab32..df9fe596e7c5 100644 --- a/include/drm/ttm/ttm_bo_api.h +++ b/include/drm/ttm/ttm_bo_api.h @@ -603,9 +603,11 @@ static inline void ttm_bo_pin(struct ttm_buffer_object *bo) static inline void ttm_bo_unpin(struct ttm_buffer_object *bo) { dma_resv_assert_held(bo->base.resv); - WARN_ON_ONCE(!bo->pin_count); WARN_ON_ONCE(!kref_read(&bo->kref)); - --bo->pin_count; + if (bo->pin_count) + --bo->pin_count; + else + WARN_ON_ONCE(true); } int ttm_mem_evict_first(struct ttm_device *bdev, -- 2.25.1

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2021 X.Org Foundation Election Candidates
by Harry Wentland 16 Mar '21

16 Mar '21

To all X.Org Foundation Members: The election for the X.Org Foundation Board of Directors will begin on 22 March 2021. We have 6 candidates who are running for 4 seats. They are (in alphabetical order): Samuel Iglesias Gonsálvez Manasi Navare Lyude Paul Rodrigo Siqueira Lucas Stach Daniel Vetter Attached below are the Personal Statements each candidate submitted for your consideration along with their Statements of Contribution that they submitted with the membership application. Please review each of the candidates' statements to help you decide whom to vote for during the upcoming election. If you have questions of the candidates, you should feel free to ask them here on the mailing list. The election committee will provide detailed instructions on how the voting system will work when the voting period begins. ** Election Schedule ** Nomination period Start: Mon 22nd February Nomination period End: Sun 7th March Publication of Candidates & start of Candidate QA: Mon 15th March Deadline of X.Org membership application or renewal: Thu 18th March Election Planned Start: Mon 22nd March anywhere on earth Election Planned End: Sun 4th April anywhere on earth ** Election Committee ** * Eric Anholt * Mark Filion * Keith Packard * Harry Wentland Thanks, Harry Wentland, on behalf of the X.Org elections committee ** Nominees ** ## Samuel Iglesias Gonsálvez __Current Affiliation:__ Igalia __Personal Statement:__ I have been contributing to Mesa and piglit for 7 years improving open-source drivers for both OpenGL and Vulkan. During my time on the board, I have become the XDC organization coordinator and the XDC CFP committee chair, due to my experience organizing the XDC 2018 in A Coruña, Spain. Thanks to these experiences, I have been deeply involved in the XDC organization process, where I have helped make a great and welcoming conference every year. If I am elected, I plan to continue leading both the XDC organization process and the XDC CFP committee. ## Manasi Navare __Current Affiliation:__ Intel __Statement of contribution:__ I am a lead contributor to Intel’s Open source graphics kernel driver i915 as well as to the Linux Kernel DRM subsystem. One of my most widely used contributions is the Display Port Compliance code in i915, DRM as well as in Xserver and IGT to make the entire graphics stack Display Port compliant and reward the end users with black screen free displays. I have also enabled features like Display stream compression across DRM and i915 as per VESA’s DSC specification for Display Port. Most recently I have been working with both the DRM and i915 community as well as the AMD developers to implement and enable adaptive sync feature for variable refresh rate on display drivers for enhanced gaming experience. I also have commit rights to several upstream projects like drm-intel, drm-misc and Intel GPU Tools. I have served on X.org board of directors for last 2 years organizing XDC conferences, being on Code of Conduct committee for X.org and Freedesktop and taking over the treasurer responsibility since September 2020. __Personal Statement:__ I have been a Linux Open Source contributor for last 7 years since I joined Intel's Open source technology center. My major contributions are in enabling display interfaces and develop display features in upcoming display specifications in i915 and Linux DRM subsystem. I have presented several talks at Linux Graphics conferences like Embedded Linux Conference, XDC and FOSDEM on several graphics display features like Display Port compliance and Display Stream Compression, Tiled display support, Adaptive Sync or Variable Refresh rate kernel support for gaming and I have been already actively involved in IRC discussions with DRM and i915 maintainers to constantly provide any solution on display port questions and work on improving the kernel documentation and code quality. I have served on the X.org board of directors since 2019 helping in XDC 2019 and XDC 2020 organization and for ensuring the Code of Conduct on the X.org community and during XDC events. I have previously mentored for the KMS project in Outreachy 2018 winter program as well as administered the Google summer of code 2019 program and will continue to do so whenever I get an opportunity. I joined the Code of Conduct Freedesktop committee as well to ensure it is followed on all the Freedesktop projects and open source channels. I have recently stepped up to take over the treasurer responsibility as part of the X.org board and working with all our sponsors to get the invoicing for the X.org events. If I get elected I would like to continue being a treasurer managing the XDC sponsorship and invoicing responsibilities as well as continue serving on the Code of conduct committee for X.org and Freedesktop. In addition to this I would like to help out on XDC event website organization and promoting various X.org events as well as reviewing submissions on the X.org conferences. ## Lyude Paul __Current Affiliation:__ Red Hat __Personal Statement:__ Hi! My name is Lyude Paul, and I'm currently employed at Red Hat as a Software Engineer. I'm also currently on the X.org Board of Directors as X.org's Secretary, and am also a member of the CoC team. I've also been a member of X.org for multiple years now and have contributed to a plethora of various projects in the X.org/freedesktop.org/linux kernel space such as: nouveau, i915, amdgpu, the wayland protocol, igt-gpu-tools, libinput, and more. During my tenure on the board I've accomplished a couple of cool things. For example, I restarted X.org's relationship with VESA in order to give X.org members access to various VESA specifications they may not have access to otherwise without a prior VESA membership. I also worked to help enable X.org to provide funding for professional CoC training for any X.org/freedesktop.org project that requests it. I've quite enjoyed being able to serve this community, and will continue to do so if re-elected to the board of directors. ## Rodrigo Siqueira __Current Affiliation:__ AMD __Personal Statement:__ My name is Rodrigo Siqueira (a.k.a Siqueira). I contribute most of the time to display core from AMD, and occasionally I contribute to VKMS. Xorg played an essential role in my life since it allowed me to start my career as a kernel developer under the DRM subsystem. I want to join the board to give back a little more to the community by helping solve daily organization challenges. Additionally, I want to contribute to XDC and perhaps to the Xorg website. If I get elected, I'll try my best to learn and find solutions that provide a good trade-off for this organization. ## Lucas Stach __Current Affiliation:__ Pengutronix __Personal Statement:__ In 2012 the X.Org foundation enabled me to take part in XDC by covering my travel costs, which accelerated my professional career into open- source graphics. In the last few years I've been able to visit many conferences, both as attendee and speaker, but none of them master the balancing act of being both very high-profile, with in-depth technical discussions, and at the same time having an extremely low barrier of entry quite like XDC. I believe that this reflects very well on the whole X.Org community, as well as the X.Org foundation, which makes this possible due to its clear mission to foster this kind of open collaboration. When elected I would like to make sure that the foundation stays focused on this path and continues to be the critical resource it is today in bringing together our community. ## Daniel Vetter __Current Affiliation:__ Intel __Personal Statement:__ I've been hacking on graphics drivers for a few years now, mostly stuck on the kernel side of things. More recently I've also started to work on community issues, trying to make it easier to contribute to upstream, improve processes all around and reduces barriers to get drivers merged and new people integrated into our community. In my previous term I've successfully handed over my secretary duties to Lyude. I've served on the papers committee for XDC, and I lead the sponsor drive, securing a record 12 company's support last year, despite Covid and all that. I'd like to continue this work and making sure we have a great conference to meet and exchange ideas, open and accessible to everyone.

1 1

[PULL] drm-intel-next
by Jani Nikula 16 Mar '21

16 Mar '21

Hi Dave & Daniel - drm-intel-next-2021-03-16: Highlights: - Alderlake S enabling, via topic branch (Aditya, Anusha, Caz, José, Lucas, Matt, Tejas) - Refactor display code to shrink intel_display.c etc. (Dave) - Support more gen 9 and Tigerlake PCH combinations (Lyude, Tejas) - Add eDP MSO support (Jani) Display: - Refactor to support multiple PSR instances (Gwan-gyeong) - Link training debug logging updates (Sean) - Updates to eDP fixed mode handling (Jani) - Disable PSR2 on JSL/EHL (Edmund) - Support DDR5 and LPDDR5 for bandwidth computation (Clint, José) - Update VBT DP max link rate table (Shawn) - Disable the QSES check for HDCP2.2 over MST (Juston) - PSR updates, refactoring, selective fetch (José, Gwan-gyeong) - Display init sequence refactoring (Lucas) - Limit LSPCON to gen 9 and 10 platforms (Ankit) - Fix DDI lane polarity per VBT info (Uma) - Fix HDMI vswing programming location in mode set (Ville) - Various display improvements and refactorings and cleanups (Ville) - Clean up DDI clock routing and readout (Ville) - Workaround async flip + VT-d corruption on HSW/BDW (Ville) - SAGV watermark fixes and cleanups (Ville) - Silence pipe tracepoint WARNs (Ville) Other: - Remove require_force_probe protection from RKL, may need to be revisited (Tejas) - Detect loss of MMIO access (Matt) - GVT display improvements - drm/i915: Disable runtime power management during shutdown (Imre) - Perf/OA updates (Umesh) - Remove references to struct drm_device.pdev, via topic branch (Thomas) - Backmerge (Jani) BR, Jani. The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: Linux 5.12-rc2 (2021-03-05 17:33:41 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2021-03-16 for you to fetch changes up to 2b25fb31a38d4fe8e745754036052ef8b16fe712: Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into drm-intel-next (2021-03-16 13:42:33 +0200) ---------------------------------------------------------------- Highlights: - Alderlake S enabling, via topic branch (Aditya, Anusha, Caz, José, Lucas, Matt, Tejas) - Refactor display code to shrink intel_display.c etc. (Dave) - Support more gen 9 and Tigerlake PCH combinations (Lyude, Tejas) - Add eDP MSO support (Jani) Display: - Refactor to support multiple PSR instances (Gwan-gyeong) - Link training debug logging updates (Sean) - Updates to eDP fixed mode handling (Jani) - Disable PSR2 on JSL/EHL (Edmund) - Support DDR5 and LPDDR5 for bandwidth computation (Clint, José) - Update VBT DP max link rate table (Shawn) - Disable the QSES check for HDCP2.2 over MST (Juston) - PSR updates, refactoring, selective fetch (José, Gwan-gyeong) - Display init sequence refactoring (Lucas) - Limit LSPCON to gen 9 and 10 platforms (Ankit) - Fix DDI lane polarity per VBT info (Uma) - Fix HDMI vswing programming location in mode set (Ville) - Various display improvements and refactorings and cleanups (Ville) - Clean up DDI clock routing and readout (Ville) - Workaround async flip + VT-d corruption on HSW/BDW (Ville) - SAGV watermark fixes and cleanups (Ville) - Silence pipe tracepoint WARNs (Ville) Other: - Remove require_force_probe protection from RKL, may need to be revisited (Tejas) - Detect loss of MMIO access (Matt) - GVT display improvements - drm/i915: Disable runtime power management during shutdown (Imre) - Perf/OA updates (Umesh) - Remove references to struct drm_device.pdev, via topic branch (Thomas) - Backmerge (Jani) ---------------------------------------------------------------- Aditya Swarup (8): drm/i915/tgl: Use TGL stepping info for applying WAs drm/i915/adl_s: Configure DPLL for ADL-S drm/i915/adl_s: Configure Port clock registers for ADL-S drm/i915/adl_s: Initialize display for ADL-S drm/i915/adl_s: Add adl-s ddc pin mapping drm/i915/adl_s: Add vbt port and aux channel settings for adls drm/i915/adl_s: Add display WAs for ADL-S drm/i915/adl_s: Add GT and CTX WAs for ADL-S Ankit Nautiyal (1): drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 Anshuman Gupta (1): drm/i915/debugfs: HDCP capability enc NULL check Anusha Srivatsa (4): drm/i915/adl_s: Add PCH support drm/i915/adl_s: Add Interrupt Support drm/i915/adl_s: Add PHYs for Alderlake S drm/i915/adl_s: Load DMC Bhaskar Chowdhury (1): drm/i915/gvt: Fixed couple of spellings in the file gtt.c Caz Yokoyama (2): drm/i915/adl_s: Add ADL-S platform info and PCI ids x86/gpu: Add Alderlake-S stolen memory support Clint Taylor (1): drm/i915/display: support ddr5 mem types Colin Ian King (1): drm/i915/display: fix spelling mistake "Couldnt" -> "Couldn't" Colin Xu (2): drm/i915/gvt: Get accurate vGPU virtual display refresh rate from vreg drm/i915/gvt: Refactor GVT vblank emulator for vGPU virtual display Dave Airlie (9): drm/i915: refactor ddi translations into a separate file (v2) drm/i915: migrate hsw fdi code to new file. drm/i915: migrate skl planes code new file (v5) drm/i915: move pipe update code into crtc. (v2) drm/i915: split fb scalable checks into g4x and skl versions drm/i915: move is_ccs_modifier to an inline drm/i915: migrate pll enable/disable code to intel_dpll.[ch] drm/i915: migrate i9xx plane get config drm/i915: refactor skylake scaler code into new file. Edmund Dea (1): drm/i915/display: Remove PSR2 on JSL and EHL Gwan-gyeong Mun (3): drm/i915/display: Support PSR Multiple Instances drm/i915/display: Support Multiple Transcoders' PSR status on debugfs drm/i915/display: Do not allow DC3CO if PSR SF is enabled Imre Deak (3): drm/i915: Disable runtime power management during shutdown drm/i915/tgl+: Make sure TypeC FIA is powered up when initializing it drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain names Jani Nikula (14): drm/i915/bios: tidy up child device debug logging Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next Merge tag 'topic/drm-device-pdev-2021-02-02' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-next drm/dp: add MSO related DPCD registers drm/i915/edp: reject modes with dimensions other than fixed mode drm/i915/edp: always add fixed mode to probed modes in ->get_modes() drm/i915/edp: read sink MSO configuration for eDP 1.4+ drm/i915/reg: add stream splitter configuration definitions drm/i915/mso: add splitter state readout for platforms that support it drm/i915/mso: add splitter state check drm/i915/edp: modify fixed and downclock modes for MSO drm/i915/edp: enable eDP MSO during link training Merge drm/drm-next into drm-intel-next Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into drm-intel-next José Roberto de Souza (9): drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION drm/i915: Make psr_safest_params and enable_psr2_sel_fetch parameters read only drm/i915/display: Add DDR5 and LPDDR5 BW buddy page entries drm/i915: Remove dead code from skl_pipe_wm_get_hw_state() drm/i915/display: Allow PSR2 selective fetch to be enabled at run-time drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() drm/i915/display: Remove some redundancy around CAN_PSR() drm/i915/display: Set source_support even if panel do not support PSR Juston Li (1): drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST Lee Shawn C (1): drm/i915/vbt: update DP max link rate table Lucas De Marchi (6): drm/i915/adl_s: Add power wells drm/i915/display: fix comment on skl straps drm/i915: stop registering if drm_dev_register() fails drm/i915: group display-related register calls drm/i915/display: move register functions to display/ drm/i915: move intel_init_audio_hooks inside display Lyude Paul (5): drm/i915/gen9_bc: Recognize TGP PCH + CML combos drm/i915/gen9_bc: Introduce TGP PCH DDC pin mappings drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos drm/i915/gen9_bc: Add W/A for missing STRAP config on TGP PCH + CML combos drm/i915/icp+: Use icp_hpd_irq_setup() instead of spt_hpd_irq_setup() Matt Roper (5): drm/i915/adl_s: Update combo PHY master/slave relationships drm/i915/adl_s: Update PHY_MISC programming drm/i915/adl_s: Re-use TGL GuC/HuC firmware drm/i915: FPGA_DBG is display-specific drm/i915: Try to detect sudden loss of MMIO access Nathan Chancellor (1): drm/i915: Enable -Wuninitialized Sean Paul (2): drm/i915/dp_link_training: Add newlines to debug messages drm/i915/dp_link_training: Convert DRM_DEBUG_KMS to drm_dbg_kms Tejas Upadhyay (3): drm/i915/adl_s: Update memory bandwidth parameters drm/i915/rkl: Remove require_force_probe protection drm/i915/gen9bc: Handle TGP PCH during suspend/resume Thomas Zimmermann (3): drm/i915: Remove references to struct drm_device.pdev drm/i915/gt: Remove references to struct drm_device.pdev drm/i915/gvt: Remove references to struct drm_device.pdev Uma Shankar (1): drm/i915/display: Handle lane polarity for DDI port Umesh Nerlige Ramappa (5): i915/perf: Store a mask of valid OA formats for a platform i915/perf: Move OA formats to single array i915/perf: Add additional OA formats for gen12 i915/perf: Drop the check for report reason in OA i915/perf: Start hrtimer only if sampling the OA buffer Ville Syrjälä (53): drm/i915: Skip vswing programming for TBT drm/i915: Extract intel_ddi_power_up_lanes() drm/i915: Power up combo PHY lanes for for HDMI as well drm/i915: Move HDMI vswing programming to the right place drm/i915: Don't check tc_mode unless dealing with a TC PHY drm/i915: Reject 446-480MHz HDMI clock on GLK drm/i915: Index min_{cdclk,voltage_level}[] with pipe drm/i915: Use intel_hdmi_port_clock() more drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling drm/i915: Fix overlay frontbuffer tracking drm/i915: Warn when releasing a frontbuffer while in use drm/i915: Use intel_ddi_clk_select() for FDI drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs drm/i915: Extract hsw_ddi_{enable,disable}_clock() drm/i915: Extract skl_ddi_{enable,disable}_clock() drm/i195: Extract cnl_ddi_{enable,disable}_clock() drm/i915: Convert DG1 over to .{enable,disable}_clock() drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs drm/i915: Use intel_de_rmw() for DDI clock routing drm/i915: Sprinkle a few missing locks around shared DDI clock registers drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() drm/i915: Extract _cnl_ddi_{enable,disable}_clock() drm/i915: Split adl-s/rkl from icl_ddi_combo_{enable,disable}_clock() drm/i915: Use .disable_clock() for pll sanitation drm/i915: Relocate icl_sanitize_encoder_pll_mapping() drm/i915: s/dev_priv/i915/ for the remainder of DDI clock routing drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALID drm/i915: Wait for scanout to stop when sanitizing planes drm/i915: Readout conn_state->max_bpc drm/i915: Fix TGL+ plane SAGV watermark programming drm/i915: Zero out SAGV wm when we don't have enough DDB for it drm/i915: Print wm changes if sagv_wm0 changes drm/i915: Stuff SAGV watermark into a sub-structure drm/i915: Introduce SAGV transtion watermark drm/i915: Check tgl+ SAGV watermarks properly drm/i915: Clean up verify_wm_state() drm/i915: Move pipe enable/disable tracepoints to intel_crtc_vblank_{on,off}() drm/i915: Don't try to query the frame counter for disabled pipes drm/i915: Return zero as the scanline counter for disabled pipes drm/i915: Fix DSI TE max_vblank_count handling drm/i915: Call primary encoder's .get_config() from MST .get_config() drm/i915: Do intel_dpll_readout_hw_state() after encoder readout drm/i915: Use pipes instead crtc indices in PLL state tracking drm/i915: Move DDI clock readout to encoder->get_config() drm/i915: Add encoder->is_clock_enabled() drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms drm/i915: Tolerate bogus DPLL selection drm/i915: Workaround async flip + VT-d corruption on HSW/BDW drm/i915: Tighten SAGV constraint for pre-tgl drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b drm/i915: Calculate min_ddb_alloc for trans_wm drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level() drm/i915: s/plane_res_b/blocks/ etc. arch/x86/kernel/early-quirks.c | 1 + drivers/gpu/drm/i915/Makefile | 5 +- drivers/gpu/drm/i915/display/i9xx_plane.c | 123 +- drivers/gpu/drm/i915/display/i9xx_plane.h | 4 + drivers/gpu/drm/i915/display/icl_dsi.c | 28 +- drivers/gpu/drm/i915/display/intel_atomic.c | 2 +- drivers/gpu/drm/i915/display/intel_bios.c | 166 +- drivers/gpu/drm/i915/display/intel_bios.h | 2 + drivers/gpu/drm/i915/display/intel_bw.c | 22 +- drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +- drivers/gpu/drm/i915/display/intel_combo_phy.c | 23 +- drivers/gpu/drm/i915/display/intel_crt.c | 6 +- drivers/gpu/drm/i915/display/intel_crtc.c | 276 +- drivers/gpu/drm/i915/display/intel_csr.c | 12 +- drivers/gpu/drm/i915/display/intel_ddi.c | 2658 +++++++------------- drivers/gpu/drm/i915/display/intel_ddi.h | 23 +- drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 1394 ++++++++++ drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 100 + drivers/gpu/drm/i915/display/intel_display.c | 2637 ++----------------- drivers/gpu/drm/i915/display/intel_display.h | 48 +- .../gpu/drm/i915/display/intel_display_debugfs.c | 132 +- drivers/gpu/drm/i915/display/intel_display_power.c | 231 +- drivers/gpu/drm/i915/display/intel_display_power.h | 32 + drivers/gpu/drm/i915/display/intel_display_types.h | 117 +- drivers/gpu/drm/i915/display/intel_dp.c | 134 +- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 +- .../gpu/drm/i915/display/intel_dp_link_training.c | 17 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +- drivers/gpu/drm/i915/display/intel_dpll.c | 509 ++++ drivers/gpu/drm/i915/display/intel_dpll.h | 18 + drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 95 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 9 +- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +- drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +- drivers/gpu/drm/i915/display/intel_fdi.c | 138 + drivers/gpu/drm/i915/display/intel_fdi.h | 3 + drivers/gpu/drm/i915/display/intel_frontbuffer.c | 2 + drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 67 +- drivers/gpu/drm/i915/display/intel_lpe_audio.c | 5 +- drivers/gpu/drm/i915/display/intel_opregion.c | 6 +- drivers/gpu/drm/i915/display/intel_overlay.c | 2 +- drivers/gpu/drm/i915/display/intel_panel.c | 4 +- drivers/gpu/drm/i915/display/intel_pps.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 611 +++-- drivers/gpu/drm/i915/display/intel_psr.h | 10 +- drivers/gpu/drm/i915/display/intel_quirks.c | 2 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +- drivers/gpu/drm/i915/display/intel_sprite.c | 1718 +------------ drivers/gpu/drm/i915/display/intel_sprite.h | 7 - drivers/gpu/drm/i915/display/intel_vbt_defs.h | 27 +- drivers/gpu/drm/i915/display/intel_vga.c | 8 +- drivers/gpu/drm/i915/display/skl_scaler.c | 556 ++++ drivers/gpu/drm/i915/display/skl_scaler.h | 29 + drivers/gpu/drm/i915/display/skl_universal_plane.c | 2266 +++++++++++++++++ drivers/gpu/drm/i915/display/skl_universal_plane.h | 37 + drivers/gpu/drm/i915/display/vlv_dsi.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_phys.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 10 +- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_rc6.c | 4 +- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 8 +- drivers/gpu/drm/i915/gt/intel_reset.c | 6 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 68 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +- drivers/gpu/drm/i915/gvt/cfg_space.c | 5 +- drivers/gpu/drm/i915/gvt/display.c | 107 +- drivers/gpu/drm/i915/gvt/display.h | 14 +- drivers/gpu/drm/i915/gvt/firmware.c | 10 +- drivers/gpu/drm/i915/gvt/gtt.c | 16 +- drivers/gpu/drm/i915/gvt/gvt.c | 31 +- drivers/gpu/drm/i915/gvt/gvt.h | 13 +- drivers/gpu/drm/i915/gvt/handlers.c | 261 +- drivers/gpu/drm/i915/gvt/interrupt.c | 37 - drivers/gpu/drm/i915/gvt/interrupt.h | 7 - drivers/gpu/drm/i915/gvt/kvmgt.c | 4 +- drivers/gpu/drm/i915/gvt/vgpu.c | 2 - drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 84 +- drivers/gpu/drm/i915/i915_drv.h | 130 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +- drivers/gpu/drm/i915/i915_getparam.c | 5 +- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/i915_irq.c | 106 +- drivers/gpu/drm/i915/i915_params.h | 4 +- drivers/gpu/drm/i915/i915_pci.c | 18 +- drivers/gpu/drm/i915/i915_perf.c | 97 +- drivers/gpu/drm/i915/i915_perf_types.h | 8 + drivers/gpu/drm/i915/i915_pmu.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 76 +- drivers/gpu/drm/i915/i915_suspend.c | 4 +- drivers/gpu/drm/i915/i915_switcheroo.c | 4 +- drivers/gpu/drm/i915/i915_vgpu.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 11 +- drivers/gpu/drm/i915/intel_device_info.h | 3 +- drivers/gpu/drm/i915/intel_dram.c | 6 + drivers/gpu/drm/i915/intel_pch.c | 11 +- drivers/gpu/drm/i915/intel_pch.h | 3 + drivers/gpu/drm/i915/intel_pm.c | 422 ++-- drivers/gpu/drm/i915/intel_pm.h | 5 + drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- drivers/gpu/drm/i915/intel_uncore.c | 20 +- drivers/gpu/drm/i915/selftests/mock_gtt.c | 2 +- include/drm/drm_dp_helper.h | 5 + include/drm/i915_pciids.h | 11 + 107 files changed, 8885 insertions(+), 7172 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c create mode 100644 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h create mode 100644 drivers/gpu/drm/i915/display/skl_scaler.c create mode 100644 drivers/gpu/drm/i915/display/skl_scaler.h create mode 100644 drivers/gpu/drm/i915/display/skl_universal_plane.c create mode 100644 drivers/gpu/drm/i915/display/skl_universal_plane.h -- Jani Nikula, Intel Open Source Graphics Center

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[PATCH 0/6] Default request/fence expiry + watchdog
by Tvrtko Ursulin 16 Mar '21

16 Mar '21

From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> "Watchdog" aka "restoring hangcheck" aka default request/fence expiry - second post of a somewhat controversial feature, now upgraded to patch status. I quote the "watchdog" becuase in classical sense watchdog would allow userspace to ping it and so remain alive. I quote "restoring hangcheck" because this series, contrary to the old hangcheck, is not looking at whether the workload is making any progress from the kernel side either. (Although disclaimer my memory may be leaky - Daniel suspects old hangcheck had some stricter, more indiscriminatory, angles to it. But apart from being prone to both false negatives and false positives I can't remember that myself.) Short version - ask is to fail any user submissions after a set time period. In this RFC that time is twelve seconds. Time counts from the moment user submission is "runnable" (implicit and explicit dependencies have been cleared) and keeps counting regardless of the GPU contetion caused by other users of the system. So semantics are really a bit weak, but again, I understand this is really really wanted by the DRM core even if I am not convinced it is a good idea. There are two dangers with doing this, text borrowed from a patch in the series: This can have an effect that workloads which used to work fine will suddenly start failing. Another interaction is with hangcheck where care needs to be taken timeout is not set lower or close to three times the heartbeat interval. Otherwise a hang in any application can cause complete termination of all submissions from unrelated clients. Any users modifying the per engine heartbeat intervals therefore need to be aware of this potential denial of service to avoid inadvertently enabling it. v2: * Dropped context param. * Improved commit messages and Kconfig text. Test-with: 20210316161840.1993818-1-tvrtko.ursulin(a)linux.intel.com Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Chris Wilson (1): drm/i915: Individual request cancellation Tvrtko Ursulin (5): drm/i915: Restrict sentinel requests further drm/i915: Handle async cancellation in sentinel assert drm/i915: Request watchdog infrastructure drm/i915: Fail too long user submissions by default drm/i915: Allow configuring default request expiry via modparam drivers/gpu/drm/i915/Kconfig.profile | 14 ++ drivers/gpu/drm/i915/gem/i915_gem_context.c | 39 ++++ .../gpu/drm/i915/gem/i915_gem_context_types.h | 4 + drivers/gpu/drm/i915/gt/intel_context_param.h | 11 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 4 + .../gpu/drm/i915/gt/intel_engine_heartbeat.c | 1 + .../drm/i915/gt/intel_execlists_submission.c | 16 +- .../drm/i915/gt/intel_execlists_submission.h | 2 + drivers/gpu/drm/i915/gt/intel_gt.c | 3 + drivers/gpu/drm/i915/gt/intel_gt.h | 2 + drivers/gpu/drm/i915/gt/intel_gt_requests.c | 21 ++ drivers/gpu/drm/i915/gt/intel_gt_types.h | 7 + drivers/gpu/drm/i915/i915_params.c | 5 + drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/i915_request.c | 108 +++++++++- drivers/gpu/drm/i915/i915_request.h | 12 +- drivers/gpu/drm/i915/selftests/i915_request.c | 201 ++++++++++++++++++ 17 files changed, 442 insertions(+), 9 deletions(-) -- 2.27.0

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Re: [PATCH 2/3] media/videobuf1|2: Mark follow_pfn usage as unsafe
by Daniel Vetter 16 Mar '21

16 Mar '21

On Tue, Mar 16, 2021 at 4:46 PM Christoph Hellwig <hch(a)infradead.org> wrote: > > On Tue, Mar 16, 2021 at 04:33:02PM +0100, Daniel Vetter wrote: > > The media model assumes that buffers are all preallocated, so that > > when a media pipeline is running we never miss a deadline because the > > buffers aren't allocated or available. > > > > This means we cannot fix the v4l follow_pfn usage through > > mmu_notifier, without breaking how this all works. The only real fix > > is to deprecate userptr support for VM_IO | VM_PFNMAP mappings and > > tell everyone to cut over to dma-buf memory sharing for zerocopy. > > > > userptr for normal memory will keep working as-is, this only affects > > the zerocopy userptr usage enabled in 50ac952d2263 ("[media] > > videobuf2-dma-sg: Support io userptr operations on io memory"). > > Maybe I'm missing something, but wasn't the conclusion last time that > this hackish early device to device copy support can just go away? My understanding is mostly, but with some objections. And I kinda don't want to let this die in a bikeshed and then not getting rid of follow_pfn as a result. There's enough people who acked this, and the full removal got some nack from Mauro iirc. Maybe if no bug report ever shows up for 1-2 years we can sunset it for real&completely. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch

1 0

[PATCH] drm/omap: dsi: fix unsigned expression compared with zero
by angkery 16 Mar '21

16 Mar '21

From: Junlin Yang <yangjunlin(a)yulong.com> r is "u32" always >= 0,mipi_dsi_create_packet may return little than zero. so r < 0 condition is never accessible. Fixes coccicheck warnings: ./drivers/gpu/drm/omapdrm/dss/dsi.c:2155:5-6: WARNING: Unsigned expression compared with zero: r < 0 Signed-off-by: Junlin Yang <yangjunlin(a)yulong.com> --- drivers/gpu/drm/omapdrm/dss/dsi.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 8e11612..b31d750 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -2149,11 +2149,12 @@ static int dsi_vc_send_short(struct dsi_data *dsi, int vc, const struct mipi_dsi_msg *msg) { struct mipi_dsi_packet pkt; + int ret; u32 r; - r = mipi_dsi_create_packet(&pkt, msg); - if (r < 0) - return r; + ret = mipi_dsi_create_packet(&pkt, msg); + if (ret < 0) + return ret; WARN_ON(!dsi_bus_is_locked(dsi)); -- 1.9.1

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dri-devel March 2021