dri-devel March 2022

dri-devel@lists.freedesktop.org

370 participants
780 discussions

[PATCH 1/1] drm/amdkfd: Protect the Client whilst it is being operated on
by Lee Jones 23 Mar '22

23 Mar '22

Presently the Client can be freed whilst still in use. Use the already provided lock to prevent this. Cc: Felix Kuehling <Felix.Kuehling(a)amd.com> Cc: Alex Deucher <alexander.deucher(a)amd.com> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan(a)amd.com> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: amd-gfx(a)lists.freedesktop.org Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c index e4beebb1c80a2..3b9ac1e87231f 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c @@ -145,8 +145,11 @@ static int kfd_smi_ev_release(struct inode *inode, struct file *filep) spin_unlock(&dev->smi_lock); synchronize_rcu(); + + spin_lock(&client->lock); kfifo_free(&client->fifo); kfree(client); + spin_unlock(&client->lock); return 0; } @@ -247,11 +250,13 @@ int kfd_smi_event_open(struct kfd_dev *dev, uint32_t *fd) return ret; } + spin_lock(&client->lock); ret = anon_inode_getfd(kfd_smi_name, &kfd_smi_ev_fops, (void *)client, O_RDWR); if (ret < 0) { kfifo_free(&client->fifo); kfree(client); + spin_unlock(&client->lock); return ret; } *fd = ret; @@ -264,6 +269,7 @@ int kfd_smi_event_open(struct kfd_dev *dev, uint32_t *fd) spin_lock(&dev->smi_lock); list_add_rcu(&client->list, &dev->smi_clients); spin_unlock(&dev->smi_lock); + spin_unlock(&client->lock); return 0; } -- 2.35.1.894.gb6a874cedc-goog

3 9

[RFC 00/19] drm/edid: overhaul CEA data block iteration
by Jani Nikula 23 Mar '22

23 Mar '22

Add iterators for EDID blocks and CEA data blocks, to iterate through all data blocks across all CEA extensions and CTA blocks in DisplayID data blocks. Fix all code assuming only one CEA extension. Fix code assuming CTA blocks contain everything that CEA extensions do. Sprinkle a bunch of cleanups on top. This is completely UNTESTED, didn't even smoke test it. It builds. ;) This superseeds parts of [1] and [2]. BR, Jani. [1] https://patchwork.freedesktop.org/series/101241/ [2] https://patchwork.freedesktop.org/patch/msgid/20220321044330.27723-1-cooper… Cc: Shawn C Lee <shawn.c.lee(a)intel.com> Cc: Cooper Chiou <cooper.chiou(a)intel.com> Cc: william.tseng(a)intel.com Cc: ankit.k.nautiyal(a)intel.com Cc: ville.syrjala(a)linux.intel.com Cc: Drew Davenport <ddavenport(a)chromium.org> Jani Nikula (19): drm/edid: add drm_edid_extension_block_count() and drm_edid_size() drm: use drm_edid_extension_block_count() and drm_edid_size() drm/edid: clean up CEA data block tag definitions drm/edid: add iterator for EDID base and extension blocks drm/edid: add iterator for CEA data blocks drm/edid: clean up cea_db_is_*() functions drm/edid: convert add_cea_modes() to use cea db iter drm/edid: convert drm_edid_to_speaker_allocation() to use cea db iter drm/edid: convert drm_edid_to_sad() to use cea db iter drm/edid: convert drm_detect_hdmi_monitor() to use cea db iter drm/edid: convert drm_detect_monitor_audio() to use cea db iter drm/edid: convert drm_parse_cea_ext() to use cea db iter drm/edid: convert drm_edid_to_eld() to use cea db iter drm/edid: sunset the old unused cea data block iterators drm/edid: restore some type safety to cea_db_*() functions drm/edid: detect basic audio only on CEA extension drm/edid: detect color formats and CEA revision only on CEA extension drm/edid: skip CEA extension scan in drm_edid_to_eld() just for CEA rev drm/edid: sunset drm_find_cea_extension() drivers/gpu/drm/drm_connector.c | 2 +- drivers/gpu/drm/drm_debugfs.c | 3 +- drivers/gpu/drm/drm_edid.c | 781 ++++++++++++++++++-------------- include/drm/drm_edid.h | 2 + 4 files changed, 455 insertions(+), 333 deletions(-) -- 2.30.2

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[v8 0/5] enhanced edid driver compatibility
by Lee Shawn C 23 Mar '22

23 Mar '22

Support to parse multiple CEA extension blocks and HF-EEODB to extend drm edid driver's capability. v4: add one more patch to support HF-SCDB v5: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. v6: save proper extension block index if CTA data information was found in DispalyID block. v7: using different parameters to store CEA and DisplayID block index. configure DisplayID extansion block index before search available DisplayID block. v8: revert patch [v7 2/5] change. And check cea pointer return from drm_find_cea_extension(). If drvier got the same cea pointer then exit this routine. Lee Shawn C (5): drm/edid: seek for available CEA block from specific EDID block index drm/edid: parse multiple CEA extension block drm/edid: read HF-EEODB ext block drm/edid: parse HF-EEODB CEA extension block drm/edid: check for HF-SCDB block drivers/gpu/drm/drm_connector.c | 8 +- drivers/gpu/drm/drm_displayid.c | 5 +- drivers/gpu/drm/drm_edid.c | 174 ++++++++++++++++++++++++-------- include/drm/drm_edid.h | 4 +- 4 files changed, 144 insertions(+), 47 deletions(-) -- 2.17.1

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[RESEND PATCH] dt-bindings: display/msm: add missing brace in dpu-qcm2290.yaml
by Dmitry Baryshkov 23 Mar '22

23 Mar '22

Add missing brace in dpu-qcm2290.yaml. While we are at it, also fix indentation for another brace, so it matches the corresponding line. Reported-by: Rob Herring <robh(a)kernel.org> Cc: Loic Poulain <loic.poulain(a)linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- Didn't include freedreno@ in the first email, so resending. --- Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 8766b13f0c46..b1b4652077db 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -209,6 +209,7 @@ examples: remote-endpoint = <&dsi0_in>; }; }; - }; + }; }; + }; ... -- 2.34.1

5 6

[PATCH v3, 0/3] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml
by xinlei.lee＠mediatek.com 23 Mar '22

23 Mar '22

From: Xinlei Lee <xinlei.lee(a)mediatek.com> Changes since v2: 1. Added #address-cells, #size-cells two properties. 2. Fix some formatting issues. Changes since v1: 1. Delete the mediatek,dsi.txt & Add the mediatek,dsi.yaml. 2. Ignore the Move the getting bridge node function patch for V1. Xinlei Lee (3): dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c .../display/mediatek/mediatek,dsi.txt | 62 ------------ .../display/mediatek/mediatek,dsi.yaml | 97 +++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++ 3 files changed, 105 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml -- 2.18.0

2 6

[PATCH v3 00/13] drm/msm: Add Display Stream Compression Support
by Vinod Koul 23 Mar '22

23 Mar '22

Display Stream Compression (DSC) compresses the display stream in host which is later decoded by panel. This series enables this for Qualcomm msm driver. This was tested on Google Pixel3 phone which use LGE SW43408 panel. The changes include DSC data and hardware block enabling for DPU1 then support in encoder. We also add support in DSI and introduce required topology changes. In order for panel to set the DSC parameters we add dsc in drm_panel and set it from the msm driver. We still have dsc as a globabl entity. I think while doing DP + DSC we should be able to update it, right now comprehending the requirements are bit difficult. Complete changes which enable this for Pixel3 along with panel driver (not part of this series) and DT changes can be found at: git.linaro.org/people/vinod.koul/kernel.git pixel/dsc_v3 Comments welcome! Changes since v2: - Fix comments by Dimitry except the dsc being global. - Move RM patch later for dependency on topology now - Add patch for mode valid callback for dsi_mgr - Add missing structure documentation patch - Fix errors in mode_3d changes - Rebase on v5.16-rc1 and test Changes since v1: - Fix various issues spotted by kbuildbot - Rebase to v5.15-rc3 - Remove unused fields and duplicate defines - Enable DSC blocks only when DSC is enabled - remove sdm845 feature mask, use 0 - Check for DSC in hw_ctl Changes since RFC: - Drop the DT binding patch as we derive the configuration from panel - Drop the drm api patch as we no longer need it (use pps drm api) - Fix comments raised by Dimitry - Add dsc parameters calculation from downstream Vinod Koul (13): drm/msm/dsi: add support for dsc data drm/msm/disp/dpu1: Add support for DSC drm/msm/disp/dpu1: Add support for DSC in pingpong block drm/msm/disp/dpu1: Add DSC for SDM845 to hw_catalog drm/msm/disp/dpu1: Don't use DSC with mode_3d drm/msm/disp/dpu1: Add DSC support in hw_ctl drm/msm/disp/dpu1: Add support for DSC in encoder drm/msm: Add missing structure documentation drm/msm/disp/dpu1: Add support for DSC in topology drm/msm/disp/dpu1: Add DSC support in RM drm/msm/dsi: add mode valid callback for dsi_mgr drm/msm/dsi: Add support for DSC configuration drm/msm/dsi: Pass DSC params to drm_panel drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 158 +++++++++- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 11 + .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 + .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 ++ .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 210 +++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 77 +++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 13 + .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 ++ .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 66 ++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 + drivers/gpu/drm/msm/dsi/dsi.h | 2 + drivers/gpu/drm/msm/dsi/dsi.xml.h | 10 + drivers/gpu/drm/msm/dsi/dsi_host.c | 285 +++++++++++++++++- drivers/gpu/drm/msm/dsi/dsi_manager.c | 12 + drivers/gpu/drm/msm/msm_drv.h | 23 ++ include/drm/drm_panel.h | 7 + 22 files changed, 970 insertions(+), 4 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h -- 2.31.1

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[RFC v3 0/8] Proposal for a GPU cgroup controller
by T.J. Mercier 23 Mar '22

23 Mar '22

This patch series revisits the proposal for a GPU cgroup controller to track and limit memory allocations by various device/allocator subsystems. The patch series also contains a simple prototype to illustrate how Android intends to implement DMA-BUF allocator attribution using the GPU cgroup controller. The prototype does not include resource limit enforcements. Changelog: v3: Remove Upstreaming Plan from gpu-cgroup.rst per John Stultz Use more common dual author commit message format per John Stultz Remove android from binder changes title per Todd Kjos Add a kselftest for this new behavior per Greg Kroah-Hartman Include details on behavior for all combinations of kernel/userspace versions in changelog (thanks Suren Baghdasaryan) per Greg Kroah-Hartman. Fix pid and uid types in binder UAPI header v2: See the previous revision of this change submitted by Hridya Valsaraju at: https://lore.kernel.org/all/20220115010622.3185921-1-hridya@google.com/ Move dma-buf cgroup charge transfer from a dma_buf_op defined by every heap to a single dma-buf function for all heaps per Daniel Vetter and Christian König. Pointers to struct gpucg and struct gpucg_device tracking the current associations were added to the dma_buf struct to achieve this. Fix incorrect Kconfig help section indentation per Randy Dunlap. History of the GPU cgroup controller ==================================== The GPU/DRM cgroup controller came into being when a consensus[1] was reached that the resources it tracked were unsuitable to be integrated into memcg. Originally, the proposed controller was specific to the DRM subsystem and was intended to track GEM buffers and GPU-specific resources[2]. In order to help establish a unified memory accounting model for all GPU and all related subsystems, Daniel Vetter put forth a suggestion to move it out of the DRM subsystem so that it can be used by other DMA-BUF exporters as well[3]. This RFC proposes an interface that does the same. [1]: https://patchwork.kernel.org/project/dri-devel/cover/20190501140438.9506-1-… [2]: https://lore.kernel.org/amd-gfx/20210126214626.16260-1-brian.welty@intel.co… [3]: https://lore.kernel.org/amd-gfx/YCVOl8%2F87bqRSQei@phenom.ffwll.local/ Hridya Valsaraju (5): gpu: rfc: Proposal for a GPU cgroup controller cgroup: gpu: Add a cgroup controller for allocator attribution of GPU memory dmabuf: heaps: export system_heap buffers with GPU cgroup charging dmabuf: Add gpu cgroup charge transfer function binder: Add a buffer flag to relinquish ownership of fds T.J. Mercier (3): dmabuf: Use the GPU cgroup charge/uncharge APIs binder: use __kernel_pid_t and __kernel_uid_t for userspace selftests: Add binder cgroup gpu memory transfer test Documentation/gpu/rfc/gpu-cgroup.rst | 183 +++++++ Documentation/gpu/rfc/index.rst | 4 + drivers/android/binder.c | 26 + drivers/dma-buf/dma-buf.c | 100 ++++ drivers/dma-buf/dma-heap.c | 27 + drivers/dma-buf/heaps/system_heap.c | 3 + include/linux/cgroup_gpu.h | 127 +++++ include/linux/cgroup_subsys.h | 4 + include/linux/dma-buf.h | 22 +- include/linux/dma-heap.h | 11 + include/uapi/linux/android/binder.h | 5 +- init/Kconfig | 7 + kernel/cgroup/Makefile | 1 + kernel/cgroup/gpu.c | 304 +++++++++++ .../selftests/drivers/android/binder/Makefile | 8 + .../drivers/android/binder/binder_util.c | 254 +++++++++ .../drivers/android/binder/binder_util.h | 32 ++ .../selftests/drivers/android/binder/config | 4 + .../binder/test_dmabuf_cgroup_transfer.c | 480 ++++++++++++++++++ 19 files changed, 1598 insertions(+), 4 deletions(-) create mode 100644 Documentation/gpu/rfc/gpu-cgroup.rst create mode 100644 include/linux/cgroup_gpu.h create mode 100644 kernel/cgroup/gpu.c create mode 100644 tools/testing/selftests/drivers/android/binder/Makefile create mode 100644 tools/testing/selftests/drivers/android/binder/binder_util.c create mode 100644 tools/testing/selftests/drivers/android/binder/binder_util.h create mode 100644 tools/testing/selftests/drivers/android/binder/config create mode 100644 tools/testing/selftests/drivers/android/binder/test_dmabuf_cgroup_transfer.c -- 2.35.1.616.g0bdcbb4464-goog

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[v2] drm/edid: check basic audio support on CEA extension block
by Lee Shawn C 23 Mar '22

23 Mar '22

From: Cooper Chiou <cooper.chiou(a)intel.com> Tag code stored in bit7:5 for CTA block byte[3] is not the same as CEA extension block definition. Only check CEA block has basic audio support. Cc: Jani Nikula <jani.nikula(a)intel.com> Cc: Shawn C Lee <shawn.c.lee(a)intel.com> Cc: intel-gfx <intel-gfx(a)lists.freedesktop.org> Signed-off-by: Cooper Chiou <cooper.chiou(a)intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee(a)intel.com> --- drivers/gpu/drm/drm_edid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 561f53831e29..f07af6786cec 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -4859,7 +4859,8 @@ bool drm_detect_monitor_audio(struct edid *edid) if (!edid_ext) goto end; - has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); + has_audio = (edid_ext[0] == CEA_EXT && + (edid_ext[3] & EDID_BASIC_AUDIO) != 0); if (has_audio) { DRM_DEBUG_KMS("Monitor has basic audio support\n"); -- 2.17.1

2 1

[PATCH v4 0/3] Improve on resume time with VT-d enabled
by Thomas Hellström 23 Mar '22

23 Mar '22

When DMAR / VT-d is enabled, the display engine uses overfetching, presumably to deal with the increased latency. To avoid display engine errors and DMAR faults, as a workaround the GGTT is populated with scatch PTEs when VT-d is enabled. However starting with gen10, Write-combined writing of scratch PTES is no longer possible and as a result, populating the full GGTT with scratch PTEs like on resume becomes very slow as uncached access is needed. Therefore, replace filling the GGTT entirely with scratch pages with only filling surrounding scanout vma with guard pages. This eliminates the 100+ms delay in resume where we have to repopulate the GGTT with scratch. While 100+ms might appear like a short time it's 10% to 20% of total resume time and important in some applications. Additional considerations: Since GPUs where VT-d might be present should have at least 2GiB worth of GGTT space, the extra guard pages should not really have a significant impact on GGTT contention. Neither should there be a problem with not populating GGTT with scratch PTEs on unbind since that's typically not done when VT-d is not enabled either. Finally, discrete GPUs should ideally not overfetch even with VT-d enabled, but removing the workaround for discrete GPUs needs thorough testing and will be done, if needed, as a follow up. Patch 1 introduces accessors for vma.node.start and vma.node.size. While this patch is the most invasive, the end result is actually something we might want event without the introduced guard pages. Patch 2 introduces the concept of guard pages to i915_vma and wraps the needed arithmetic in the accessors. Patch 3 uses the guard pages to replace the old VT-d workaround. v4: Completely rebase on drm-tip: - Avoid vmas in the binding backends - Make sure vma PIN flags don't clash - Add some kernedoc and rewrite cover-letter. Chris Wilson (3): drm/i915: Wrap all access to i915_vma.node.start|size drm/i915: Introduce guard pages to i915_vma drm/i915: Refine VT-d scanout workaround drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 13 ++++ .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 33 ++++++----- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 4 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 2 +- .../i915/gem/selftests/i915_gem_client_blt.c | 15 ++--- .../drm/i915/gem/selftests/i915_gem_context.c | 15 +++-- .../drm/i915/gem/selftests/i915_gem_mman.c | 2 +- .../drm/i915/gem/selftests/igt_gem_utils.c | 7 ++- drivers/gpu/drm/i915/gt/gen7_renderclear.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 39 ++++-------- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 +- drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 +- .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 8 +-- drivers/gpu/drm/i915/gt/selftest_execlists.c | 18 +++--- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 15 ++--- drivers/gpu/drm/i915/gt/selftest_lrc.c | 16 ++--- .../drm/i915/gt/selftest_ring_submission.c | 2 +- drivers/gpu/drm/i915/gt/selftest_rps.c | 12 ++-- .../gpu/drm/i915/gt/selftest_workarounds.c | 8 +-- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +- drivers/gpu/drm/i915/i915_perf.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 59 +++++++++++++------ drivers/gpu/drm/i915/i915_vma.h | 52 +++++++++++++++- drivers/gpu/drm/i915/i915_vma_resource.c | 4 +- drivers/gpu/drm/i915/i915_vma_resource.h | 17 ++++-- drivers/gpu/drm/i915/i915_vma_types.h | 3 +- drivers/gpu/drm/i915/selftests/i915_request.c | 20 +++---- drivers/gpu/drm/i915/selftests/igt_spinner.c | 8 +-- 34 files changed, 242 insertions(+), 156 deletions(-) -- 2.34.1

1 3

[PATCH V9 0/5] add display support for MediaTek SoC MT8186
by Rex-BC Chen 23 Mar '22

23 Mar '22

v9: 1. Revise [1/5] dt-bindings: display: mediatek: add aal binding for MT8183. v8: 1. Revise [1/5] dt-bindings: display: mediatek: add aal binding for MT8183. v7: 1. Rebase to chunkuang.hu/linux.git mediatek-drm-fixes v6: 1. Remove mmsys patches which are accepted. 2. Fix error of dt-binding. v5: 1. Add binding patch of aal for MT8183. 2. Revise enum to const. 3. Change to use enum for mutex. 4. Remove patches which are accepted by maintainers. (mmsys and mutex) v4: 1. Remove binding of dsi and dpi. 2. Revise aal binding. 3. Fix indention in [4/5]. v3: 1. Modify display binding based on mtk display binding patch. ([1]) 2. Remove patch: drm/mediatek: separate postmask component from mtk_disp_drv.c 3. Remove compatible of 8186 ovl because we can re-use compatible of 8192 for 8186. 4. Fix issue of space before tab on mutex patch. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/comm… v2: 1. Add binding documentation for mmsys, mutex and mtk_display. 2. Remove duplicated definition of postmask registers on mtk_drm_drv. 3. Add disp_ovl support for MT8186. 4. Add detailed commit messages. Rex-BC Chen (4): dt-bindings: display: mediatek: add aal binding for MT8183 dt-bindings: display: mediatek: revise enum to const dt-bindings: display: mediatek: change to use enum for mutex dt-bindings: display: mediatek: add MT8186 SoC binding Yongqiang Niu (1): drm/mediatek: add display support for MT8186 .../display/mediatek/mediatek,aal.yaml | 10 ++++-- .../display/mediatek/mediatek,ccorr.yaml | 5 ++- .../display/mediatek/mediatek,color.yaml | 7 ++-- .../display/mediatek/mediatek,dither.yaml | 4 +-- .../display/mediatek/mediatek,gamma.yaml | 4 +-- .../display/mediatek/mediatek,mutex.yaml | 25 ++++++-------- .../display/mediatek/mediatek,ovl-2l.yaml | 4 +++ .../display/mediatek/mediatek,ovl.yaml | 8 +++-- .../display/mediatek/mediatek,postmask.yaml | 4 +++ .../display/mediatek/mediatek,rdma.yaml | 7 ++-- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 33 +++++++++++++++++++ 11 files changed, 77 insertions(+), 34 deletions(-) -- 2.18.0

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dri-devel March 2022