dri-devel March 2022

dri-devel@lists.freedesktop.org

370 participants
780 discussions

RE: [RFC PATCH v2 4/5] drm/msm/dp: replace dp_connector with drm_bridge_connector
by Sankeerth Billakanti (QUIC) 14 Apr '22

14 Apr '22

> Subject: Re: [RFC PATCH v2 4/5] drm/msm/dp: replace dp_connector with > drm_bridge_connector > Date: Wed, 23 Feb 2022 16:40:56 -0800 > From: Kuogee Hsieh <quic_khsieh(a)quicinc.com> > To: Stephen Boyd <swboyd(a)chromium.org>, Dmitry Baryshkov > <dmitry.baryshkov(a)linaro.org> > CC: Abhinav Kumar <quic_abhinavk(a)quicinc.com>, Bjorn Andersson > <bjorn.andersson(a)linaro.org>, Rob Clark <robdclark(a)gmail.com>, Sean Paul > <sean(a)poorly.run>, David Airlie <airlied(a)linux.ie>, Daniel Vetter > <daniel(a)ffwll.ch>, linux-arm-msm(a)vger.kernel.org, dri- > devel(a)lists.freedesktop.org, freedreno(a)lists.freedesktop.org > > > On 2/23/2022 1:33 PM, Stephen Boyd wrote: > > Quoting Kuogee Hsieh (2022-02-23 10:27:26) > >> On 2/23/2022 10:22 AM, Dmitry Baryshkov wrote: > >>> On 23/02/2022 20:21, Kuogee Hsieh wrote: > >>> > >>> In the panel device node. > >>> > >>> Can you please share it too? > >> > >> &soc { > >> edp_power_supply: edp_power { > >> compatible = "regulator-fixed"; > >> regulator-name = "edp_backlight_power"; > >> > >> regulator-always-on; > >> regulator-boot-on; > >> }; > >> > >> edp_backlight: edp_backlight { > >> compatible = "pwm-backlight"; > >> > >> pwms = <&pm8350c_pwm 3 65535>; > >> power-supply = <&edp_power_supply>; > >> enable-gpio = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; > >> > >> pinctrl-names = "default"; > >> pinctrl-0 = <&backlight_pwm_default>; > >> }; > >> > >> edp_panel: edp_panel { > >> compatible = "sharp_lq140m1jw46"; > > Is that supposed to be sharp,lq140m1jw46 with a comma instead of an > > underscore? > > Stephen, > > This is our internal branch which does not have patches up to date yet. > > I will cherry-pick newer edp related patches which are under review now to > re test it. Tested-by: Sankeerth Billakanti <quic_sbillaka(a)quicinc.com> Detect returned eDP not connected because the panel power was not on and mode_valid was failing because the DP mode_valid is different from eDP

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RE: [RFC PATCH v2 5/5] drm/msm/dp: remove extra wrappers and public functions
by Sankeerth Billakanti (QUIC) 14 Apr '22

14 Apr '22

> Subject: [RFC PATCH v2 5/5] drm/msm/dp: remove extra wrappers and > public functions > Date: Sat, 12 Feb 2022 01:40:06 +0300 > From: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> > To: Bjorn Andersson <bjorn.andersson(a)linaro.org>, Rob Clark > <robdclark(a)gmail.com>, Sean Paul <sean(a)poorly.run>, Abhinav Kumar > <quic_abhinavk(a)quicinc.com>, Kuogee Hsieh <quic_khsieh(a)quicinc.com> > CC: Stephen Boyd <swboyd(a)chromium.org>, David Airlie <airlied(a)linux.ie>, > Daniel Vetter <daniel(a)ffwll.ch>, linux-arm-msm(a)vger.kernel.org, dri- > devel(a)lists.freedesktop.org, freedreno(a)lists.freedesktop.org > > dp_bridge's functions are thin wrappers around the msm_dp_display_* > family. Squash dp_bridge callbacks into respective msm_dp_display > functions, removing the latter functions from public space. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> Tested-by: Sankeerth Billakanti <quic_sbillaka(a)quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_display.c | 54 +++++++++++++++------- > drivers/gpu/drm/msm/dp/dp_display.h | 1 - > drivers/gpu/drm/msm/dp/dp_drm.c | 72 ++--------------------------- > drivers/gpu/drm/msm/dp/dp_drm.h | 22 ++++++++- > drivers/gpu/drm/msm/msm_drv.h | 31 ------------- > 5 files changed, 60 insertions(+), 120 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c > b/drivers/gpu/drm/msm/dp/dp_display.c > index 59e5e5b8e5b4..a9b641a68bff 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -10,7 +10,6 @@ > #include <linux/component.h> > #include <linux/of_irq.h> > #include <linux/delay.h> > -#include <drm/drm_panel.h> > #include "msm_drv.h" > #include "msm_kms.h" > @@ -945,18 +944,36 @@ int dp_display_set_plugged_cb(struct msm_dp > *dp_display, > return 0; > } > -int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz) > +/** > + * dp_bridge_mode_valid - callback to determine if specified mode is > +valid > + * @bridge: Pointer to drm bridge structure > + * @info: display info > + * @mode: Pointer to drm mode structure > + * Returns: Validity status for specified mode */ enum drm_mode_status > +dp_bridge_mode_valid(struct drm_bridge *bridge, > + const struct drm_display_info *info, > + const struct drm_display_mode > *mode) > { > const u32 num_components = 3, default_bpp = 24; > struct dp_display_private *dp_display; > struct dp_link_info *link_info; > u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0; > + struct msm_dp *dp; > + int mode_pclk_khz = mode->clock; > + > + dp = to_dp_bridge(bridge)->dp_display; > if (!dp || !mode_pclk_khz || !dp->connector) { > DRM_ERROR("invalid params\n"); > return -EINVAL; > } > + if ((dp->max_pclk_khz <= 0) || > + (dp->max_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) || > + (mode->clock > dp->max_pclk_khz)) > + return MODE_BAD; > + > dp_display = container_of(dp, struct dp_display_private, > dp_display); > link_info = &dp_display->panel->link_info; > @@ -1501,7 +1518,7 @@ int msm_dp_modeset_init(struct msm_dp > *dp_display, struct drm_device *dev, > dp_display->encoder = encoder; > - dp_display->bridge = msm_dp_bridge_init(dp_display, dev, > encoder); > + dp_display->bridge = dp_bridge_init(dp_display, dev, encoder); > if (IS_ERR(dp_display->bridge)) { > ret = PTR_ERR(dp_display->bridge); > DRM_DEV_ERROR(dev->dev, > @@ -1528,8 +1545,10 @@ int msm_dp_modeset_init(struct msm_dp > *dp_display, struct drm_device *dev, > return 0; > } > -int msm_dp_display_enable(struct msm_dp *dp, struct drm_encoder > *encoder) > +void dp_bridge_enable(struct drm_bridge *drm_bridge) > { > + struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); > + struct msm_dp *dp = dp_bridge->dp_display; > int rc = 0; > struct dp_display_private *dp_display; > u32 state; > @@ -1537,7 +1556,7 @@ int msm_dp_display_enable(struct msm_dp *dp, > struct drm_encoder *encoder) > dp_display = container_of(dp, struct dp_display_private, > dp_display); > if (!dp_display->dp_mode.drm_mode.clock) { > DRM_ERROR("invalid params\n"); > - return -EINVAL; > + return; > } > mutex_lock(&dp_display->event_mutex); > @@ -1549,14 +1568,14 @@ int msm_dp_display_enable(struct msm_dp *dp, > struct drm_encoder *encoder) > if (rc) { > DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc); > mutex_unlock(&dp_display->event_mutex); > - return rc; > + return; > } > rc = dp_display_prepare(dp); > if (rc) { > DRM_ERROR("DP display prepare failed, rc=%d\n", rc); > mutex_unlock(&dp_display->event_mutex); > - return rc; > + return; > } > state = dp_display->hpd_state; > @@ -1581,23 +1600,23 @@ int msm_dp_display_enable(struct msm_dp *dp, > struct drm_encoder *encoder) > dp_display->hpd_state = ST_CONNECTED; > mutex_unlock(&dp_display->event_mutex); > - > - return rc; > } > -int msm_dp_display_pre_disable(struct msm_dp *dp, struct drm_encoder > *encoder) > +void dp_bridge_disable(struct drm_bridge *drm_bridge) > { > + struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); > + struct msm_dp *dp = dp_bridge->dp_display; > struct dp_display_private *dp_display; > dp_display = container_of(dp, struct dp_display_private, > dp_display); > dp_ctrl_push_idle(dp_display->ctrl); > - > - return 0; > } > -int msm_dp_display_disable(struct msm_dp *dp, struct drm_encoder > *encoder) > +void dp_bridge_post_disable(struct drm_bridge *drm_bridge) > { > + struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); > + struct msm_dp *dp = dp_bridge->dp_display; > int rc = 0; > u32 state; > struct dp_display_private *dp_display; @@ -1624,13 +1643,14 @@ > int msm_dp_display_disable(struct msm_dp *dp, struct drm_encoder > *encoder) > } > mutex_unlock(&dp_display->event_mutex); > - return rc; > } > -void msm_dp_display_mode_set(struct msm_dp *dp, struct drm_encoder > *encoder, > - const struct drm_display_mode *mode, > - const struct drm_display_mode > *adjusted_mode) > +void dp_bridge_mode_set(struct drm_bridge *drm_bridge, > + const struct drm_display_mode *mode, > + const struct drm_display_mode *adjusted_mode) > { > + struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); > + struct msm_dp *dp = dp_bridge->dp_display; > struct dp_display_private *dp_display; > dp_display = container_of(dp, struct dp_display_private, > dp_display); diff --git a/drivers/gpu/drm/msm/dp/dp_display.h > b/drivers/gpu/drm/msm/dp/dp_display.h > index 7af2b186d2d9..49a1d89681ac 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.h > +++ b/drivers/gpu/drm/msm/dp/dp_display.h > @@ -32,7 +32,6 @@ struct msm_dp { > int dp_display_set_plugged_cb(struct msm_dp *dp_display, > hdmi_codec_plugged_cb fn, struct device *codec_dev); -int > dp_display_validate_mode(struct msm_dp *dp_display, u32 > mode_pclk_khz); > int dp_display_get_modes(struct msm_dp *dp_display, > struct dp_display_mode *dp_mode); > int dp_display_request_irq(struct msm_dp *dp_display); diff --git > a/drivers/gpu/drm/msm/dp/dp_drm.c > b/drivers/gpu/drm/msm/dp/dp_drm.c index 57800b865fe6..7ce1aca48687 > 100644 > --- a/drivers/gpu/drm/msm/dp/dp_drm.c > +++ b/drivers/gpu/drm/msm/dp/dp_drm.c > @@ -13,14 +13,6 @@ > #include "msm_kms.h" > #include "dp_drm.h" > - > -struct msm_dp_bridge { > - struct drm_bridge bridge; > - struct msm_dp *dp_display; > -}; > - > -#define to_dp_display(x) container_of((x), struct msm_dp_bridge, > bridge) > - > /** > * dp_bridge_detect - callback to determine if connector is connected > * @bridge: Pointer to drm bridge structure @@ -30,7 +22,7 @@ static enum > drm_connector_status dp_bridge_detect(struct drm_bridge *bridge) > { > struct msm_dp *dp; > - dp = to_dp_display(bridge)->dp_display; > + dp = to_dp_bridge(bridge)->dp_display; > DRM_DEBUG_DP("is_connected = %s\n", > (dp->is_connected) ? "true" : "false"); @@ -55,7 +47,7 @@ > static int dp_bridge_get_modes(struct drm_bridge *bridge, struct > drm_connector * > if (!connector) > return 0; > - dp = to_dp_display(bridge)->dp_display; > + dp = to_dp_bridge(bridge)->dp_display; > dp_mode = kzalloc(sizeof(*dp_mode), GFP_KERNEL); > if (!dp_mode) > @@ -95,64 +87,6 @@ static int dp_bridge_get_modes(struct drm_bridge > *bridge, struct drm_connector * > return rc; > } > -/** > - * dp_bridge_mode_valid - callback to determine if specified mode is valid > - * @bridge: Pointer to drm bridge structure > - * @info: display info > - * @mode: Pointer to drm mode structure > - * Returns: Validity status for specified mode > - */ > -static enum drm_mode_status dp_bridge_mode_valid( > - struct drm_bridge *bridge, > - const struct drm_display_info *info, > - const struct drm_display_mode *mode) > -{ > - struct msm_dp *dp_disp; > - > - dp_disp = to_dp_display(bridge)->dp_display; > - > - if ((dp_disp->max_pclk_khz <= 0) || > - (dp_disp->max_pclk_khz > > DP_MAX_PIXEL_CLK_KHZ) || > - (mode->clock > dp_disp->max_pclk_khz)) > - return MODE_BAD; > - > - return dp_display_validate_mode(dp_disp, mode->clock); > -} > - > -static void dp_bridge_mode_set(struct drm_bridge *drm_bridge, > - const struct drm_display_mode *mode, > - const struct drm_display_mode > *adjusted_mode) > -{ > - struct msm_dp_bridge *dp_bridge = to_dp_display(drm_bridge); > - struct msm_dp *dp_display = dp_bridge->dp_display; > - > - msm_dp_display_mode_set(dp_display, drm_bridge->encoder, > mode, > adjusted_mode); > -} > - > -static void dp_bridge_enable(struct drm_bridge *drm_bridge) -{ > - struct msm_dp_bridge *dp_bridge = to_dp_display(drm_bridge); > - struct msm_dp *dp_display = dp_bridge->dp_display; > - > - msm_dp_display_enable(dp_display, drm_bridge->encoder); > -} > - > -static void dp_bridge_disable(struct drm_bridge *drm_bridge) -{ > - struct msm_dp_bridge *dp_bridge = to_dp_display(drm_bridge); > - struct msm_dp *dp_display = dp_bridge->dp_display; > - > - msm_dp_display_pre_disable(dp_display, drm_bridge->encoder); > -} > - > -static void dp_bridge_post_disable(struct drm_bridge *drm_bridge) -{ > - struct msm_dp_bridge *dp_bridge = to_dp_display(drm_bridge); > - struct msm_dp *dp_display = dp_bridge->dp_display; > - > - msm_dp_display_disable(dp_display, drm_bridge->encoder); > -} > - > static const struct drm_bridge_funcs dp_bridge_ops = { > .enable = dp_bridge_enable, > .disable = dp_bridge_disable, > @@ -163,7 +97,7 @@ static const struct drm_bridge_funcs dp_bridge_ops = > { > .detect = dp_bridge_detect, > }; > -struct drm_bridge *msm_dp_bridge_init(struct msm_dp *dp_display, > struct drm_device *dev, > +struct drm_bridge *dp_bridge_init(struct msm_dp *dp_display, struct > drm_device *dev, > struct drm_encoder *encoder) > { > int rc; > diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h > b/drivers/gpu/drm/msm/dp/dp_drm.h index c27bfceefdf0..f4b1ed1e24f7 > 100644 > --- a/drivers/gpu/drm/msm/dp/dp_drm.h > +++ b/drivers/gpu/drm/msm/dp/dp_drm.h > @@ -7,12 +7,30 @@ > #define _DP_DRM_H_ > #include <linux/types.h> > -#include <drm/drm_crtc.h> > -#include <drm/drm_crtc_helper.h> > +#include <drm/drm_bridge.h> > #include "msm_drv.h" > #include "dp_display.h" > +struct msm_dp_bridge { > + struct drm_bridge bridge; > + struct msm_dp *dp_display; > +}; > + > +#define to_dp_bridge(x) container_of((x), struct msm_dp_bridge, > bridge) > + > struct drm_connector *dp_drm_connector_init(struct msm_dp > *dp_display); > +struct drm_bridge *dp_bridge_init(struct msm_dp *dp_display, struct > drm_device *dev, > + struct drm_encoder *encoder); > + > +void dp_bridge_enable(struct drm_bridge *drm_bridge); void > +dp_bridge_disable(struct drm_bridge *drm_bridge); void > +dp_bridge_post_disable(struct drm_bridge *drm_bridge); enum > +drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, > + const struct drm_display_info *info, > + const struct drm_display_mode > *mode); void > +dp_bridge_mode_set(struct drm_bridge *drm_bridge, > + const struct drm_display_mode *mode, > + const struct drm_display_mode *adjusted_mode); > #endif /* _DP_DRM_H_ */ > diff --git a/drivers/gpu/drm/msm/msm_drv.h > b/drivers/gpu/drm/msm/msm_drv.h index d7574e6bd4e4..b698a3be6072 > 100644 > --- a/drivers/gpu/drm/msm/msm_drv.h > +++ b/drivers/gpu/drm/msm/msm_drv.h > @@ -385,16 +385,6 @@ int __init msm_dp_register(void); > void __exit msm_dp_unregister(void); > int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device > *dev, > struct drm_encoder *encoder); > -int msm_dp_display_enable(struct msm_dp *dp, struct drm_encoder > *encoder); -int msm_dp_display_disable(struct msm_dp *dp, struct > drm_encoder *encoder); -int msm_dp_display_pre_disable(struct msm_dp > *dp, struct drm_encoder *encoder); -void > msm_dp_display_mode_set(struct msm_dp *dp, struct drm_encoder > *encoder, > - const struct drm_display_mode *mode, > - const struct drm_display_mode > *adjusted_mode); > - > -struct drm_bridge *msm_dp_bridge_init(struct msm_dp *dp_display, > - struct drm_device *dev, > - struct drm_encoder *encoder); > void msm_dp_irq_postinstall(struct msm_dp *dp_display); > void msm_dp_snapshot(struct msm_disp_state *disp_state, struct > msm_dp *dp_display); > @@ -414,27 +404,6 @@ static inline int msm_dp_modeset_init(struct > msm_dp *dp_display, > { > return -EINVAL; > } > -static inline int msm_dp_display_enable(struct msm_dp *dp, > - struct drm_encoder *encoder) > -{ > - return -EINVAL; > -} > -static inline int msm_dp_display_disable(struct msm_dp *dp, > - struct drm_encoder *encoder) > -{ > - return -EINVAL; > -} > -static inline int msm_dp_display_pre_disable(struct msm_dp *dp, > - struct drm_encoder *encoder) > -{ > - return -EINVAL; > -} > -static inline void msm_dp_display_mode_set(struct msm_dp *dp, > - struct drm_encoder *encoder, > - const struct drm_display_mode *mode, > - const struct drm_display_mode > *adjusted_mode) > -{ > -} > static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display) > { > -- > 2.34.1

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[PATCH v5 1/2] dt-bindings: Add DT schema for Arm Mali Valhall GPU
by Nick Fan 14 Apr '22

14 Apr '22

Add devicetree schema for Arm Mali Valhall GPU Define a compatible string for the Mali Valhall GPU for Mediatek's SoC platform. Signed-off-by: Nick Fan <Nick.Fan(a)mediatek.com> --- .../bindings/gpu/arm,mali-valhall.yaml | 217 ++++++++++++++++++ 1 file changed, 217 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml new file mode 100644 index 000000000000..275c14ad173a --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml @@ -0,0 +1,217 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Valhall GPU + +maintainers: + - Rob Herring <robh(a)kernel.org> + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + items: + - enum: + - mediatek,mt8192-mali + - const: arm,mali-valhall + + reg: + maxItems: 1 + + interrupts: + items: + - description: GPU interrupt + - description: MMU interrupt + - description: Job interrupt + + interrupt-names: + items: + - const: gpu + - const: mmu + - const: job + + clocks: + minItems: 1 + + power-domains: + minItems: 1 + maxItems: 5 + + mali-supply: true + sram-supply: true + + operating-points-v2: true + opp_table: true + + "#cooling-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-mali + then: + properties: + power-domains: + minItems: 5 + maxItems: 5 + + power-domain-names: + items: + - const: core0 + - const: core1 + - const: core2 + - const: core3 + - const: core4 + + required: + - sram-supply + - power-domains + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu@13000000 { + compatible = "mediatek,mt8192-mali", "arm,mali-valhall"; + reg = <0x13000000 0x4000>; + interrupts = + <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = + "gpu", + "mmu", + "job"; + + clocks = <&mfgcfg 0>; + + power-domains = + <&spm 4>, + <&spm 5>, + <&spm 6>, + <&spm 7>, + <&spm 8>; + + operating-points-v2 = <&gpu_opp_table>; + mali-supply = <&mt6315_7_vbuck1>; + sram-supply = <&mt6359_vsram_others_ldo_reg>; + gpu_opp_table: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + opp-microvolt = <606250>, + <750000>; + }; + + opp-399000000 { + opp-hz = /bits/ 64 <399000000>; + opp-microvolt = <618750>, + <750000>; + }; + + opp-440000000 { + opp-hz = /bits/ 64 <440000000>; + opp-microvolt = <631250>, + <750000>; + }; + + opp-482000000 { + opp-hz = /bits/ 64 <482000000>; + opp-microvolt = <643750>, + <750000>; + }; + + opp-523000000 { + opp-hz = /bits/ 64 <523000000>; + opp-microvolt = <656250>, + <750000>; + }; + + opp-564000000 { + opp-hz = /bits/ 64 <564000000>; + opp-microvolt = <668750>, + <750000>; + }; + + opp-605000000 { + opp-hz = /bits/ 64 <605000000>; + opp-microvolt = <681250>, + <750000>; + }; + + opp-647000000 { + opp-hz = /bits/ 64 <647000000>; + opp-microvolt = <693750>, + <750000>; + }; + + opp-688000000 { + opp-hz = /bits/ 64 <688000000>; + opp-microvolt = <706250>, + <750000>; + }; + + opp-724000000 { + opp-hz = /bits/ 64 <724000000>; + opp-microvolt = <725000>, + <750000>; + }; + + opp-760000000 { + opp-hz = /bits/ 64 <760000000>; + opp-microvolt = <743750>, + <750000>; + }; + + opp-795000000 { + opp-hz = /bits/ 64 <795000000>; + opp-microvolt = <762500>, + <762500>; + }; + + opp-831000000 { + opp-hz = /bits/ 64 <831000000>; + opp-microvolt = <781250>, + <781250>; + }; + + opp-855000000 { + opp-hz = /bits/ 64 <855000000>; + opp-microvolt = <793750>, + <793750>; + }; + + opp-902000000 { + opp-hz = /bits/ 64 <902000000>; + opp-microvolt = <818750>, + <818750>; + }; + + opp-950000000 { + opp-hz = /bits/ 64 <950000000>; + opp-microvolt = <843750>, + <843750>; + }; + }; + }; +... -- 2.18.0

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[PATCH -next] drm/solomon: Make DRM_SSD130X depends on MMU
by YueHaibing 13 Apr '22

13 Apr '22

WARNING: unmet direct dependencies detected for DRM_GEM_SHMEM_HELPER Depends on [n]: HAS_IOMEM [=y] && DRM [=m] && MMU [=n] Selected by [m]: - DRM_SSD130X [=m] && HAS_IOMEM [=y] && DRM [=m] DRM_GEM_SHMEM_HELPER depends on MMU, DRM_SSD130X should also depends on MMU. Fixes: a61732e80867 ("drm: Add driver for Solomon SSD130x OLED displays") Signed-off-by: YueHaibing <yuehaibing(a)huawei.com> --- drivers/gpu/drm/solomon/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/solomon/Kconfig b/drivers/gpu/drm/solomon/Kconfig index 5861c3ab7c45..6230369505c9 100644 --- a/drivers/gpu/drm/solomon/Kconfig +++ b/drivers/gpu/drm/solomon/Kconfig @@ -1,6 +1,6 @@ config DRM_SSD130X tristate "DRM support for Solomon SSD130x OLED displays" - depends on DRM + depends on DRM && MMU select BACKLIGHT_CLASS_DEVICE select DRM_GEM_SHMEM_HELPER select DRM_KMS_HELPER -- 2.17.1

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[PATCH v2] phy: mediatek: phy-mtk-mipi-dsi: Simplify with dev_err_probe()
by AngeloGioacchino Del Regno 13 Apr '22

13 Apr '22

Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno(a)collabora.com> --- v2: Sorry, v1 was only partial as I have accidentally sent the wrong patch file. Fixed for v2. drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 29 +++++++++---------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c index 67b005d5b9e3..28506932bd91 100644 --- a/drivers/phy/mediatek/phy-mtk-mipi-dsi.c +++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi.c @@ -154,11 +154,9 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) return PTR_ERR(mipi_tx->regs); ref_clk = devm_clk_get(dev, NULL); - if (IS_ERR(ref_clk)) { - ret = PTR_ERR(ref_clk); - dev_err(dev, "Failed to get reference clock: %d\n", ret); - return ret; - } + if (IS_ERR(ref_clk)) + return dev_err_probe(dev, PTR_ERR(ref_clk), + "Failed to get reference clock\n"); ret = of_property_read_u32(dev->of_node, "drive-strength-microamp", &mipi_tx->mipitx_drive); @@ -178,27 +176,20 @@ static int mtk_mipi_tx_probe(struct platform_device *pdev) ret = of_property_read_string(dev->of_node, "clock-output-names", &clk_init.name); - if (ret < 0) { - dev_err(dev, "Failed to read clock-output-names: %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read clock-output-names\n"); clk_init.ops = mipi_tx->driver_data->mipi_tx_clk_ops; mipi_tx->pll_hw.init = &clk_init; mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw); - if (IS_ERR(mipi_tx->pll)) { - ret = PTR_ERR(mipi_tx->pll); - dev_err(dev, "Failed to register PLL: %d\n", ret); - return ret; - } + if (IS_ERR(mipi_tx->pll)) + return dev_err_probe(dev, PTR_ERR(mipi_tx->pll), "Failed to register PLL\n"); phy = devm_phy_create(dev, NULL, &mtk_mipi_tx_ops); - if (IS_ERR(phy)) { - ret = PTR_ERR(phy); - dev_err(dev, "Failed to create MIPI D-PHY: %d\n", ret); - return ret; - } + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "Failed to create MIPI D-PHY\n"); + phy_set_drvdata(phy, mipi_tx); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); -- 2.35.1

2 1

[PATCH] phy: mediatek: phy-mtk-hdmi: Simplify with dev_err_probe()
by AngeloGioacchino Del Regno 13 Apr '22

13 Apr '22

Use the dev_err_probe() helper to simplify error handling during probe. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno(a)collabora.com> --- drivers/phy/mediatek/phy-mtk-hdmi.c | 50 +++++++++++------------------ 1 file changed, 19 insertions(+), 31 deletions(-) diff --git a/drivers/phy/mediatek/phy-mtk-hdmi.c b/drivers/phy/mediatek/phy-mtk-hdmi.c index 5fb4217fb8e0..d4bd419abc3c 100644 --- a/drivers/phy/mediatek/phy-mtk-hdmi.c +++ b/drivers/phy/mediatek/phy-mtk-hdmi.c @@ -120,20 +120,16 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) return PTR_ERR(hdmi_phy->regs); ref_clk = devm_clk_get(dev, "pll_ref"); - if (IS_ERR(ref_clk)) { - ret = PTR_ERR(ref_clk); - dev_err(&pdev->dev, "Failed to get PLL reference clock: %d\n", - ret); - return ret; - } + if (IS_ERR(ref_clk)) + return dev_err_probe(dev, PTR_ERR(ref_clk), + "Failed to get PLL reference clock\n"); + ref_clk_name = __clk_get_name(ref_clk); ret = of_property_read_string(dev->of_node, "clock-output-names", &clk_init.name); - if (ret < 0) { - dev_err(dev, "Failed to read clock-output-names: %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read clock-output-names\n"); hdmi_phy->dev = dev; hdmi_phy->conf = @@ -141,25 +137,19 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) mtk_hdmi_phy_clk_get_data(hdmi_phy, &clk_init); hdmi_phy->pll_hw.init = &clk_init; hdmi_phy->pll = devm_clk_register(dev, &hdmi_phy->pll_hw); - if (IS_ERR(hdmi_phy->pll)) { - ret = PTR_ERR(hdmi_phy->pll); - dev_err(dev, "Failed to register PLL: %d\n", ret); - return ret; - } + if (IS_ERR(hdmi_phy->pll)) + return dev_err_probe(dev, PTR_ERR(hdmi_phy->pll), + "Failed to register PLL\n"); ret = of_property_read_u32(dev->of_node, "mediatek,ibias", &hdmi_phy->ibias); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to get ibias: %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get ibias\n"); ret = of_property_read_u32(dev->of_node, "mediatek,ibias_up", &hdmi_phy->ibias_up); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to get ibias up: %d\n", ret); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get ibias_up\n"); dev_info(dev, "Using default TX DRV impedance: 4.2k/36\n"); hdmi_phy->drv_imp_clk = 0x30; @@ -168,17 +158,15 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) hdmi_phy->drv_imp_d0 = 0x30; phy = devm_phy_create(dev, NULL, mtk_hdmi_phy_dev_get_ops(hdmi_phy)); - if (IS_ERR(phy)) { - dev_err(dev, "Failed to create HDMI PHY\n"); - return PTR_ERR(phy); - } + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "Cannot create HDMI PHY\n"); + phy_set_drvdata(phy, hdmi_phy); phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); - if (IS_ERR(phy_provider)) { - dev_err(dev, "Failed to register HDMI PHY\n"); - return PTR_ERR(phy_provider); - } + if (IS_ERR(phy_provider)) + return dev_err_probe(dev, PTR_ERR(phy_provider), + "Failed to register HDMI PHY\n"); if (hdmi_phy->conf->pll_default_off) hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy); -- 2.35.1

2 1

[PATCH] video: fbdev-MMP: replace usage of found with dedicated list iterator variable
by Jakob Koschel 12 Apr '22

12 Apr '22

To move the list iterator variable into the list_for_each_entry_*() macro in the future it should be avoided to use the list iterator variable after the loop body. To *never* use the list iterator variable after the loop it was concluded to use a separate iterator variable instead of a found boolean [1]. This removes the need to use a found variable and simply checking if the variable was set, can determine if the break/goto was hit. Link: https://lore.kernel.org/all/CAHk-=wgRr_D8CB-D9Kg-c=EHreAsk5SqXPwr9Y7k9sA6cW… [1] Signed-off-by: Jakob Koschel <jakobkoschel(a)gmail.com> --- drivers/video/fbdev/mmp/core.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/video/fbdev/mmp/core.c b/drivers/video/fbdev/mmp/core.c index 154127256a2c..03707461eced 100644 --- a/drivers/video/fbdev/mmp/core.c +++ b/drivers/video/fbdev/mmp/core.c @@ -127,19 +127,18 @@ EXPORT_SYMBOL_GPL(mmp_unregister_panel); */ struct mmp_path *mmp_get_path(const char *name) { - struct mmp_path *path; - int found = 0; + struct mmp_path *path = NULL, *iter; mutex_lock(&disp_lock); - list_for_each_entry(path, &path_list, node) { - if (!strcmp(name, path->name)) { - found = 1; + list_for_each_entry(iter, &path_list, node) { + if (!strcmp(name, iter->name)) { + path = iter; break; } } mutex_unlock(&disp_lock); - return found ? path : NULL; + return path; } EXPORT_SYMBOL_GPL(mmp_get_path); base-commit: f82da161ea75dc4db21b2499e4b1facd36dab275 -- 2.25.1

2 1

[PATCH v6 0/6] drm: exynos: dsi: Convert drm bridge
by Jagan Teki 12 Apr '22

12 Apr '22

Updated series about drm bridge conversion of exynos dsi. Previous version can be accessible, here [1]. Patch 1: tc358764 panel_bridge API Patch 2: connector reset Patch 3: bridge attach in MIC Patch 4: panel_bridge API Patch 5: bridge conversion Patch 6: atomic functions [1] https://patchwork.amarulasolutions.com/cover/1839 Any inputs? Jagan. Jagan Teki (6): drm: bridge: tc358764: Use drm panel_bridge API drm: bridge: panel: Reset the connector state pointer exynos: drm: dsi: Attach in_bridge in MIC driver drm: exynos: dsi: Use drm panel_bridge API drm: exynos: dsi: Convert to bridge driver drm: exynos: dsi: Switch to atomic funcs drivers/gpu/drm/bridge/panel.c | 3 + drivers/gpu/drm/bridge/tc358764.c | 104 +--------- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 241 ++++++------------------ drivers/gpu/drm/exynos/exynos_drm_mic.c | 22 +++ 4 files changed, 93 insertions(+), 277 deletions(-) -- 2.25.1

6 23

[PATCH v2 0/7] drm/i915: Use the memcpy_from_wc function from drm
by Balasubramani Vivekanandan 12 Apr '22

12 Apr '22

drm_memcpy_from_wc() performs fast copy from WC memory type using non-temporal instructions. Now there are two similar implementations of this function. One exists in drm_cache.c as drm_memcpy_from_wc() and another implementation in i915/i915_memcpy.c as i915_memcpy_from_wc(). drm_memcpy_from_wc() was the recent addition through the series https://patchwork.freedesktop.org/patch/436276/?series=90681&rev=6 The goal of this patch series is to change all users of i915_memcpy_from_wc() to drm_memcpy_from_wc() and a have common implementation in drm and eventually remove the copy from i915. Another benefit of using memcpy functions from drm is that drm_memcpy_from_wc() is available for non-x86 architectures. i915_memcpy_from_wc() is implemented only for x86 and prevents building i915 for ARM64. drm_memcpy_from_wc() does fast copy using non-temporal instructions for x86 and for other architectures makes use of memcpy() family of functions as fallback. Another major difference is unlike i915_memcpy_from_wc(), drm_memcpy_from_wc() will not fail if the passed address argument is not alignment to be used with non-temporal load instructions or if the platform lacks support for those instructions (non-temporal load instructions are provided through SSE4.1 instruction set extension). Instead drm_memcpy_from_wc() continues with fallback functions to complete the copy. This relieves the caller from checking the return value of i915_memcpy_from_wc() and explicitly using a fallback. Follow up series will be created to remove the memcpy_from_wc functions from i915 once the dependency is completely removed. v2: Fixed missing check to find if the address is from system memory or io memory and use the right initialization function to construct the iosys_map structure (Review feedback from Lucas) Cc: Jani Nikula <jani.nikula(a)intel.com> Cc: Lucas De Marchi <lucas.demarchi(a)intel.com> Cc: David Airlie <airlied(a)linux.ie> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Chris Wilson <chris.p.wilson(a)intel.com> Cc: Thomas Hellstr_m <thomas.hellstrom(a)linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi(a)intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin(a)linux.intel.com> Cc: Nirmoy Das <nirmoy.das(a)intel.com> Balasubramani Vivekanandan (7): drm: Relax alignment constraint for destination address drm: Add drm_memcpy_from_wc() variant which accepts destination address drm/i915: use the memcpy_from_wc call from the drm drm/i915/guc: use the memcpy_from_wc call from the drm drm/i915/selftests: use the memcpy_from_wc call from the drm drm/i915/gt: Avoid direct dereferencing of io memory drm/i915: Avoid dereferencing io mapped memory drivers/gpu/drm/drm_cache.c | 98 +++++++++++++++++-- drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 +- drivers/gpu/drm/i915/gt/selftest_reset.c | 21 ++-- drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 15 ++- drivers/gpu/drm/i915/i915_gpu_error.c | 45 +++++---- .../drm/i915/selftests/intel_memory_region.c | 41 +++++--- include/drm/drm_cache.h | 3 + 7 files changed, 174 insertions(+), 55 deletions(-) -- 2.25.1

5 16

[PATCH v4 RFC] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES
by Matt Atwood 12 Apr '22

12 Apr '22

Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. v2: fix white space errors v3: change flags from hosting 2 8 bit numbers to holding a i915_engine_class_instance struct v4: add error if non rcs engine passed. Cc: Ashutosh Dixit <ashutosh.dixit(a)intel.com> Cc: Matt Roper <matthew.d.roper(a)intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 Signed-off-by: Matt Atwood <matthew.s.atwood(a)intel.com> --- drivers/gpu/drm/i915/i915_query.c | 71 ++++++++++++++++++++++--------- include/uapi/drm/i915_drm.h | 26 +++++++---- 2 files changed, 69 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index b5ca00cb6cf6..32be84c95956 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -9,6 +9,7 @@ #include "i915_drv.h" #include "i915_perf.h" #include "i915_query.h" +#include "gt/intel_engine_user.h" #include <uapi/drm/i915_drm.h> static int copy_query_item(void *query_hdr, size_t query_sz, @@ -28,36 +29,30 @@ static int copy_query_item(void *query_hdr, size_t query_sz, return 0; } -static int query_topology_info(struct drm_i915_private *dev_priv, - struct drm_i915_query_item *query_item) +static int fill_topology_info(const struct sseu_dev_info *sseu, + struct drm_i915_query_item *query_item, + const u8 *subslice_mask) { - const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu; struct drm_i915_query_topology_info topo; u32 slice_length, subslice_length, eu_length, total_length; int ret; - if (query_item->flags != 0) - return -EINVAL; + BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); if (sseu->max_slices == 0) return -ENODEV; - BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); - slice_length = sizeof(sseu->slice_mask); subslice_length = sseu->max_slices * sseu->ss_stride; eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride; total_length = sizeof(topo) + slice_length + subslice_length + eu_length; - ret = copy_query_item(&topo, sizeof(topo), total_length, - query_item); + ret = copy_query_item(&topo, sizeof(topo), total_length, query_item); + if (ret != 0) return ret; - if (topo.flags != 0) - return -EINVAL; - memset(&topo, 0, sizeof(topo)); topo.max_slices = sseu->max_slices; topo.max_subslices = sseu->max_subslices; @@ -69,27 +64,64 @@ static int query_topology_info(struct drm_i915_private *dev_priv, topo.eu_stride = sseu->eu_stride; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr), - &topo, sizeof(topo))) + &topo, sizeof(topo))) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)), - &sseu->slice_mask, slice_length)) + &sseu->slice_mask, slice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + slice_length), - sseu->subslice_mask, subslice_length)) + sizeof(topo) + slice_length), + subslice_mask, subslice_length)) return -EFAULT; if (copy_to_user(u64_to_user_ptr(query_item->data_ptr + - sizeof(topo) + - slice_length + subslice_length), - sseu->eu_mask, eu_length)) + sizeof(topo) + + slice_length + subslice_length), + sseu->eu_mask, eu_length)) return -EFAULT; return total_length; } +static int query_topology_info(struct drm_i915_private *dev_priv, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu; + + if (query_item->flags != 0) + return -EINVAL; + + return fill_topology_info(sseu, query_item, sseu->subslice_mask); +} + +static int query_geometry_subslices(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + const struct sseu_dev_info *sseu; + struct intel_engine_cs *engine; + struct i915_engine_class_instance classinstance; + + if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50)) + return -ENODEV; + + classinstance = *((struct i915_engine_class_instance *)&query_item->flags); + + engine = intel_engine_lookup_user(i915, (u8) classinstance.engine_class, + (u8) classinstance.engine_instance); + + if (!engine) + return -EINVAL; + + if (engine->class != RENDER_CLASS) + return -EINVAL; + + sseu = &engine->gt->info.sseu; + + return fill_topology_info(sseu, query_item, sseu->geometry_subslice_mask); +} + static int query_engine_info(struct drm_i915_private *i915, struct drm_i915_query_item *query_item) @@ -508,6 +540,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv, query_perf_config, query_memregion_info, query_hwconfig_blob, + query_geometry_subslices, }; int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 9ab021c4d632..c2a18afcf791 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -2690,11 +2690,12 @@ struct drm_i915_perf_oa_config { struct drm_i915_query_item { /** @query_id: The id for this query */ __u64 query_id; -#define DRM_I915_QUERY_TOPOLOGY_INFO 1 -#define DRM_I915_QUERY_ENGINE_INFO 2 -#define DRM_I915_QUERY_PERF_CONFIG 3 -#define DRM_I915_QUERY_MEMORY_REGIONS 4 -#define DRM_I915_QUERY_HWCONFIG_BLOB 5 +#define DRM_I915_QUERY_TOPOLOGY_INFO 1 +#define DRM_I915_QUERY_ENGINE_INFO 2 +#define DRM_I915_QUERY_PERF_CONFIG 3 +#define DRM_I915_QUERY_MEMORY_REGIONS 4 +#define DRM_I915_QUERY_HWCONFIG_BLOB 5 +#define DRM_I915_QUERY_GEOMETRY_SUBSLICES 6 /* Must be kept compact -- no holes and well documented */ /** @@ -2718,6 +2719,9 @@ struct drm_i915_query_item { * - DRM_I915_QUERY_PERF_CONFIG_LIST * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID + * + * When query_id == DRM_I915_QUERY_GEOMETRY_SUBSLICES must have a valid + * i915_engine_class_instance struct. */ __u32 flags; #define DRM_I915_QUERY_PERF_CONFIG_LIST 1 @@ -2776,16 +2780,20 @@ struct drm_i915_query { }; /* - * Data written by the kernel with query DRM_I915_QUERY_TOPOLOGY_INFO : + * Data written by the kernel with query DRM_I915_QUERY_TOPOLOGY_INFO, + * DRM_I915_QUERY_GEOMETRY_SUBSLICE: * * data: contains the 3 pieces of information : * - * - the slice mask with one bit per slice telling whether a slice is - * available. The availability of slice X can be queried with the following - * formula : + * - For DRM_I915_QUERY_TOPOLOGY_INFO the slice mask with one bit per slice + * telling whether a slice is available. The availability of slice X can be + * queried with the following formula : * * (data[X / 8] >> (X % 8)) & 1 * + * - For DRM_I915_QUERY_GEOMETRY_SUBSLICES Slices are equal to 1 and this field + * is not used. + * * - the subslice mask for each slice with one bit per subslice telling * whether a subslice is available. Gen12 has dual-subslices, which are * similar to two gen11 subslices. For gen12, this array represents dual- -- 2.21.3

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dri-devel March 2022