dri-devel October 2019

dri-devel@lists.freedesktop.org

359 participants
1833 discussions

[PULL] drm-intel-fixes
by Rodrigo Vivi 03 Oct '19

03 Oct '19

Hi Dave and Daniel, This v2 contains a critical DP-MST fix that it would be really good to be propagated as soon as possible. Besides all the drm-intel-next-fixes that I mentioned on previous email. Here goes drm-intel-fixes-2019-10-03-1: - Fix DP-MST crtc_mask - Fix dsc dpp calculations - Fix g4x sprite scaling stride check with GTT remapping Short summary of fixes pull (less than what git shortlog provides): - explain anything non-fixes (e.g. cleanups) and why it's appropriate - highlight … [View More]

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[PATCH] drm/rockchip: Round up _before_ giving to the clock framework
by Douglas Anderson 03 Oct '19

03 Oct '19

I'm embarassed to say that even though I've touched vop_crtc_mode_fixup() twice and I swear I tested it, there's still a stupid glaring bug in it. Specifically, on veyron_minnie (with all the latest display timings) we want to be setting our pixel clock to 66,666,666.67 Hz and we tell userspace that's what we set, but we're actually choosing 66,000,000 Hz. This is confirmed by looking at the clock tree. The problem is that in drm_display_mode_from_videomode() we convert from Hz to kHz with: … [View More] dmode->clock = vm->pixelclock / 1000; ...so when the device tree specifies a clock of 66666667 for the panel then DRM translates that to 66666000. The clock framework will always pick a clock that is _lower_ than the one requested, so it will refuse to pick 66666667 and we'll end up at 66000000. While we could try to fix drm_display_mode_from_videomode() to round to the nearest kHz and it would fix our problem, it wouldn't help if the clock we actually needed was 60,000,001 Hz. We could alternatively have DRM always round up, but maybe this would break someone else who already baked in the assumption that DRM rounds down. Let's solve this by just adding 999 Hz before calling clk_round_rate(). This should be safe and work everywhere. NOTE: if this is picked to stable, it's probably easiest to first pick commit 527e4ca3b6d1 ("drm/rockchip: Base adjustments of the mode based on prev adjustments") which shouldn't hurt in stable. Fixes: b59b8de31497 ("drm/rockchip: return a true clock rate to adjusted_mode") Signed-off-by: Douglas Anderson <dianders(a)chromium.org> --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 37 +++++++++++++++++++-- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 613404f86668..84e3decb17b1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1040,10 +1040,41 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *adjusted_mode) { struct vop *vop = to_vop(crtc); + unsigned long rate; - adjusted_mode->clock = - DIV_ROUND_UP(clk_round_rate(vop->dclk, - adjusted_mode->clock * 1000), 1000); + /* + * Clock craziness. + * + * Key points: + * + * - DRM works in in kHz. + * - Clock framework works in Hz. + * - Rockchip's clock driver picks the clock rate that is the + * same _OR LOWER_ than the one requested. + * + * Action plan: + * + * 1. When DRM gives us a mode, we should add 999 Hz to it. That way + * if the clock we need is 60000001 Hz (~60 MHz) and DRM tells us to + * make 60000 kHz then the clock framework will actually give us + * the right clock. + * + * NOTE: if the PLL (maybe through a divider) could actually make + * a clock rate 999 Hz higher instead of the one we want then this + * could be a problem. Unfortunately there's not much we can do + * since it's baked into DRM to use kHz. It shouldn't matter in + * practice since Rockchip PLLs are controlled by tables and + * even if there is a divider in the middle I wouldn't expect PLL + * rates in the table that are just a few kHz different. + * + * 2. Get the clock framework to round the rate for us to tell us + * what it will actually make. + * + * 3. Store the rounded up rate so that we don't need to worry about + * this in the actual clk_set_rate(). + */ + rate = clk_round_rate(vop->dclk, adjusted_mode->clock * 1000 + 999); + adjusted_mode->clock = DIV_ROUND_UP(rate, 1000); return true; } -- 2.23.0.444.g18eeb5a265-goog [View Less]

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[RESEND PATCH libdrm v2] NOMERGE: Add drmModeGetFB2
by Juston Li 03 Oct '19

03 Oct '19

From: Daniel Stone <daniels(a)collabora.com> Add a wrapper around the getfb2 ioctl, which returns extended framebuffer information mirroring addfb2, including multiple planes and modifiers. This depends on unmerged kernel API so should not be merged. Changes since v1: - functions should be drm_public - modifier for should 64 bits - update ioctl number Signed-off-by: Juston Li <juston.li(a)intel.com> --- include/drm/drm.h | 2 ++ xf86drmMode.c | 40 +++++++++++++++++++++++… [View More]+++++++++++++++++ xf86drmMode.h | 15 +++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/include/drm/drm.h b/include/drm/drm.h index 438abde3621d..340a1b4e9cf6 100644 --- a/include/drm/drm.h +++ b/include/drm/drm.h @@ -941,6 +941,8 @@ extern "C" { #define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer) #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array) +#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2) + /** * Device specific ioctls should only be in their respective headers * The device specific ioctl range is from 0x40 to 0x9f. diff --git a/xf86drmMode.c b/xf86drmMode.c index 207d7be91caa..6c5f6cc2a075 100644 --- a/xf86drmMode.c +++ b/xf86drmMode.c @@ -1594,3 +1594,43 @@ drmModeRevokeLease(int fd, uint32_t lessee_id) return 0; return -errno; } + +drm_public drmModeFB2Ptr +drmModeGetFB2(int fd, uint32_t fb_id) +{ + struct drm_mode_fb_cmd2 get; + drmModeFB2Ptr ret; + int err; + + memclear(get); + get.fb_id = fb_id; + + err = DRM_IOCTL(fd, DRM_IOCTL_MODE_GETFB2, &get); + if (err != 0) + return NULL; + + ret = drmMalloc(sizeof(drmModeFB2)); + if (!ret) + return NULL; + + ret->fb_id = fb_id; + ret->width = get.width; + ret->height = get.height; + ret->pixel_format = get.pixel_format; + ret->flags = get.flags; + ret->modifier = get.modifier[0]; + memcpy(ret->handles, get.handles, sizeof(uint32_t) * 4); + memcpy(ret->pitches, get.pitches, sizeof(uint32_t) * 4); + memcpy(ret->offsets, get.offsets, sizeof(uint32_t) * 4); + + return ret; +} + +drm_public void drmModeFreeFB2(drmModeFB2Ptr ptr) +{ + if (!ptr) + return; + + /* we might add more frees later. */ + drmFree(ptr); +} diff --git a/xf86drmMode.h b/xf86drmMode.h index a32902f73289..07c98f42555d 100644 --- a/xf86drmMode.h +++ b/xf86drmMode.h @@ -223,6 +223,19 @@ typedef struct _drmModeFB { uint32_t handle; } drmModeFB, *drmModeFBPtr; +typedef struct _drmModeFB2 { + uint32_t fb_id; + uint32_t width, height; + uint32_t pixel_format; /* fourcc code from drm_fourcc.h */ + uint64_t modifier; /* applies to all buffers */ + uint32_t flags; + + /* per-plane GEM handle; may be duplicate entries for multiple planes */ + uint32_t handles[4]; + uint32_t pitches[4]; /* bytes */ + uint32_t offsets[4]; /* bytes */ +} drmModeFB2, *drmModeFB2Ptr; + typedef struct drm_clip_rect drmModeClip, *drmModeClipPtr; typedef struct _drmModePropertyBlob { @@ -341,6 +354,7 @@ typedef struct _drmModePlaneRes { extern void drmModeFreeModeInfo( drmModeModeInfoPtr ptr ); extern void drmModeFreeResources( drmModeResPtr ptr ); extern void drmModeFreeFB( drmModeFBPtr ptr ); +extern void drmModeFreeFB2( drmModeFB2Ptr ptr ); extern void drmModeFreeCrtc( drmModeCrtcPtr ptr ); extern void drmModeFreeConnector( drmModeConnectorPtr ptr ); extern void drmModeFreeEncoder( drmModeEncoderPtr ptr ); @@ -360,6 +374,7 @@ extern drmModeResPtr drmModeGetResources(int fd); * Retrieve information about framebuffer bufferId */ extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId); +extern drmModeFB2Ptr drmModeGetFB2(int fd, uint32_t bufferId); /** * Creates a new framebuffer with an buffer object as its scanout buffer. -- 2.21.0 [View Less]

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[PULL] drm-intel-fixes
by Rodrigo Vivi 03 Oct '19

03 Oct '19

Hi Dave and Daniel, I know you are on XDC and I was even considering not send any this week, but let me send this before I forget. There are the drm-intel-next-fixes pull requests that I had sent that are still needed and it would be good if you could pull those. Besides we have more 2 fixes here. If necessary and easier I can send all fixes together next week, including the ones missed on -rc1 and these ones here plus any upcoming. Just let me know how you prefer. Here goes drm-intel-… [View More]

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[PATCH] drm/i915: Add Sphinx-compatible references to struct fields
by Jonathan Neuschäfer 03 Oct '19

03 Oct '19

This fixes the following kernel-doc warnings and makes the corrsponding fields show up in the generated HTML: ./drivers/gpu/drm/i915/i915_drv.h:1143: warning: Incorrect use of kernel-doc format: * State of the OA buffer. ./drivers/gpu/drm/i915/i915_drv.h:1154: warning: Incorrect use of kernel-doc format: * Locks reads and writes to all head/tail state ./drivers/gpu/drm/i915/i915_drv.h:1176: warning: Incorrect use of kernel-doc format: * One 'aging' … [View More]tail pointer and one 'aged' tail pointer ready to ./drivers/gpu/drm/i915/i915_drv.h:1188: warning: Incorrect use of kernel-doc format: * Index for the aged tail ready to read() data up to. ./drivers/gpu/drm/i915/i915_drv.h:1193: warning: Incorrect use of kernel-doc format: * A monotonic timestamp for when the current aging tail pointer ./drivers/gpu/drm/i915/i915_drv.h:1199: warning: Incorrect use of kernel-doc format: * Although we can always read back the head pointer register, Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- drivers/gpu/drm/i915/i915_drv.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 772154e4073e..55782e78f026 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1140,7 +1140,7 @@ struct i915_perf_stream { int period_exponent; /** - * State of the OA buffer. + * @oa_buffer: State of the OA buffer. */ struct { struct i915_vma *vma; @@ -1151,6 +1151,7 @@ struct i915_perf_stream { int size_exponent; /** + * @oa_buffer.ptr_lock: * Locks reads and writes to all head/tail state * * Consider: the head and tail pointer state needs to be read @@ -1173,6 +1174,7 @@ struct i915_perf_stream { spinlock_t ptr_lock; /** + * @oa_buffer.tails: * One 'aging' tail pointer and one 'aged' tail pointer ready to * used for reading. * @@ -1185,17 +1187,20 @@ struct i915_perf_stream { } tails[2]; /** + * @oa_buffer.aged_tail_idx: * Index for the aged tail ready to read() data up to. */ unsigned int aged_tail_idx; /** + * @oa_buffer.aging_timestamp: * A monotonic timestamp for when the current aging tail pointer * was read; used to determine when it is old enough to trust. */ u64 aging_timestamp; /** + * @oa_buffer.head: * Although we can always read back the head pointer register, * we prefer to avoid trusting the HW state, just to avoid any * risk that some hardware condition could * somehow bump the -- 2.20.1 [View Less]

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[PATCH] drm/komeda: Adds more check in mode_valid
by Lowry Li (Arm Technology China) 03 Oct '19

03 Oct '19

This patch adds the checks for vrefresh, crtc_hdisplay and crtc_vdisplay. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li(a)arm.com> --- drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 28 +++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index 2fed1f6..017f6b6 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/… [View More]

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[Bug 111896] too much clutter
by bugzilla-daemon＠freedesktop.org 03 Oct '19

03 Oct '19

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[Bug 111897] too much clutter
by bugzilla-daemon＠freedesktop.org 03 Oct '19

03 Oct '19

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[PATCH] drivers: video: hdmi: log ext colorimetry applicability
by Johan Korsnes 03 Oct '19

03 Oct '19

When logging the AVI InfoFrame, clearly indicate whether or not the extended colorimetry attribute is active. This is only the case when the AVI InfoFrame colorimetry attribute is set to extended. [0] [0] CTA-861-G section 6.4 page 57 Signed-off-by: Johan Korsnes <jkorsnes(a)cisco.com> --- drivers/video/hdmi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index f29db728ff29..a709e38a53ca 100644 --- a/drivers/video/… [View More]

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[PATCH v3] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)
by Chris Wilson 03 Oct '19

03 Oct '19

Make dma_fence_enable_sw_signaling() behave like its dma_fence_add_callback() and dma_fence_default_wait() counterparts and perform the test to enable signaling under the fence->lock, along with the action to do so. This ensure that should an implementation be trying to flush the cb_list (by signaling) on retirement before freeing the fence, it can do so in a race-free manner. See also 0fc89b6802ba ("dma-fence: Simply wrap dma_fence_signal_locked with dma_fence_signal"). v2: Refactor all 3 … [View More]enable_signaling paths to use a common function. Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> --- Return false for "could not _enable_ signaling as it was already signaled" --- drivers/dma-buf/dma-fence.c | 78 +++++++++++++++++-------------------- 1 file changed, 35 insertions(+), 43 deletions(-) diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index 2c136aee3e79..b58528c1cc9d 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -273,6 +273,30 @@ void dma_fence_free(struct dma_fence *fence) } EXPORT_SYMBOL(dma_fence_free); +static bool __dma_fence_enable_signaling(struct dma_fence *fence) +{ + bool was_set; + + lockdep_assert_held(fence->lock); + + was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, + &fence->flags); + + if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) + return false; + + if (!was_set && fence->ops->enable_signaling) { + if (!fence->ops->enable_signaling(fence)) { + dma_fence_signal_locked(fence); + return false; + } + + trace_dma_fence_enable_signal(fence); + } + + return true; +} + /** * dma_fence_enable_sw_signaling - enable signaling on fence * @fence: the fence to enable @@ -285,19 +309,12 @@ void dma_fence_enable_sw_signaling(struct dma_fence *fence) { unsigned long flags; - if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, - &fence->flags) && - !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && - fence->ops->enable_signaling) { - trace_dma_fence_enable_signal(fence); - - spin_lock_irqsave(fence->lock, flags); - - if (!fence->ops->enable_signaling(fence)) - dma_fence_signal_locked(fence); + if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) + return; - spin_unlock_irqrestore(fence->lock, flags); - } + spin_lock_irqsave(fence->lock, flags); + __dma_fence_enable_signaling(fence); + spin_unlock_irqrestore(fence->lock, flags); } EXPORT_SYMBOL(dma_fence_enable_sw_signaling); @@ -331,7 +348,6 @@ int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, { unsigned long flags; int ret = 0; - bool was_set; if (WARN_ON(!fence || !func)) return -EINVAL; @@ -343,25 +359,14 @@ int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb, spin_lock_irqsave(fence->lock, flags); - was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, - &fence->flags); - - if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) - ret = -ENOENT; - else if (!was_set && fence->ops->enable_signaling) { - trace_dma_fence_enable_signal(fence); - - if (!fence->ops->enable_signaling(fence)) { - dma_fence_signal_locked(fence); - ret = -ENOENT; - } - } - - if (!ret) { + if (__dma_fence_enable_signaling(fence)) { cb->func = func; list_add_tail(&cb->node, &fence->cb_list); - } else + } else { INIT_LIST_HEAD(&cb->node); + ret = -ENOENT; + } + spin_unlock_irqrestore(fence->lock, flags); return ret; @@ -461,7 +466,6 @@ dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) struct default_wait_cb cb; unsigned long flags; signed long ret = timeout ? timeout : 1; - bool was_set; if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) return ret; @@ -473,21 +477,9 @@ dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) goto out; } - was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, - &fence->flags); - - if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) + if (!__dma_fence_enable_signaling(fence)) goto out; - if (!was_set && fence->ops->enable_signaling) { - trace_dma_fence_enable_signal(fence); - - if (!fence->ops->enable_signaling(fence)) { - dma_fence_signal_locked(fence); - goto out; - } - } - if (!timeout) { ret = 0; goto out; -- 2.23.0 [View Less]

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dri-devel October 2019