dri-devel February 2020

dri-devel@lists.freedesktop.org

302 participants
679 discussions

build error: f7655d42fcee drm/edid: Add CTA-861-G modes with VIC >= 193
by Frank Rowand 11 Feb '20

11 Feb '20

I am getting a kernel build error at version 5.6-rc1: drivers/gpu/drm/drm_edid.c: In function 'cea_mode_alternate_timings': drivers/gpu/drm/drm_edid.c:3275:2: error: call to '__compiletime_assert_3282' declared with attribute error: BUILD_BUG_ON failed: cea_mode_for_vic(8)->vtotal != 262 || cea_mode_for_vic(9)->vtotal != 262 || cea_mode_for_vic(12)->vtotal != 262 || cea_mode_for_vic(13)->vtotal != 262 || cea_mode_for_vic(23)->vtotal != 312 || cea_mode_for_vic(24)->vtotal != 312 || cea_mode_for_vic(27)->vtotal != 312 || cea_mode_for_vic(28)->vtotal != 312 make[4]: *** [drivers/gpu/drm/drm_edid.o] Error 1 Kernel configuration: make qcom_defconfig (arch/arm/configs/qcom_defconfig) Compiler is arm-eabi-gcc 4.6.x The build error goes away if I revert: f7655d42fcee drm/edid: Add CTA-861-G modes with VIC >= 193 The build error also goes away if I comment out the two lines added to cea_mode_for_vic(): if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193)) return &edid_cea_modes_193[vic - 193]; -Frank

1 1

[PATCH v7 libdrm 1/2] include/drm: sync up drm.h
by Juston Li 11 Feb '20

11 Feb '20

a) delta: Adds DRM_IOCTL_MODE_GETFB2 b) Generated using make headers_install c) Taken from drm-next-misc: commit 3ff4c24bdb1f494c217c80348f9db4896043ed81 Author: Lyude Paul <lyude(a)redhat.com> Date: Fri Jan 17 17:47:48 2020 -0500 drm/dp_mst: Fix indenting in drm_dp_mst_topology_mgr_set_mst() Changes since v6: - clean up commit message per include/drm/README (Eric Engestrom) Signed-off-by: Juston Li <juston.li(a)intel.com> Acked-by: Eric Engestrom <eric(a)engestrom.ch> --- include/drm/drm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm.h b/include/drm/drm.h index ab9403397815..c7fd2a35fd7b 100644 --- a/include/drm/drm.h +++ b/include/drm/drm.h @@ -942,6 +942,8 @@ extern "C" { #define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer) #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array) +#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2) + /** * Device specific ioctls should only be in their respective headers * The device specific ioctl range is from 0x40 to 0x9f. -- 2.21.1

1 1

[PATCH 0/4] drm/nouveau: Remove struct nouveau_framebuffer
by Thomas Zimmermann 11 Feb '20

11 Feb '20

All fields in struct nouveau_framebuffer appear to be obsolete. The data structure can be replaced by struct drm_framebuffer entirely. Patch 1 removes several unused fields from struct nouveau_framebuffer. Patch 2 moves the field vma to struct nouveau_fbdev. The information in vma is only relevant for fbdev emulation, and as such he field is only used there. Patch 3 removes nvbo from struct nouveau_framebuffer. The nouveau buffer object is based on gem, and as such should be stored in obj[0] of struct drm_framebuffer. This also enables the use of several generic GEM framebuffer functions. Finally patch 4 removes struct nouveau_framebuffer. At this point it's merely a wrapper around struct drm_framebuffer. The patchset has been smoke-tested on NV34 HW by running fbcon and X11. Future directions: There are still functions for creating frameuffers. With further refinements of nouveau's fbcon code, GEM framebuffer helpers could be used here. Thomas Zimmermann (4): drm/nouveau: Remove unused fields from struct nouveau_framebuffer drm/nouveau: Move struct nouveau_framebuffer.vma to struct nouveau_fbdev drm/nouveau: Remove field nvbo from struct nouveau_framebuffer drm/nouveau: Remove struct nouveau_framebuffer drivers/gpu/drm/nouveau/dispnv04/crtc.c | 19 ++++----- drivers/gpu/drm/nouveau/dispnv04/disp.c | 21 +++++----- drivers/gpu/drm/nouveau/dispnv04/overlay.c | 21 +++++----- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 45 ++++++++++++--------- drivers/gpu/drm/nouveau/nouveau_display.c | 47 ++++++---------------- drivers/gpu/drm/nouveau/nouveau_display.h | 25 +++--------- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 42 ++++++++++--------- drivers/gpu/drm/nouveau/nouveau_fbcon.h | 3 ++ drivers/gpu/drm/nouveau/nv50_fbcon.c | 9 ++--- drivers/gpu/drm/nouveau/nvc0_fbcon.c | 9 ++--- 10 files changed, 108 insertions(+), 133 deletions(-) -- 2.25.0

3 14

[PATCH] drm/irq: remove check on dev->dev_private
by Jani Nikula 11 Feb '20

11 Feb '20

There is no real reason to require drivers to set and use dev->dev_private. Indeed, the current recommendation, as documented in drm_device.h, is to embed struct drm_device in the per-device struct instead of using dev_private. Remove the requirement for dev_private to have been set to indicate driver initialization. Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Daniel Vetter <daniel(a)ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- Any ideas for something else drm_irq_install() could/should check to ensure "Driver must have been initialized"? There are only a few instances of dev_private uses in i915, also to be removed, and we could stop initializing dev_private altogether. We could in fact do that without this patch too, as we don't use drm_irq_install(). But it would be cleaner to not have any checks for driver private stuff outside of drivers. --- drivers/gpu/drm/drm_irq.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index 03bce566a8c3..588be45abd7a 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c @@ -111,10 +111,6 @@ int drm_irq_install(struct drm_device *dev, int irq) if (irq == 0) return -EINVAL; - /* Driver must have been initialized */ - if (!dev->dev_private) - return -EINVAL; - if (dev->irq_enabled) return -EBUSY; dev->irq_enabled = true; -- 2.20.1

2 2

[RFC PATCH -next] drm/amd/display: Remove set but not unused variable 'stream_status'
by YueHaibing 11 Feb '20

11 Feb '20

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c: In function dcn10_post_unlock_program_front_end: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2623:29: warning: variable stream_status set but not used [-Wunused-but-set-variable] commit bbf5f6c3f83b ("drm/amd/display: Split program front end part that occur outside lock") involved this unused variable. Signed-off-by: YueHaibing <yuehaibing(a)huawei.com> --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 42fcfee..b2ed0fa 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2610,7 +2610,7 @@ void dcn10_post_unlock_program_front_end( struct dc *dc, struct dc_state *context) { - int i, j; + int i; DC_LOGGER_INIT(dc->ctx->logger); @@ -2620,14 +2620,8 @@ void dcn10_post_unlock_program_front_end( if (!pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe && pipe_ctx->stream) { - struct dc_stream_status *stream_status = NULL; struct timing_generator *tg = pipe_ctx->stream_res.tg; - for (j = 0; j < context->stream_count; j++) { - if (pipe_ctx->stream == context->streams[j]) - stream_status = &context->stream_status[j]; - } - if (context->stream_status[i].plane_count == 0) false_optc_underflow_wa(dc, pipe_ctx->stream, tg); } -- 2.7.4

2 1

[PATCH V7] drm: Add support for DP 1.4 Compliance edid corruption test
by Jerry (Fangzhi) Zuo 11 Feb '20

11 Feb '20

Unlike DP 1.2 edid corruption test, DP 1.4 requires to calculate real CRC value of the last edid data block, and write it back. Current edid CRC calculates routine adds the last CRC byte, and check if non-zero. This behavior is not accurate; actually, we need to return the actual CRC value when corruption is detected. This commit changes this issue by returning the calculated CRC, and initiate the required sequence. Change since v7 - Fix for CI.CHECKPATCH Change since v6 - Add return check Change since v5 - Obtain real CRC value before dumping bad edid Change since v4 - Fix for CI.CHECKPATCH Change since v3 - Fix a minor typo. Change since v2 - Rewrite checksum computation routine to avoid duplicated code. - Rename to avoid confusion. Change since v1 - Have separate routine for returning real CRC. Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo(a)amd.com> Reviewed-by: Harry Wentland <harry.wentland(a)amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira(a)amd.com> --- drivers/gpu/drm/drm_dp_helper.c | 59 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_edid.c | 24 +++++++++++--- include/drm/drm_connector.h | 6 ++++ include/drm/drm_dp_helper.h | 3 ++ 4 files changed, 88 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index f629fc5494a4..43e9f1968af4 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -351,6 +351,65 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, } EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); +/** + * drm_dp_send_real_edid_checksum() - send back real edid checksum value + * @aux: DisplayPort AUX channel + * @real_edid_checksum: real edid checksum for the last block + * + * Returns: + * True on success + */ +bool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux, + u8 real_edid_checksum) +{ + u8 link_edid_read = 0, auto_test_req = 0, test_resp = 0; + + if (drm_dp_dpcd_read(aux, DP_DEVICE_SERVICE_IRQ_VECTOR, + &auto_test_req, 1) < 1) { + DRM_ERROR("DPCD failed read at register 0x%x\n", + DP_DEVICE_SERVICE_IRQ_VECTOR); + return false; + } + auto_test_req &= DP_AUTOMATED_TEST_REQUEST; + + if (drm_dp_dpcd_read(aux, DP_TEST_REQUEST, &link_edid_read, 1) < 1) { + DRM_ERROR("DPCD failed read at register 0x%x\n", + DP_TEST_REQUEST); + return false; + } + link_edid_read &= DP_TEST_LINK_EDID_READ; + + if (!auto_test_req || !link_edid_read) { + DRM_DEBUG_KMS("Source DUT does not support TEST_EDID_READ\n"); + return false; + } + + if (drm_dp_dpcd_write(aux, DP_DEVICE_SERVICE_IRQ_VECTOR, + &auto_test_req, 1) < 1) { + DRM_ERROR("DPCD failed write at register 0x%x\n", + DP_DEVICE_SERVICE_IRQ_VECTOR); + return false; + } + + /* send back checksum for the last edid extension block data */ + if (drm_dp_dpcd_write(aux, DP_TEST_EDID_CHECKSUM, + &real_edid_checksum, 1) < 1) { + DRM_ERROR("DPCD failed write at register 0x%x\n", + DP_TEST_EDID_CHECKSUM); + return false; + } + + test_resp |= DP_TEST_EDID_CHECKSUM_WRITE; + if (drm_dp_dpcd_write(aux, DP_TEST_RESPONSE, &test_resp, 1) < 1) { + DRM_ERROR("DPCD failed write at register 0x%x\n", + DP_TEST_RESPONSE); + return false; + } + + return true; +} +EXPORT_SYMBOL(drm_dp_send_real_edid_checksum); + /** * drm_dp_downstream_max_clock() - extract branch device max * pixel rate for legacy VGA diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 99769d6c9f84..1fcec5f4c3ec 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1590,11 +1590,22 @@ static int validate_displayid(u8 *displayid, int length, int idx); static int drm_edid_block_checksum(const u8 *raw_edid) { int i; - u8 csum = 0; - for (i = 0; i < EDID_LENGTH; i++) + u8 csum = 0, crc = 0; + + for (i = 0; i < EDID_LENGTH - 1; i++) csum += raw_edid[i]; - return csum; + crc = 0x100 - csum; + + return crc; +} + +static bool drm_edid_block_checksum_diff(const u8 *raw_edid, u8 real_checksum) +{ + if (raw_edid[EDID_LENGTH - 1] != real_checksum) + return true; + else + return false; } static bool drm_edid_is_zero(const u8 *in_edid, int length) @@ -1652,7 +1663,7 @@ bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid, } csum = drm_edid_block_checksum(raw_edid); - if (csum) { + if (drm_edid_block_checksum_diff(raw_edid, csum)) { if (edid_corrupt) *edid_corrupt = true; @@ -1793,6 +1804,11 @@ static void connector_bad_edid(struct drm_connector *connector, u8 *edid, int num_blocks) { int i; + u8 num_of_ext = edid[0x7e]; + + /* Calculate real checksum for the last edid extension block data */ + connector->real_edid_checksum = + drm_edid_block_checksum(edid + num_of_ext * EDID_LENGTH); if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS)) return; diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 2113500b4075..b3815371c271 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -1357,6 +1357,12 @@ struct drm_connector { * rev1.1 4.2.2.6 */ bool edid_corrupt; + /** + * @real_edid_checksum: real edid checksum for corrupted edid block. + * Required in Displayport 1.4 compliance testing + * rev1.1 4.2.2.6 + */ + u8 real_edid_checksum; /** @debugfs_entry: debugfs directory for this connector */ struct dentry *debugfs_entry; diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 127d6e1d3338..957a3d00ee05 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1459,6 +1459,9 @@ static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE]); +bool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux, + u8 real_edid_checksum); + int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4]); int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], -- 2.17.1

1 0

[PATCH v3 0/2] drm/panel: simple: Rocktech RK101II01D-CT + binding
by Jyri Sarha 11 Feb '20

11 Feb '20

Add support for Rocktech RK101II01D-CT panel to panel-simple and add yaml binding for it. Changes since v2: - No separate binding document, just add new compatible to panel-simple.yaml Changes since first fersion: - Move to yaml binding Jyri Sarha (2): dt-bindings: panel-simple: Add rocktech,rk101ii01d-ct compatible drm/panel: simple: Add Rocktech RK101II01D-CT panel .../bindings/display/panel/panel-simple.yaml | 2 ++ drivers/gpu/drm/panel/panel-simple.c | 32 +++++++++++++++++++ 2 files changed, 34 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

2 3

[RFC] drm: rework SET_MASTER and DROP_MASTER perm handling
by Emil Velikov 11 Feb '20

11 Feb '20

From: Emil Velikov <emil.velikov(a)collabora.com> This commit reworks the permission handling of the two ioctls. In particular it enforced the CAP_SYS_ADMIN check only, if: - we're issuing the ioctl from process other than the one which opened the node, and - we are, or were master in the past This allows for any application which cannot rely on systemd-logind being present (for whichever reason), to drop it's master capabilities (and regain them at later point) w/o being ran as root. See the comment above drm_master_check_perm() for more details. Cc: Adam Jackson <ajax(a)redhat.com> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Signed-off-by: Emil Velikov <emil.velikov(a)collabora.com> --- This effectively supersedes an earlier patch [1] incorporating ajax's feedback (from IRC ages ago). [1] https://patchwork.freedesktop.org/patch/268977/ --- drivers/gpu/drm/drm_auth.c | 59 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/drm_ioctl.c | 4 +-- include/drm/drm_file.h | 11 +++++++ 3 files changed, 72 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index cc9acd986c68..01d9e35c0106 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -135,6 +135,7 @@ static int drm_set_master(struct drm_device *dev, struct drm_file *fpriv, } } + fpriv->was_master = (ret == 0); return ret; } @@ -179,12 +180,64 @@ static int drm_new_set_master(struct drm_device *dev, struct drm_file *fpriv) return ret; } +/* + * In the olden days the SET/DROP_MASTER ioctls used to return EACCES when + * CAP_SYS_ADMIN was not set. + * + * Even though the first client is _always_ master, it also had to be run as + * root, otherwise SET/DROP_MASTER would fail. In those cases no other client + * could become master ... EVER. + * + * Resulting in a) the graphics session dying badly or b) a completely locked + * session :-\ + * + * As some point systemd-logind was introduced to orchestrate and delegate + * master as applicable. It does so by opening the fd and passing it to users + * while in itself logind a) set/drop master per users' request and b) + * implicitly drops master on VT switch. + * + * Even though logind looks like the future, there are a few obstacles: + * - using it is not possible on some platforms, or + * - applications may not be updated to use it, + * - any client which fails to drop master* can DoS the application using + * logind, to a varying degree. + * + * * Either due missing root permission or simply not calling DROP_MASTER. + * + * + * Here we implement the next best thing: + * We enforce the CAP_SYS_ADMIN check only if the client was not a master + * before. We distinguish between the original master client (say logind) and + * another client which has the fd passed (say Xorg) by comparing the pids. + * + * As a result this fixes, the following when using root-less build w/o logind + * - startx - some drivers work fine regardless + * - weston + * - various compositors based on wlroots + */ +static int +drm_master_check_perm(struct drm_device *dev, struct drm_file *file_priv) +{ + if (file_priv->pid != task_pid(current) && file_priv->was_master) + return 0; + + if (!capable(CAP_SYS_ADMIN)) + return -EACCES; + + return 0; +} + int drm_setmaster_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv) { int ret = 0; mutex_lock(&dev->master_mutex); + + ret = drm_master_check_perm(dev, file_priv); + if (ret) + goto out_unlock; + if (drm_is_current_master(file_priv)) goto out_unlock; @@ -229,6 +282,12 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data, int ret = -EINVAL; mutex_lock(&dev->master_mutex); + + ret = drm_master_check_perm(dev, file_priv); + if (ret) + goto out_unlock; + + ret = -EINVAL; if (!drm_is_current_master(file_priv)) goto out_unlock; diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index 9e41972c4bbc..73e31dd4e442 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -599,8 +599,8 @@ static const struct drm_ioctl_desc drm_ioctls[] = { DRM_LEGACY_IOCTL_DEF(DRM_IOCTL_SET_SAREA_CTX, drm_legacy_setsareactx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_LEGACY_IOCTL_DEF(DRM_IOCTL_GET_SAREA_CTX, drm_legacy_getsareactx, DRM_AUTH), - DRM_IOCTL_DEF(DRM_IOCTL_SET_MASTER, drm_setmaster_ioctl, DRM_ROOT_ONLY), - DRM_IOCTL_DEF(DRM_IOCTL_DROP_MASTER, drm_dropmaster_ioctl, DRM_ROOT_ONLY), + DRM_IOCTL_DEF(DRM_IOCTL_SET_MASTER, drm_setmaster_ioctl, 0), + DRM_IOCTL_DEF(DRM_IOCTL_DROP_MASTER, drm_dropmaster_ioctl, 0), DRM_LEGACY_IOCTL_DEF(DRM_IOCTL_ADD_CTX, drm_legacy_addctx, DRM_AUTH|DRM_ROOT_ONLY), DRM_LEGACY_IOCTL_DEF(DRM_IOCTL_RM_CTX, drm_legacy_rmctx, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h index 19df8028a6c4..c4746c9d3619 100644 --- a/include/drm/drm_file.h +++ b/include/drm/drm_file.h @@ -201,6 +201,17 @@ struct drm_file { */ bool writeback_connectors; + /** + * @was_master: + * + * This client has or had, master capability. Protected by struct + * &drm_device.master_mutex. + * + * This is used to ensure that CAP_SYS_ADMIN is not enforced, if the + * client is or was master in the past. + */ + bool was_master; + /** * @is_master: * -- 2.25.0

3 7

[PATCH] drm/msm/a6xx: Correct the highestbank configuration
by Akhil P Oommen 11 Feb '20

11 Feb '20

Highest bank bit configuration is different for a618 gpu. Update it with the correct configuration which is the reset value incidentally. Signed-off-by: Akhil P Oommen <akhilpo(a)codeaurora.org> Signed-off-by: Sharat Masetty <smasetty(a)codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index daf0780..536d196 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -470,10 +470,12 @@ static int a6xx_hw_init(struct msm_gpu *gpu) /* Select CP0 to always count cycles */ gpu_write(gpu, REG_A6XX_CP_PERFCTR_CP_SEL_0, PERF_CP_ALWAYS_COUNT); - gpu_write(gpu, REG_A6XX_RB_NC_MODE_CNTL, 2 << 1); - gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, 2 << 1); - gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL, 2 << 1); - gpu_write(gpu, REG_A6XX_UCHE_MODE_CNTL, 2 << 21); + if (adreno_is_a630(adreno_gpu)) { + gpu_write(gpu, REG_A6XX_RB_NC_MODE_CNTL, 2 << 1); + gpu_write(gpu, REG_A6XX_TPL1_NC_MODE_CNTL, 2 << 1); + gpu_write(gpu, REG_A6XX_SP_NC_MODE_CNTL, 2 << 1); + gpu_write(gpu, REG_A6XX_UCHE_MODE_CNTL, 2 << 21); + } /* Enable fault detection */ gpu_write(gpu, REG_A6XX_RBBM_INTERFACE_HANG_INT_CNTL, -- 2.7.4

3 4

Cleanup TTMs delayed delete handling
by Christian König 11 Feb '20

11 Feb '20

This series of patches cleans up TTMs delayed delete handling. The core of the new handling is that we new only have a single reference counter instead of two and use kref_get_unless_zero() to grab BOs from the LRU during eviction. This reduces the overhead of LRU moves and allows us to properly individualize the BOs reservation object during deletion to allow adding BOs for clearing memory, unmapping page tables etc.. Please review and comment, Christian.

3 16

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dri-devel February 2020