dri-devel February 2020

dri-devel@lists.freedesktop.org

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679 discussions

[PATCH 4/4] drm/radeon: align short build log
by Masahiro Yamada 13 Feb '20

13 Feb '20

This beautifies the build log. [Before] HOSTCC drivers/gpu/drm/radeon/mkregtable MKREGTABLE drivers/gpu/drm/radeon/r100_reg_safe.h MKREGTABLE drivers/gpu/drm/radeon/rn50_reg_safe.h CC [M] drivers/gpu/drm/radeon/r100.o MKREGTABLE drivers/gpu/drm/radeon/r300_reg_safe.h CC [M] drivers/gpu/drm/radeon/r300.o [After] HOSTCC drivers/gpu/drm/radeon/mkregtable MKREG drivers/gpu/drm/radeon/r100_reg_safe.h MKREG drivers/gpu/drm/radeon/rn50_reg_safe.h CC [M] drivers/gpu/drm/radeon/r100.o MKREG drivers/gpu/drm/radeon/r300_reg_safe.h CC [M] drivers/gpu/drm/radeon/r300.o Signed-off-by: Masahiro Yamada <masahiroy(a)kernel.org> --- drivers/gpu/drm/radeon/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 480a8d4a3c82..11c97edde54d 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -6,7 +6,7 @@ hostprogs := mkregtable targets := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300_reg_safe.h r420_reg_safe.h rs600_reg_safe.h r600_reg_safe.h evergreen_reg_safe.h cayman_reg_safe.h -quiet_cmd_mkregtable = MKREGTABLE $@ +quiet_cmd_mkregtable = MKREG $@ cmd_mkregtable = $(obj)/mkregtable $< > $@ $(obj)/%_reg_safe.h: $(src)/reg_srcs/% $(obj)/mkregtable FORCE -- 2.17.1

1 0

[PATCH 3/4] drm/radeon: use pattern rule to avoid code duplication in Makefile
by Masahiro Yamada 13 Feb '20

13 Feb '20

This Makefile repeats similar build rules. Use a pattern rule. Signed-off-by: Masahiro Yamada <masahiroy(a)kernel.org> --- drivers/gpu/drm/radeon/Makefile | 29 +---------------------------- 1 file changed, 1 insertion(+), 28 deletions(-) diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index fda115cefe4d..480a8d4a3c82 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -9,34 +9,7 @@ targets := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300 quiet_cmd_mkregtable = MKREGTABLE $@ cmd_mkregtable = $(obj)/mkregtable $< > $@ -$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/r600_reg_safe.h: $(src)/reg_srcs/r600 $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/evergreen_reg_safe.h: $(src)/reg_srcs/evergreen $(obj)/mkregtable FORCE - $(call if_changed,mkregtable) - -$(obj)/cayman_reg_safe.h: $(src)/reg_srcs/cayman $(obj)/mkregtable FORCE +$(obj)/%_reg_safe.h: $(src)/reg_srcs/% $(obj)/mkregtable FORCE $(call if_changed,mkregtable) $(obj)/r100.o: $(obj)/r100_reg_safe.h $(obj)/rn50_reg_safe.h -- 2.17.1

1 0

[PATCH 2/4] drm/radeon: fix build rules of *_reg_safe.h
by Masahiro Yamada 13 Feb '20

13 Feb '20

if_changed must have FORCE as a prerequisite, and the targets must be added to 'targets'. Signed-off-by: Masahiro Yamada <masahiroy(a)kernel.org> --- drivers/gpu/drm/radeon/Makefile | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 9d5d3dc1011f..fda115cefe4d 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -4,39 +4,39 @@ # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. hostprogs := mkregtable -clean-files := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300_reg_safe.h r420_reg_safe.h rs600_reg_safe.h r600_reg_safe.h evergreen_reg_safe.h cayman_reg_safe.h +targets := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300_reg_safe.h r420_reg_safe.h rs600_reg_safe.h r600_reg_safe.h evergreen_reg_safe.h cayman_reg_safe.h quiet_cmd_mkregtable = MKREGTABLE $@ cmd_mkregtable = $(obj)/mkregtable $< > $@ -$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable +$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable +$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable +$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable +$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable +$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable +$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable +$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/r600_reg_safe.h: $(src)/reg_srcs/r600 $(obj)/mkregtable +$(obj)/r600_reg_safe.h: $(src)/reg_srcs/r600 $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/evergreen_reg_safe.h: $(src)/reg_srcs/evergreen $(obj)/mkregtable +$(obj)/evergreen_reg_safe.h: $(src)/reg_srcs/evergreen $(obj)/mkregtable FORCE $(call if_changed,mkregtable) -$(obj)/cayman_reg_safe.h: $(src)/reg_srcs/cayman $(obj)/mkregtable +$(obj)/cayman_reg_safe.h: $(src)/reg_srcs/cayman $(obj)/mkregtable FORCE $(call if_changed,mkregtable) $(obj)/r100.o: $(obj)/r100_reg_safe.h $(obj)/rn50_reg_safe.h -- 2.17.1

1 0

[PATCH v2 0/4] Add support for devices in the Energy Model
by lukasz.luba＠arm.com 13 Feb '20

13 Feb '20

From: Lukasz Luba <lukasz.luba(a)arm.com> Hi all, This patch set introduces support for devices in the Energy Model (EM) framework. It will unify the power model for thermal subsystem and make it simpler. The 1st patch refactors EM framework and adds support for devices. The 2nd patch changes dev_pm_opp_of_register_em() in OPP/OF which now should take as an argument struct device pointer. It touches a few trees (OMAP, NXP, mediatek) updating their CPUfreq drivers to the new interface. Patch 3/4 changes thermal devfreq cooling removing old code for calculating local power table. It simplifies the code and uses EM for requested power calculation. Last patch 4/4 adds EM to Panfrost driver. The patch set is based on linux-next tag next-20200206 but also applies on top of today's Linus's master. Changes: v2: - changed EM API em_register_perf_domain() adding cpumask_t pointer as last argument (which was discussed with Dietmar and Quentin) - removed dependency on PM_OPP, thanks to the cpumask_t argument - removed enum em_type and em->type dependent code - em_get_pd() can handle CPU device as well as devfreq device - updated EM documentation - in devfreq cooling added code which prevents from race condition with devfreq governors which are trying to use OPPs while thermal is in the middle of disabling them. - in devfreq cooling added code which updates state of the devfreq device to avoid working on stale data when governor has not updated it for a long time - in devfreq cooling added backward compatibility frequency table for drivers which did not provide EM - added Steven's Reviewed-by to trace code in thermal - added another CPUFreq driver which needs to be updated to the new API The v1 can be found here [1]. Regards, Lukasz Luba [1] https://lkml.org/lkml/2020/1/16/619 Lukasz Luba (4): PM / EM: add devices to Energy Model OPP: change parameter to device pointer in dev_pm_opp_of_register_em() thermal: devfreq_cooling: Refactor code and switch to use Energy Model drm/panfrost: Register to the Energy Model with devfreq device Documentation/power/energy-model.rst | 129 +++--- drivers/cpufreq/cpufreq-dt.c | 2 +- drivers/cpufreq/imx6q-cpufreq.c | 2 +- drivers/cpufreq/mediatek-cpufreq.c | 2 +- drivers/cpufreq/omap-cpufreq.c | 2 +- drivers/cpufreq/qcom-cpufreq-hw.c | 2 +- drivers/cpufreq/scmi-cpufreq.c | 11 +- drivers/cpufreq/scpi-cpufreq.c | 2 +- drivers/cpufreq/vexpress-spc-cpufreq.c | 2 +- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 3 + drivers/opp/of.c | 45 +-- drivers/thermal/cpufreq_cooling.c | 10 +- drivers/thermal/devfreq_cooling.c | 427 +++++++++----------- include/linux/devfreq_cooling.h | 17 - include/linux/energy_model.h | 108 +++-- include/linux/pm_opp.h | 14 +- include/trace/events/thermal.h | 19 +- kernel/power/energy_model.c | 399 ++++++++++++++---- kernel/sched/sched.h | 2 +- kernel/sched/topology.c | 4 +- 20 files changed, 712 insertions(+), 490 deletions(-) -- 2.17.1

5 10

[PATCH] drm/mediatek: Update the fb property mtk_plane_atomic_async_update
by Enric Balletbo i Serra 13 Feb '20

13 Feb '20

Commit 920fffcc8912 ("drm/mediatek: update cursors by using async atomic update") added support to async updates of cursors by using the new atomic interface for that. Unfortunately, introduced two issues. The first one is that since then, the drm_atomic_helper_async_commit triggers a WARNING due current fb is not the new fb. The second one, is that we get a black screen connecting the external display on Elm device and another WARNING due vblank wait timed out. Swap the fb in mtk_plane_atomic_async_update to fix both issues. Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic update") Signed-off-by: Enric Balletbo i Serra <enric.balletbo(a)collabora.com> --- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c index 914cc7619cd7..7eb10115e72a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c @@ -116,6 +116,7 @@ static void mtk_plane_atomic_async_update(struct drm_plane *plane, plane->state->src_h = new_state->src_h; plane->state->src_w = new_state->src_w; state->pending.async_dirty = true; + swap(plane->state->fb, new_state->fb); mtk_drm_crtc_async_update(new_state->crtc, plane, new_state); } -- 2.25.0

1 1

TTM/Nouveau cleanups
by Christian König 13 Feb '20

13 Feb '20

Hi guys, I've already send this out in September last year, but only got a response from Daniel. Could you guys please test this and tell me what you think about it? Basically I'm trying to remove all driver specific features from TTM which don't need to be inside the framework. Thanks, Christian.

2 4

[PATCH v4] drm/i915: dont retry stream management at seq_num_m roll over
by Ramalingam C 13 Feb '20

13 Feb '20

When roll over detected for seq_num_m, we shouldn't continue with stream management with rolled over value. So we are terminating the stream management retry, on roll over of the seq_num_m. v2: using drm_dbg_kms instead of DRM_DEBUG_KMS [Anshuman] v3: dev_priv is used as i915 [JaniN] v4: roll over of seq_num_m detected at the start of stream management. Signed-off-by: Ramalingam C <ramalingam.c(a)intel.com> --- drivers/gpu/drm/i915/display/intel_hdcp.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index b24d12efae0a..f4b1dd1e62e7 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1391,6 +1391,13 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector) const struct intel_hdcp_shim *shim = hdcp->shim; int ret; + /* + * seq_num_m roll over is possible only when dynamic update of + * content type is supported. But implementing as per the spec. + */ + if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) + return -1; + /* Prepare RepeaterAuth_Stream_Manage msg */ msgs.stream_manage.msg_id = HDCP_2_2_REP_STREAM_MANAGE; drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m); @@ -1419,11 +1426,6 @@ int _hdcp2_propagate_stream_management_info(struct intel_connector *connector) err_exit: hdcp->seq_num_m++; - if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { - DRM_DEBUG_KMS("seq_num_m roll over.\n"); - ret = -1; - } - return ret; } @@ -1618,8 +1620,11 @@ hdcp2_propagate_stream_management_info(struct intel_connector *connector) for (i = 0; i < tries; i++) { ret = _hdcp2_propagate_stream_management_info(connector); - if (!ret) + if (!ret || connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) { + if (connector->hdcp.seq_num_m > HDCP_2_2_SEQ_NUM_MAX) + drm_dbg_kms(&i915->drm, "seq_num_m roll over.\n"); break; + } drm_dbg_kms(&i915->drm, "HDCP2 stream management %d of %d Failed.(%d)\n", -- 2.20.1

1 0

general protection fault in fbcon_cursor
by syzbot 13 Feb '20

13 Feb '20

Hello, syzbot found the following crash on: HEAD commit: ae4b064e Merge tag 'afs-fixes-20191211' of git://git.kerne.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=1218c1dee00000 kernel config: https://syzkaller.appspot.com/x/.config?x=79f79de2a27d3e3d dashboard link: https://syzkaller.appspot.com/bug?extid=6acf28c23c81badd89a7 compiler: gcc (GCC) 9.0.0 20181231 (experimental) Unfortunately, I don't have any reproducer for this crash yet. IMPORTANT: if you fix the bug, please add the following tag to the commit: Reported-by: syzbot+6acf28c23c81badd89a7(a)syzkaller.appspotmail.com kasan: CONFIG_KASAN_INLINE enabled kasan: GPF could be caused by NULL-ptr deref or user memory access general protection fault: 0000 [#1] PREEMPT SMP KASAN CPU: 1 PID: 17 Comm: kworker/1:0 Not tainted 5.5.0-rc1-syzkaller #0 Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 Workqueue: events console_callback RIP: 0010:fbcon_cursor+0x114/0x660 drivers/video/fbdev/core/fbcon.c:1380 Code: 48 89 fa 48 c1 ea 03 80 3c 02 00 0f 85 e6 04 00 00 4d 8b b4 24 a0 03 00 00 48 b8 00 00 00 00 00 fc ff df 4c 89 f2 48 c1 ea 03 <0f> b6 14 02 4c 89 f0 83 e0 07 83 c0 01 38 d0 7c 08 84 d2 0f 85 ba RSP: 0018:ffffc90000d8fb00 EFLAGS: 00010206 RAX: dffffc0000000000 RBX: ffff8880a4309400 RCX: ffffffff83e01590 RDX: 000000001fffffe7 RSI: ffffffff83b2804c RDI: ffff8880a282b3a0 RBP: ffffc90000d8fb40 R08: ffff8880a9a4a480 R09: ffffed10147a3e1c R10: ffffed10147a3e1b R11: ffff8880a3d1f0df R12: ffff8880a282b000 R13: ffff888218c76000 R14: 00000000ffffff3a R15: ffff888218c76468 FS: 0000000000000000(0000) GS:ffff8880ae900000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000004bf9b0 CR3: 000000008e75d000 CR4: 00000000001406e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: set_cursor drivers/tty/vt/vt.c:908 [inline] set_cursor+0x1fb/0x280 drivers/tty/vt/vt.c:899 redraw_screen+0x4e1/0x7d0 drivers/tty/vt/vt.c:1013 complete_change_console+0x105/0x3a0 drivers/tty/vt/vt_ioctl.c:1264 change_console+0x19b/0x2c0 drivers/tty/vt/vt_ioctl.c:1389 console_callback+0x3a1/0x400 drivers/tty/vt/vt.c:2824 process_one_work+0x9af/0x1740 kernel/workqueue.c:2264 worker_thread+0x98/0xe40 kernel/workqueue.c:2410 kthread+0x361/0x430 kernel/kthread.c:255 ret_from_fork+0x24/0x30 arch/x86/entry/entry_64.S:352 Modules linked in: ---[ end trace a825343a1e8757e1 ]--- RIP: 0010:fbcon_cursor+0x114/0x660 drivers/video/fbdev/core/fbcon.c:1380 Code: 48 89 fa 48 c1 ea 03 80 3c 02 00 0f 85 e6 04 00 00 4d 8b b4 24 a0 03 00 00 48 b8 00 00 00 00 00 fc ff df 4c 89 f2 48 c1 ea 03 <0f> b6 14 02 4c 89 f0 83 e0 07 83 c0 01 38 d0 7c 08 84 d2 0f 85 ba RSP: 0018:ffffc90000d8fb00 EFLAGS: 00010206 RAX: dffffc0000000000 RBX: ffff8880a4309400 RCX: ffffffff83e01590 RDX: 000000001fffffe7 RSI: ffffffff83b2804c RDI: ffff8880a282b3a0 RBP: ffffc90000d8fb40 R08: ffff8880a9a4a480 R09: ffffed10147a3e1c R10: ffffed10147a3e1b R11: ffff8880a3d1f0df R12: ffff8880a282b000 R13: ffff888218c76000 R14: 00000000ffffff3a R15: ffff888218c76468 FS: 0000000000000000(0000) GS:ffff8880ae900000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000004bf9b0 CR3: 000000008e75d000 CR4: 00000000001406e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 --- This bug is generated by a bot. It may contain errors. See https://goo.gl/tpsmEJ for more information about syzbot. syzbot engineers can be reached at syzkaller(a)googlegroups.com. syzbot will keep track of this bug report. See: https://goo.gl/tpsmEJ#status for how to communicate with syzbot.

1 1

[PATCH] drm/ttm: replace dma_resv object on deleted BOs v3
by Christian König 13 Feb '20

13 Feb '20

When non-imported BOs are resurrected for delayed delete we replace the dma_resv object to allow for easy reclaiming of the resources. v2: move that to ttm_bo_individualize_resv v3: add a comment to explain what's going on Signed-off-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: xinhui pan <xinhui.pan(a)amd.com> --- drivers/gpu/drm/ttm/ttm_bo.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index bfc42a9e4fb4..8174603d390f 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@ -393,6 +393,18 @@ static int ttm_bo_individualize_resv(struct ttm_buffer_object *bo) r = dma_resv_copy_fences(&bo->base._resv, bo->base.resv); dma_resv_unlock(&bo->base._resv); + if (r) + return r; + + if (bo->type != ttm_bo_type_sg) { + /* This works because the BO is about to be destroyed and nobody + * reference it any more. The only tricky case is the trylock on + * the resv object while holding the lru_lock. + */ + spin_lock(&ttm_bo_glob.lru_lock); + bo->base.resv = &bo->base._resv; + spin_unlock(&ttm_bo_glob.lru_lock); + } return r; } @@ -724,7 +736,7 @@ static bool ttm_bo_evict_swapout_allowable(struct ttm_buffer_object *bo, if (bo->base.resv == ctx->resv) { dma_resv_assert_held(bo->base.resv); - if (ctx->flags & TTM_OPT_FLAG_ALLOW_RES_EVICT || bo->deleted) + if (ctx->flags & TTM_OPT_FLAG_ALLOW_RES_EVICT) ret = true; *locked = false; if (busy) -- 2.17.1

4 7

[PATCH v2] drm/tidss: dispc: Rewrite naive plane positioning code
by Jyri Sarha 13 Feb '20

13 Feb '20

The old implementation of placing planes on the CRTC while configuring the planes was naive and relied on the order in which the planes were configured, enabled, and disabled. The situation where a plane's zpos was changed on the fly was completely broken. The usual symptoms of this problem was scrambled display and a flood of sync lost errors, when a plane was active in two layers at the same time, or a missing plane, in case when a layer was accidentally disabled. The rewrite takes a more straight forward approach when HW is concerned. The plane positioning registers are in the CRTC (actually OVR) register space and it is more natural to configure them in one go while configuring the CRTC. To do this we need to make sure we have all the planes on updated CRTCs in the new atomic state to be committed. This is done by calling drm_atomic_add_affected_planes() in crtc_atomic_check(). Signed-off-by: Jyri Sarha <jsarha(a)ti.com> --- drivers/gpu/drm/tidss/tidss_crtc.c | 55 ++++++++++++++++++++++++++++- drivers/gpu/drm/tidss/tidss_dispc.c | 55 +++++++++++------------------ drivers/gpu/drm/tidss/tidss_dispc.h | 5 +++ 3 files changed, 79 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tidss_crtc.c index 032c31ee2820..f7c5fd1094a8 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.c +++ b/drivers/gpu/drm/tidss/tidss_crtc.c @@ -17,6 +17,7 @@ #include "tidss_dispc.h" #include "tidss_drv.h" #include "tidss_irq.h" +#include "tidss_plane.h" /* Page flip and frame done IRQs */ @@ -93,6 +94,7 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc, u32 hw_videoport = tcrtc->hw_videoport; const struct drm_display_mode *mode; enum drm_mode_status ok; + int ret; dev_dbg(ddev->dev, "%s\n", __func__); @@ -108,7 +110,54 @@ static int tidss_crtc_atomic_check(struct drm_crtc *crtc, return -EINVAL; } - return dispc_vp_bus_check(dispc, hw_videoport, state); + ret = dispc_vp_bus_check(dispc, hw_videoport, state); + if (ret) + return ret; + + /* Add unchanged planes on this crtc to state for zpos update. */ + return drm_atomic_add_affected_planes(state->state, crtc); +} + +static void tidss_crtc_position_planes(struct tidss_device *tidss, + struct drm_crtc *crtc, + struct drm_crtc_state *old_state, + bool newmodeset) +{ + struct drm_atomic_state *ostate = old_state->state; + struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); + struct drm_crtc_state *cstate = crtc->state; + int zpos; + + if (!newmodeset && !cstate->zpos_changed && !cstate->planes_changed) + return; + + for (zpos = 0; zpos < tidss->feat->num_planes; zpos++) { + struct drm_plane_state *pstate; + struct drm_plane *plane; + bool zpos_taken = false; + int i; + + for_each_new_plane_in_state(ostate, plane, pstate, i) { + if (pstate->crtc != crtc || !pstate->visible) + continue; + + if (pstate->normalized_zpos == zpos) { + zpos_taken = true; + break; + } + } + + if (zpos_taken) { + struct tidss_plane *tplane = to_tidss_plane(plane); + + dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, + tcrtc->hw_videoport, + pstate->crtc_x, pstate->crtc_y, + zpos); + } + dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, zpos, + zpos_taken); + } } static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, @@ -146,6 +195,9 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, /* Write vp properties to HW if needed. */ dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); + /* Update plane positions if needed. */ + tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); + WARN_ON(drm_crtc_vblank_get(crtc) != 0); spin_lock_irqsave(&ddev->event_lock, flags); @@ -183,6 +235,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, return; dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); + tidss_crtc_position_planes(tidss, crtc, old_state, true); /* Turn vertical blanking interrupt reporting on. */ drm_crtc_vblank_on(crtc); diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index eeb160dc047b..e79dad246b1e 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -281,11 +281,6 @@ struct dss_vp_data { u32 *gamma_table; }; -struct dss_plane_data { - u32 zorder; - u32 hw_videoport; -}; - struct dispc_device { struct tidss_device *tidss; struct device *dev; @@ -307,8 +302,6 @@ struct dispc_device { struct dss_vp_data vp_data[TIDSS_MAX_PORTS]; - struct dss_plane_data plane_data[TIDSS_MAX_PLANES]; - u32 *fourccs; u32 num_fourccs; @@ -1247,7 +1240,7 @@ int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, /* OVR */ static void dispc_k2g_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, u32 hw_videoport, - u32 x, u32 y, u32 zpos) + u32 x, u32 y, u32 layer) { /* On k2g there is only one plane and no need for ovr */ dispc_vid_write(dispc, hw_plane, DISPC_VID_K2G_POSITION, @@ -1256,44 +1249,43 @@ static void dispc_k2g_ovr_set_plane(struct dispc_device *dispc, static void dispc_am65x_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, u32 hw_videoport, - u32 x, u32 y, u32 zpos) + u32 x, u32 y, u32 layer) { - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), hw_plane, 4, 1); - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), x, 17, 6); - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), y, 30, 19); } static void dispc_j721e_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, u32 hw_videoport, - u32 x, u32 y, u32 zpos) + u32 x, u32 y, u32 layer) { - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), hw_plane, 4, 1); - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer), x, 13, 0); - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(zpos), + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer), y, 29, 16); } -static void dispc_ovr_set_plane(struct dispc_device *dispc, - u32 hw_plane, u32 hw_videoport, - u32 x, u32 y, u32 zpos) +void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, + u32 hw_videoport, u32 x, u32 y, u32 layer) { switch (dispc->feat->subrev) { case DISPC_K2G: dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport, - x, y, zpos); + x, y, layer); break; case DISPC_AM65X: dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport, - x, y, zpos); + x, y, layer); break; case DISPC_J721E: dispc_j721e_ovr_set_plane(dispc, hw_plane, hw_videoport, - x, y, zpos); + x, y, layer); break; default: WARN_ON(1); @@ -1301,10 +1293,13 @@ static void dispc_ovr_set_plane(struct dispc_device *dispc, } } -static void dispc_ovr_enable_plane(struct dispc_device *dispc, - u32 hw_videoport, u32 zpos, bool enable) +void dispc_ovr_enable_layer(struct dispc_device *dispc, + u32 hw_videoport, u32 layer, bool enable) { - OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(zpos), + if (dispc->feat->subrev == DISPC_K2G) + return; + + OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), !!enable, 0, 0); } @@ -2070,21 +2065,11 @@ int dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane, VID_REG_FLD_MOD(dispc, hw_plane, DISPC_VID_ATTRIBUTES, 0, 28, 28); - dispc_ovr_set_plane(dispc, hw_plane, hw_videoport, - state->crtc_x, state->crtc_y, - state->normalized_zpos); - - dispc->plane_data[hw_plane].zorder = state->normalized_zpos; - dispc->plane_data[hw_plane].hw_videoport = hw_videoport; - return 0; } int dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable) { - dispc_ovr_enable_plane(dispc, dispc->plane_data[hw_plane].hw_videoport, - dispc->plane_data[hw_plane].zorder, enable); - VID_REG_FLD_MOD(dispc, hw_plane, DISPC_VID_ATTRIBUTES, !!enable, 0, 0); return 0; diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index e65e6a2bb821..a4a68249e44b 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -94,6 +94,11 @@ extern const struct dispc_features dispc_j721e_feats; void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask); dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc); +void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane, + u32 hw_videoport, u32 x, u32 y, u32 layer); +void dispc_ovr_enable_layer(struct dispc_device *dispc, + u32 hw_videoport, u32 layer, bool enable); + void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport, const struct drm_crtc_state *state); void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport, -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

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dri-devel February 2020